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authorandrew.vasquez@qlogic.com <andrew.vasquez@qlogic.com>2006-01-13 20:05:37 -0500
committerJames Bottomley <jejb@mulgrave.(none)>2006-01-14 11:55:34 -0500
commit590f98e5e8d6502cc21fdcddc90a0cc09c1f770e (patch)
treedaa1a9439c0736d6ad79a90752922e5a608d66a9 /drivers/scsi/qla2xxx/qla_mbx.c
parentf94097edf2c3ac9bc48580252c2eee52947b5e60 (diff)
[SCSI] qla2xxx: Collapse load RISC RAM implementations.
Simplify essentially duplicate load RISC RAM implementation in qla2x00_load_ram_ext() and qla2x00_load_ram(). Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_mbx.c')
-rw-r--r--drivers/scsi/qla2xxx/qla_mbx.c103
1 files changed, 10 insertions, 93 deletions
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c
index 3de8fee69fa4..3099b379de9d 100644
--- a/drivers/scsi/qla2xxx/qla_mbx.c
+++ b/drivers/scsi/qla2xxx/qla_mbx.c
@@ -327,113 +327,30 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp)
327 return rval; 327 return rval;
328} 328}
329 329
330/*
331 * qla2x00_load_ram
332 * Load adapter RAM using DMA.
333 *
334 * Input:
335 * ha = adapter block pointer.
336 *
337 * Returns:
338 * qla2x00 local function return status code.
339 *
340 * Context:
341 * Kernel context.
342 */
343int 330int
344qla2x00_load_ram(scsi_qla_host_t *ha, dma_addr_t req_dma, uint16_t risc_addr, 331qla2x00_load_ram(scsi_qla_host_t *ha, dma_addr_t req_dma, uint32_t risc_addr,
345 uint16_t risc_code_size) 332 uint32_t risc_code_size)
346{ 333{
347 int rval; 334 int rval;
348 mbx_cmd_t mc; 335 mbx_cmd_t mc;
349 mbx_cmd_t *mcp = &mc; 336 mbx_cmd_t *mcp = &mc;
350 uint32_t req_len;
351 dma_addr_t nml_dma;
352 uint32_t nml_len;
353 uint32_t normalized;
354
355 DEBUG11(printk("qla2x00_load_ram(%ld): entered.\n",
356 ha->host_no);)
357 337
358 req_len = risc_code_size; 338 DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no));
359 nml_dma = 0;
360 nml_len = 0;
361
362 normalized = qla2x00_normalize_dma_addr(&req_dma, &req_len, &nml_dma,
363 &nml_len);
364
365 /* Load first segment */
366 mcp->mb[0] = MBC_LOAD_RISC_RAM;
367 mcp->mb[1] = risc_addr;
368 mcp->mb[2] = MSW(req_dma);
369 mcp->mb[3] = LSW(req_dma);
370 mcp->mb[4] = (uint16_t)req_len;
371 mcp->mb[6] = MSW(MSD(req_dma));
372 mcp->mb[7] = LSW(MSD(req_dma));
373 mcp->out_mb = MBX_7|MBX_6|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
374 mcp->in_mb = MBX_0;
375 mcp->tov = 30;
376 mcp->flags = 0;
377 rval = qla2x00_mailbox_command(ha, mcp);
378
379 /* Load second segment - if necessary */
380 if (normalized && (rval == QLA_SUCCESS)) {
381 mcp->mb[0] = MBC_LOAD_RISC_RAM;
382 mcp->mb[1] = risc_addr + (uint16_t)req_len;
383 mcp->mb[2] = MSW(nml_dma);
384 mcp->mb[3] = LSW(nml_dma);
385 mcp->mb[4] = (uint16_t)nml_len;
386 mcp->mb[6] = MSW(MSD(nml_dma));
387 mcp->mb[7] = LSW(MSD(nml_dma));
388 mcp->out_mb = MBX_7|MBX_6|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
389 mcp->in_mb = MBX_0;
390 mcp->tov = 30;
391 mcp->flags = 0;
392 rval = qla2x00_mailbox_command(ha, mcp);
393 }
394 339
395 if (rval == QLA_SUCCESS) { 340 if (MSW(risc_addr) || IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
396 /* Empty */ 341 mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
397 DEBUG11(printk("qla2x00_load_ram(%ld): done.\n", ha->host_no);) 342 mcp->mb[8] = MSW(risc_addr);
343 mcp->out_mb = MBX_8|MBX_0;
398 } else { 344 } else {
399 /* Empty */ 345 mcp->mb[0] = MBC_LOAD_RISC_RAM;
400 DEBUG2_3_11(printk("qla2x00_load_ram(%ld): failed. rval=%x " 346 mcp->out_mb = MBX_0;
401 "mb[0]=%x.\n", ha->host_no, rval, mcp->mb[0]);)
402 } 347 }
403 return rval;
404}
405
406/*
407 * qla2x00_load_ram_ext
408 * Load adapter extended RAM using DMA.
409 *
410 * Input:
411 * ha = adapter block pointer.
412 *
413 * Returns:
414 * qla2x00 local function return status code.
415 *
416 * Context:
417 * Kernel context.
418 */
419int
420qla2x00_load_ram_ext(scsi_qla_host_t *ha, dma_addr_t req_dma,
421 uint32_t risc_addr, uint32_t risc_code_size)
422{
423 int rval;
424 mbx_cmd_t mc;
425 mbx_cmd_t *mcp = &mc;
426
427 DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no));
428
429 mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
430 mcp->mb[1] = LSW(risc_addr); 348 mcp->mb[1] = LSW(risc_addr);
431 mcp->mb[2] = MSW(req_dma); 349 mcp->mb[2] = MSW(req_dma);
432 mcp->mb[3] = LSW(req_dma); 350 mcp->mb[3] = LSW(req_dma);
433 mcp->mb[6] = MSW(MSD(req_dma)); 351 mcp->mb[6] = MSW(MSD(req_dma));
434 mcp->mb[7] = LSW(MSD(req_dma)); 352 mcp->mb[7] = LSW(MSD(req_dma));
435 mcp->mb[8] = MSW(risc_addr); 353 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
436 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
437 if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) { 354 if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
438 mcp->mb[4] = MSW(risc_code_size); 355 mcp->mb[4] = MSW(risc_code_size);
439 mcp->mb[5] = LSW(risc_code_size); 356 mcp->mb[5] = LSW(risc_code_size);