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authorAndrew Vasquez <andrew.vasquez@qlogic.com>2005-07-06 13:32:07 -0400
committerJames Bottomley <jejb@mulgrave.(none)>2005-07-14 11:03:15 -0400
commitfa2a1ce53d4b869b74da9a770770c79f9af64914 (patch)
treeda350e79117d3177f51c2788c51aeba425afd4ca /drivers/scsi/qla2xxx/qla_dbg.c
parentba5140b48e35aa4e4b57eb6db5cface63d7bd712 (diff)
[SCSI] qla2xxx: Code scrubbing.
Code scrubbing. - Remove trailing whitespace from driver files. - Remove unused #defines and inlines. - Standardize on C comments (// -> /* */) Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_dbg.c')
-rw-r--r--drivers/scsi/qla2xxx/qla_dbg.c130
1 files changed, 65 insertions, 65 deletions
diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c
index 80dcc2bac6d6..d5107aa15c1e 100644
--- a/drivers/scsi/qla2xxx/qla_dbg.c
+++ b/drivers/scsi/qla2xxx/qla_dbg.c
@@ -74,7 +74,7 @@ qla2300_fw_dump(scsi_qla_host_t *ha, int hardware_locked)
74 fw->hccr = RD_REG_WORD(&reg->hccr); 74 fw->hccr = RD_REG_WORD(&reg->hccr);
75 75
76 /* Pause RISC. */ 76 /* Pause RISC. */
77 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC); 77 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
78 if (IS_QLA2300(ha)) { 78 if (IS_QLA2300(ha)) {
79 for (cnt = 30000; 79 for (cnt = 30000;
80 (RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0 && 80 (RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0 &&
@@ -91,85 +91,85 @@ qla2300_fw_dump(scsi_qla_host_t *ha, int hardware_locked)
91 91
92 if (rval == QLA_SUCCESS) { 92 if (rval == QLA_SUCCESS) {
93 dmp_reg = (uint16_t __iomem *)(reg + 0); 93 dmp_reg = (uint16_t __iomem *)(reg + 0);
94 for (cnt = 0; cnt < sizeof(fw->pbiu_reg) / 2; cnt++) 94 for (cnt = 0; cnt < sizeof(fw->pbiu_reg) / 2; cnt++)
95 fw->pbiu_reg[cnt] = RD_REG_WORD(dmp_reg++); 95 fw->pbiu_reg[cnt] = RD_REG_WORD(dmp_reg++);
96 96
97 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x10); 97 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x10);
98 for (cnt = 0; cnt < sizeof(fw->risc_host_reg) / 2; cnt++) 98 for (cnt = 0; cnt < sizeof(fw->risc_host_reg) / 2; cnt++)
99 fw->risc_host_reg[cnt] = RD_REG_WORD(dmp_reg++); 99 fw->risc_host_reg[cnt] = RD_REG_WORD(dmp_reg++);
100 100
101 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x40); 101 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x40);
102 for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++) 102 for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++)
103 fw->mailbox_reg[cnt] = RD_REG_WORD(dmp_reg++); 103 fw->mailbox_reg[cnt] = RD_REG_WORD(dmp_reg++);
104 104
105 WRT_REG_WORD(&reg->ctrl_status, 0x40); 105 WRT_REG_WORD(&reg->ctrl_status, 0x40);
106 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 106 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
107 for (cnt = 0; cnt < sizeof(fw->resp_dma_reg) / 2; cnt++) 107 for (cnt = 0; cnt < sizeof(fw->resp_dma_reg) / 2; cnt++)
108 fw->resp_dma_reg[cnt] = RD_REG_WORD(dmp_reg++); 108 fw->resp_dma_reg[cnt] = RD_REG_WORD(dmp_reg++);
109 109
110 WRT_REG_WORD(&reg->ctrl_status, 0x50); 110 WRT_REG_WORD(&reg->ctrl_status, 0x50);
111 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 111 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
112 for (cnt = 0; cnt < sizeof(fw->dma_reg) / 2; cnt++) 112 for (cnt = 0; cnt < sizeof(fw->dma_reg) / 2; cnt++)
113 fw->dma_reg[cnt] = RD_REG_WORD(dmp_reg++); 113 fw->dma_reg[cnt] = RD_REG_WORD(dmp_reg++);
114 114
115 WRT_REG_WORD(&reg->ctrl_status, 0x00); 115 WRT_REG_WORD(&reg->ctrl_status, 0x00);
116 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0xA0); 116 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0xA0);
117 for (cnt = 0; cnt < sizeof(fw->risc_hdw_reg) / 2; cnt++) 117 for (cnt = 0; cnt < sizeof(fw->risc_hdw_reg) / 2; cnt++)
118 fw->risc_hdw_reg[cnt] = RD_REG_WORD(dmp_reg++); 118 fw->risc_hdw_reg[cnt] = RD_REG_WORD(dmp_reg++);
119 119
120 WRT_REG_WORD(&reg->pcr, 0x2000); 120 WRT_REG_WORD(&reg->pcr, 0x2000);
121 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 121 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
122 for (cnt = 0; cnt < sizeof(fw->risc_gp0_reg) / 2; cnt++) 122 for (cnt = 0; cnt < sizeof(fw->risc_gp0_reg) / 2; cnt++)
123 fw->risc_gp0_reg[cnt] = RD_REG_WORD(dmp_reg++); 123 fw->risc_gp0_reg[cnt] = RD_REG_WORD(dmp_reg++);
124 124
125 WRT_REG_WORD(&reg->pcr, 0x2200); 125 WRT_REG_WORD(&reg->pcr, 0x2200);
126 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 126 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
127 for (cnt = 0; cnt < sizeof(fw->risc_gp1_reg) / 2; cnt++) 127 for (cnt = 0; cnt < sizeof(fw->risc_gp1_reg) / 2; cnt++)
128 fw->risc_gp1_reg[cnt] = RD_REG_WORD(dmp_reg++); 128 fw->risc_gp1_reg[cnt] = RD_REG_WORD(dmp_reg++);
129 129
130 WRT_REG_WORD(&reg->pcr, 0x2400); 130 WRT_REG_WORD(&reg->pcr, 0x2400);
131 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 131 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
132 for (cnt = 0; cnt < sizeof(fw->risc_gp2_reg) / 2; cnt++) 132 for (cnt = 0; cnt < sizeof(fw->risc_gp2_reg) / 2; cnt++)
133 fw->risc_gp2_reg[cnt] = RD_REG_WORD(dmp_reg++); 133 fw->risc_gp2_reg[cnt] = RD_REG_WORD(dmp_reg++);
134 134
135 WRT_REG_WORD(&reg->pcr, 0x2600); 135 WRT_REG_WORD(&reg->pcr, 0x2600);
136 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 136 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
137 for (cnt = 0; cnt < sizeof(fw->risc_gp3_reg) / 2; cnt++) 137 for (cnt = 0; cnt < sizeof(fw->risc_gp3_reg) / 2; cnt++)
138 fw->risc_gp3_reg[cnt] = RD_REG_WORD(dmp_reg++); 138 fw->risc_gp3_reg[cnt] = RD_REG_WORD(dmp_reg++);
139 139
140 WRT_REG_WORD(&reg->pcr, 0x2800); 140 WRT_REG_WORD(&reg->pcr, 0x2800);
141 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 141 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
142 for (cnt = 0; cnt < sizeof(fw->risc_gp4_reg) / 2; cnt++) 142 for (cnt = 0; cnt < sizeof(fw->risc_gp4_reg) / 2; cnt++)
143 fw->risc_gp4_reg[cnt] = RD_REG_WORD(dmp_reg++); 143 fw->risc_gp4_reg[cnt] = RD_REG_WORD(dmp_reg++);
144 144
145 WRT_REG_WORD(&reg->pcr, 0x2A00); 145 WRT_REG_WORD(&reg->pcr, 0x2A00);
146 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 146 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
147 for (cnt = 0; cnt < sizeof(fw->risc_gp5_reg) / 2; cnt++) 147 for (cnt = 0; cnt < sizeof(fw->risc_gp5_reg) / 2; cnt++)
148 fw->risc_gp5_reg[cnt] = RD_REG_WORD(dmp_reg++); 148 fw->risc_gp5_reg[cnt] = RD_REG_WORD(dmp_reg++);
149 149
150 WRT_REG_WORD(&reg->pcr, 0x2C00); 150 WRT_REG_WORD(&reg->pcr, 0x2C00);
151 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 151 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
152 for (cnt = 0; cnt < sizeof(fw->risc_gp6_reg) / 2; cnt++) 152 for (cnt = 0; cnt < sizeof(fw->risc_gp6_reg) / 2; cnt++)
153 fw->risc_gp6_reg[cnt] = RD_REG_WORD(dmp_reg++); 153 fw->risc_gp6_reg[cnt] = RD_REG_WORD(dmp_reg++);
154 154
155 WRT_REG_WORD(&reg->pcr, 0x2E00); 155 WRT_REG_WORD(&reg->pcr, 0x2E00);
156 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 156 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
157 for (cnt = 0; cnt < sizeof(fw->risc_gp7_reg) / 2; cnt++) 157 for (cnt = 0; cnt < sizeof(fw->risc_gp7_reg) / 2; cnt++)
158 fw->risc_gp7_reg[cnt] = RD_REG_WORD(dmp_reg++); 158 fw->risc_gp7_reg[cnt] = RD_REG_WORD(dmp_reg++);
159 159
160 WRT_REG_WORD(&reg->ctrl_status, 0x10); 160 WRT_REG_WORD(&reg->ctrl_status, 0x10);
161 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 161 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
162 for (cnt = 0; cnt < sizeof(fw->frame_buf_hdw_reg) / 2; cnt++) 162 for (cnt = 0; cnt < sizeof(fw->frame_buf_hdw_reg) / 2; cnt++)
163 fw->frame_buf_hdw_reg[cnt] = RD_REG_WORD(dmp_reg++); 163 fw->frame_buf_hdw_reg[cnt] = RD_REG_WORD(dmp_reg++);
164 164
165 WRT_REG_WORD(&reg->ctrl_status, 0x20); 165 WRT_REG_WORD(&reg->ctrl_status, 0x20);
166 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 166 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
167 for (cnt = 0; cnt < sizeof(fw->fpm_b0_reg) / 2; cnt++) 167 for (cnt = 0; cnt < sizeof(fw->fpm_b0_reg) / 2; cnt++)
168 fw->fpm_b0_reg[cnt] = RD_REG_WORD(dmp_reg++); 168 fw->fpm_b0_reg[cnt] = RD_REG_WORD(dmp_reg++);
169 169
170 WRT_REG_WORD(&reg->ctrl_status, 0x30); 170 WRT_REG_WORD(&reg->ctrl_status, 0x30);
171 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 171 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
172 for (cnt = 0; cnt < sizeof(fw->fpm_b1_reg) / 2; cnt++) 172 for (cnt = 0; cnt < sizeof(fw->fpm_b1_reg) / 2; cnt++)
173 fw->fpm_b1_reg[cnt] = RD_REG_WORD(dmp_reg++); 173 fw->fpm_b1_reg[cnt] = RD_REG_WORD(dmp_reg++);
174 174
175 /* Reset RISC. */ 175 /* Reset RISC. */
@@ -622,7 +622,7 @@ qla2100_fw_dump(scsi_qla_host_t *ha, int hardware_locked)
622 fw->hccr = RD_REG_WORD(&reg->hccr); 622 fw->hccr = RD_REG_WORD(&reg->hccr);
623 623
624 /* Pause RISC. */ 624 /* Pause RISC. */
625 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC); 625 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
626 for (cnt = 30000; (RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0 && 626 for (cnt = 30000; (RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0 &&
627 rval == QLA_SUCCESS; cnt--) { 627 rval == QLA_SUCCESS; cnt--) {
628 if (cnt) 628 if (cnt)
@@ -632,7 +632,7 @@ qla2100_fw_dump(scsi_qla_host_t *ha, int hardware_locked)
632 } 632 }
633 if (rval == QLA_SUCCESS) { 633 if (rval == QLA_SUCCESS) {
634 dmp_reg = (uint16_t __iomem *)(reg + 0); 634 dmp_reg = (uint16_t __iomem *)(reg + 0);
635 for (cnt = 0; cnt < sizeof(fw->pbiu_reg) / 2; cnt++) 635 for (cnt = 0; cnt < sizeof(fw->pbiu_reg) / 2; cnt++)
636 fw->pbiu_reg[cnt] = RD_REG_WORD(dmp_reg++); 636 fw->pbiu_reg[cnt] = RD_REG_WORD(dmp_reg++);
637 637
638 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x10); 638 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x10);
@@ -644,67 +644,67 @@ qla2100_fw_dump(scsi_qla_host_t *ha, int hardware_locked)
644 } 644 }
645 645
646 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x20); 646 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x20);
647 for (cnt = 0; cnt < sizeof(fw->dma_reg) / 2; cnt++) 647 for (cnt = 0; cnt < sizeof(fw->dma_reg) / 2; cnt++)
648 fw->dma_reg[cnt] = RD_REG_WORD(dmp_reg++); 648 fw->dma_reg[cnt] = RD_REG_WORD(dmp_reg++);
649 649
650 WRT_REG_WORD(&reg->ctrl_status, 0x00); 650 WRT_REG_WORD(&reg->ctrl_status, 0x00);
651 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0xA0); 651 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0xA0);
652 for (cnt = 0; cnt < sizeof(fw->risc_hdw_reg) / 2; cnt++) 652 for (cnt = 0; cnt < sizeof(fw->risc_hdw_reg) / 2; cnt++)
653 fw->risc_hdw_reg[cnt] = RD_REG_WORD(dmp_reg++); 653 fw->risc_hdw_reg[cnt] = RD_REG_WORD(dmp_reg++);
654 654
655 WRT_REG_WORD(&reg->pcr, 0x2000); 655 WRT_REG_WORD(&reg->pcr, 0x2000);
656 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 656 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
657 for (cnt = 0; cnt < sizeof(fw->risc_gp0_reg) / 2; cnt++) 657 for (cnt = 0; cnt < sizeof(fw->risc_gp0_reg) / 2; cnt++)
658 fw->risc_gp0_reg[cnt] = RD_REG_WORD(dmp_reg++); 658 fw->risc_gp0_reg[cnt] = RD_REG_WORD(dmp_reg++);
659 659
660 WRT_REG_WORD(&reg->pcr, 0x2100); 660 WRT_REG_WORD(&reg->pcr, 0x2100);
661 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 661 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
662 for (cnt = 0; cnt < sizeof(fw->risc_gp1_reg) / 2; cnt++) 662 for (cnt = 0; cnt < sizeof(fw->risc_gp1_reg) / 2; cnt++)
663 fw->risc_gp1_reg[cnt] = RD_REG_WORD(dmp_reg++); 663 fw->risc_gp1_reg[cnt] = RD_REG_WORD(dmp_reg++);
664 664
665 WRT_REG_WORD(&reg->pcr, 0x2200); 665 WRT_REG_WORD(&reg->pcr, 0x2200);
666 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 666 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
667 for (cnt = 0; cnt < sizeof(fw->risc_gp2_reg) / 2; cnt++) 667 for (cnt = 0; cnt < sizeof(fw->risc_gp2_reg) / 2; cnt++)
668 fw->risc_gp2_reg[cnt] = RD_REG_WORD(dmp_reg++); 668 fw->risc_gp2_reg[cnt] = RD_REG_WORD(dmp_reg++);
669 669
670 WRT_REG_WORD(&reg->pcr, 0x2300); 670 WRT_REG_WORD(&reg->pcr, 0x2300);
671 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 671 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
672 for (cnt = 0; cnt < sizeof(fw->risc_gp3_reg) / 2; cnt++) 672 for (cnt = 0; cnt < sizeof(fw->risc_gp3_reg) / 2; cnt++)
673 fw->risc_gp3_reg[cnt] = RD_REG_WORD(dmp_reg++); 673 fw->risc_gp3_reg[cnt] = RD_REG_WORD(dmp_reg++);
674 674
675 WRT_REG_WORD(&reg->pcr, 0x2400); 675 WRT_REG_WORD(&reg->pcr, 0x2400);
676 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 676 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
677 for (cnt = 0; cnt < sizeof(fw->risc_gp4_reg) / 2; cnt++) 677 for (cnt = 0; cnt < sizeof(fw->risc_gp4_reg) / 2; cnt++)
678 fw->risc_gp4_reg[cnt] = RD_REG_WORD(dmp_reg++); 678 fw->risc_gp4_reg[cnt] = RD_REG_WORD(dmp_reg++);
679 679
680 WRT_REG_WORD(&reg->pcr, 0x2500); 680 WRT_REG_WORD(&reg->pcr, 0x2500);
681 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 681 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
682 for (cnt = 0; cnt < sizeof(fw->risc_gp5_reg) / 2; cnt++) 682 for (cnt = 0; cnt < sizeof(fw->risc_gp5_reg) / 2; cnt++)
683 fw->risc_gp5_reg[cnt] = RD_REG_WORD(dmp_reg++); 683 fw->risc_gp5_reg[cnt] = RD_REG_WORD(dmp_reg++);
684 684
685 WRT_REG_WORD(&reg->pcr, 0x2600); 685 WRT_REG_WORD(&reg->pcr, 0x2600);
686 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 686 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
687 for (cnt = 0; cnt < sizeof(fw->risc_gp6_reg) / 2; cnt++) 687 for (cnt = 0; cnt < sizeof(fw->risc_gp6_reg) / 2; cnt++)
688 fw->risc_gp6_reg[cnt] = RD_REG_WORD(dmp_reg++); 688 fw->risc_gp6_reg[cnt] = RD_REG_WORD(dmp_reg++);
689 689
690 WRT_REG_WORD(&reg->pcr, 0x2700); 690 WRT_REG_WORD(&reg->pcr, 0x2700);
691 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 691 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
692 for (cnt = 0; cnt < sizeof(fw->risc_gp7_reg) / 2; cnt++) 692 for (cnt = 0; cnt < sizeof(fw->risc_gp7_reg) / 2; cnt++)
693 fw->risc_gp7_reg[cnt] = RD_REG_WORD(dmp_reg++); 693 fw->risc_gp7_reg[cnt] = RD_REG_WORD(dmp_reg++);
694 694
695 WRT_REG_WORD(&reg->ctrl_status, 0x10); 695 WRT_REG_WORD(&reg->ctrl_status, 0x10);
696 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 696 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
697 for (cnt = 0; cnt < sizeof(fw->frame_buf_hdw_reg) / 2; cnt++) 697 for (cnt = 0; cnt < sizeof(fw->frame_buf_hdw_reg) / 2; cnt++)
698 fw->frame_buf_hdw_reg[cnt] = RD_REG_WORD(dmp_reg++); 698 fw->frame_buf_hdw_reg[cnt] = RD_REG_WORD(dmp_reg++);
699 699
700 WRT_REG_WORD(&reg->ctrl_status, 0x20); 700 WRT_REG_WORD(&reg->ctrl_status, 0x20);
701 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 701 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
702 for (cnt = 0; cnt < sizeof(fw->fpm_b0_reg) / 2; cnt++) 702 for (cnt = 0; cnt < sizeof(fw->fpm_b0_reg) / 2; cnt++)
703 fw->fpm_b0_reg[cnt] = RD_REG_WORD(dmp_reg++); 703 fw->fpm_b0_reg[cnt] = RD_REG_WORD(dmp_reg++);
704 704
705 WRT_REG_WORD(&reg->ctrl_status, 0x30); 705 WRT_REG_WORD(&reg->ctrl_status, 0x30);
706 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80); 706 dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
707 for (cnt = 0; cnt < sizeof(fw->fpm_b1_reg) / 2; cnt++) 707 for (cnt = 0; cnt < sizeof(fw->fpm_b1_reg) / 2; cnt++)
708 fw->fpm_b1_reg[cnt] = RD_REG_WORD(dmp_reg++); 708 fw->fpm_b1_reg[cnt] = RD_REG_WORD(dmp_reg++);
709 709
710 /* Reset the ISP. */ 710 /* Reset the ISP. */
@@ -723,7 +723,7 @@ qla2100_fw_dump(scsi_qla_host_t *ha, int hardware_locked)
723 if (rval == QLA_SUCCESS && (IS_QLA2200(ha) || (IS_QLA2100(ha) && 723 if (rval == QLA_SUCCESS && (IS_QLA2200(ha) || (IS_QLA2100(ha) &&
724 (RD_REG_WORD(&reg->mctr) & (BIT_1 | BIT_0)) != 0))) { 724 (RD_REG_WORD(&reg->mctr) & (BIT_1 | BIT_0)) != 0))) {
725 725
726 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC); 726 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
727 for (cnt = 30000; 727 for (cnt = 30000;
728 (RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0 && 728 (RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0 &&
729 rval == QLA_SUCCESS; cnt--) { 729 rval == QLA_SUCCESS; cnt--) {
@@ -964,7 +964,7 @@ qla_uprintf(char **uiter, char *fmt, ...)
964 int iter, len; 964 int iter, len;
965 char buf[128]; 965 char buf[128];
966 va_list args; 966 va_list args;
967 967
968 va_start(args, fmt); 968 va_start(args, fmt);
969 len = vsprintf(buf, fmt, args); 969 len = vsprintf(buf, fmt, args);
970 va_end(args); 970 va_end(args);
@@ -1913,8 +1913,8 @@ qla24xx_ascii_fw_dump(scsi_qla_host_t *ha)
1913/* Driver Debug Functions. */ 1913/* Driver Debug Functions. */
1914/****************************************************************************/ 1914/****************************************************************************/
1915 1915
1916void 1916void
1917qla2x00_dump_regs(scsi_qla_host_t *ha) 1917qla2x00_dump_regs(scsi_qla_host_t *ha)
1918{ 1918{
1919 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1919 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1920 1920
@@ -1935,7 +1935,7 @@ qla2x00_dump_regs(scsi_qla_host_t *ha)
1935 1935
1936 1936
1937void 1937void
1938qla2x00_dump_buffer(uint8_t * b, uint32_t size) 1938qla2x00_dump_buffer(uint8_t * b, uint32_t size)
1939{ 1939{
1940 uint32_t cnt; 1940 uint32_t cnt;
1941 uint8_t c; 1941 uint8_t c;
@@ -1961,11 +1961,11 @@ qla2x00_dump_buffer(uint8_t * b, uint32_t size)
1961/************************************************************************** 1961/**************************************************************************
1962 * qla2x00_print_scsi_cmd 1962 * qla2x00_print_scsi_cmd
1963 * Dumps out info about the scsi cmd and srb. 1963 * Dumps out info about the scsi cmd and srb.
1964 * Input 1964 * Input
1965 * cmd : struct scsi_cmnd 1965 * cmd : struct scsi_cmnd
1966 **************************************************************************/ 1966 **************************************************************************/
1967void 1967void
1968qla2x00_print_scsi_cmd(struct scsi_cmnd * cmd) 1968qla2x00_print_scsi_cmd(struct scsi_cmnd * cmd)
1969{ 1969{
1970 int i; 1970 int i;
1971 struct scsi_qla_host *ha; 1971 struct scsi_qla_host *ha;
@@ -1988,7 +1988,7 @@ qla2x00_print_scsi_cmd(struct scsi_cmnd * cmd)
1988 cmd->request_buffer, cmd->request_bufflen); 1988 cmd->request_buffer, cmd->request_bufflen);
1989 printk(" tag=%d, transfersize=0x%x\n", 1989 printk(" tag=%d, transfersize=0x%x\n",
1990 cmd->tag, cmd->transfersize); 1990 cmd->tag, cmd->transfersize);
1991 printk(" serial_number=%lx, SP=%p\n", cmd->serial_number, sp); 1991 printk(" serial_number=%lx, SP=%p\n", cmd->serial_number, sp);
1992 printk(" data direction=%d\n", cmd->sc_data_direction); 1992 printk(" data direction=%d\n", cmd->sc_data_direction);
1993 1993
1994 if (!sp) 1994 if (!sp)
@@ -2025,8 +2025,8 @@ qla2x00_dump_pkt(void *pkt)
2025 * count = number of words. 2025 * count = number of words.
2026 */ 2026 */
2027void 2027void
2028qla2x00_formatted_dump_buffer(char *string, uint8_t * buffer, 2028qla2x00_formatted_dump_buffer(char *string, uint8_t * buffer,
2029 uint8_t wd_size, uint32_t count) 2029 uint8_t wd_size, uint32_t count)
2030{ 2030{
2031 uint32_t cnt; 2031 uint32_t cnt;
2032 uint16_t *buf16; 2032 uint16_t *buf16;