diff options
author | Christoph Hellwig <hch@lst.de> | 2005-07-04 11:48:55 -0400 |
---|---|---|
committer | James Bottomley <jejb@mulgrave.(none)> | 2005-08-02 12:43:50 -0400 |
commit | 0888f4c3312847eec4814a6d7cdcaaaa9fbd3345 (patch) | |
tree | 1266e52875e27c859c14f42731854c70b60c6582 /drivers/scsi/qla1280.c | |
parent | 5c79d6154f335543ea4c4a555f645a1f76b5d117 (diff) |
[SCSI] qla1280: don't use bitfields for hardware access in isp_config
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Thiemo Seufer <ths@linux-mips.org>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'drivers/scsi/qla1280.c')
-rw-r--r-- | drivers/scsi/qla1280.c | 44 |
1 files changed, 29 insertions, 15 deletions
diff --git a/drivers/scsi/qla1280.c b/drivers/scsi/qla1280.c index 9f975f7c1ea8..1a8b1147821d 100644 --- a/drivers/scsi/qla1280.c +++ b/drivers/scsi/qla1280.c | |||
@@ -2189,9 +2189,9 @@ qla1280_set_defaults(struct scsi_qla_host *ha) | |||
2189 | /* nv->cntr_flags_1.disable_loading_risc_code = 1; */ | 2189 | /* nv->cntr_flags_1.disable_loading_risc_code = 1; */ |
2190 | nv->firmware_feature.f.enable_fast_posting = 1; | 2190 | nv->firmware_feature.f.enable_fast_posting = 1; |
2191 | nv->firmware_feature.f.disable_synchronous_backoff = 1; | 2191 | nv->firmware_feature.f.disable_synchronous_backoff = 1; |
2192 | nv->termination.f.scsi_bus_0_control = 3; | 2192 | nv->termination.scsi_bus_0_control = 3; |
2193 | nv->termination.f.scsi_bus_1_control = 3; | 2193 | nv->termination.scsi_bus_1_control = 3; |
2194 | nv->termination.f.auto_term_support = 1; | 2194 | nv->termination.auto_term_support = 1; |
2195 | 2195 | ||
2196 | /* | 2196 | /* |
2197 | * Set default FIFO magic - What appropriate values would be here | 2197 | * Set default FIFO magic - What appropriate values would be here |
@@ -2201,7 +2201,12 @@ qla1280_set_defaults(struct scsi_qla_host *ha) | |||
2201 | * header file provided by QLogic seems to be bogus or incomplete | 2201 | * header file provided by QLogic seems to be bogus or incomplete |
2202 | * at best. | 2202 | * at best. |
2203 | */ | 2203 | */ |
2204 | nv->isp_config.c = ISP_CFG1_BENAB|ISP_CFG1_F128; | 2204 | nv->isp_config.burst_enable = 1; |
2205 | if (IS_ISP1040(ha)) | ||
2206 | nv->isp_config.fifo_threshold |= 3; | ||
2207 | else | ||
2208 | nv->isp_config.fifo_threshold |= 4; | ||
2209 | |||
2205 | if (IS_ISP1x160(ha)) | 2210 | if (IS_ISP1x160(ha)) |
2206 | nv->isp_parameter = 0x01; /* fast memory enable */ | 2211 | nv->isp_parameter = 0x01; /* fast memory enable */ |
2207 | 2212 | ||
@@ -2362,31 +2367,40 @@ qla1280_nvram_config(struct scsi_qla_host *ha) | |||
2362 | 2367 | ||
2363 | hwrev = RD_REG_WORD(®->cfg_0) & ISP_CFG0_HWMSK; | 2368 | hwrev = RD_REG_WORD(®->cfg_0) & ISP_CFG0_HWMSK; |
2364 | 2369 | ||
2365 | cfg1 = RD_REG_WORD(®->cfg_1); | 2370 | cfg1 = RD_REG_WORD(®->cfg_1) & ~(BIT_4 | BIT_5 | BIT_6); |
2366 | cdma_conf = RD_REG_WORD(®->cdma_cfg); | 2371 | cdma_conf = RD_REG_WORD(®->cdma_cfg); |
2367 | ddma_conf = RD_REG_WORD(®->ddma_cfg); | 2372 | ddma_conf = RD_REG_WORD(®->ddma_cfg); |
2368 | 2373 | ||
2369 | /* Busted fifo, says mjacob. */ | 2374 | /* Busted fifo, says mjacob. */ |
2370 | if (hwrev == ISP_CFG0_1040A) | 2375 | if (hwrev != ISP_CFG0_1040A) |
2371 | WRT_REG_WORD(®->cfg_1, cfg1 | ISP_CFG1_F64); | 2376 | cfg1 |= nv->isp_config.fifo_threshold << 4; |
2372 | else | 2377 | |
2373 | WRT_REG_WORD(®->cfg_1, cfg1 | ISP_CFG1_F64 | ISP_CFG1_BENAB); | 2378 | cfg1 |= nv->isp_config.burst_enable << 2; |
2379 | WRT_REG_WORD(®->cfg_1, cfg1); | ||
2374 | 2380 | ||
2375 | WRT_REG_WORD(®->cdma_cfg, cdma_conf | CDMA_CONF_BENAB); | 2381 | WRT_REG_WORD(®->cdma_cfg, cdma_conf | CDMA_CONF_BENAB); |
2376 | WRT_REG_WORD(®->ddma_cfg, cdma_conf | DDMA_CONF_BENAB); | 2382 | WRT_REG_WORD(®->ddma_cfg, cdma_conf | DDMA_CONF_BENAB); |
2377 | } else { | 2383 | } else { |
2384 | uint16_t cfg1, term; | ||
2385 | |||
2378 | /* Set ISP hardware DMA burst */ | 2386 | /* Set ISP hardware DMA burst */ |
2379 | mb[0] = nv->isp_config.c; | 2387 | cfg1 = nv->isp_config.fifo_threshold << 4; |
2388 | cfg1 |= nv->isp_config.burst_enable << 2; | ||
2380 | /* Enable DMA arbitration on dual channel controllers */ | 2389 | /* Enable DMA arbitration on dual channel controllers */ |
2381 | if (ha->ports > 1) | 2390 | if (ha->ports > 1) |
2382 | mb[0] |= BIT_13; | 2391 | cfg1 |= BIT_13; |
2383 | WRT_REG_WORD(®->cfg_1, mb[0]); | 2392 | WRT_REG_WORD(®->cfg_1, cfg1); |
2384 | 2393 | ||
2385 | /* Set SCSI termination. */ | 2394 | /* Set SCSI termination. */ |
2386 | WRT_REG_WORD(®->gpio_enable, (BIT_3 + BIT_2 + BIT_1 + BIT_0)); | 2395 | WRT_REG_WORD(®->gpio_enable, |
2387 | mb[0] = nv->termination.c & (BIT_3 + BIT_2 + BIT_1 + BIT_0); | 2396 | BIT_7 | BIT_3 | BIT_2 | BIT_1 | BIT_0); |
2388 | WRT_REG_WORD(®->gpio_data, mb[0]); | 2397 | term = nv->termination.scsi_bus_1_control; |
2398 | term |= nv->termination.scsi_bus_0_control << 2; | ||
2399 | term |= nv->termination.auto_term_support << 7; | ||
2400 | RD_REG_WORD(®->id_l); /* Flush PCI write */ | ||
2401 | WRT_REG_WORD(®->gpio_data, term); | ||
2389 | } | 2402 | } |
2403 | RD_REG_WORD(®->id_l); /* Flush PCI write */ | ||
2390 | 2404 | ||
2391 | /* ISP parameter word. */ | 2405 | /* ISP parameter word. */ |
2392 | mb[0] = MBC_SET_SYSTEM_PARAMETER; | 2406 | mb[0] = MBC_SET_SYSTEM_PARAMETER; |