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authorjack wang <jack_wang@usish.com>2009-10-14 04:19:21 -0400
committerJames Bottomley <James.Bottomley@suse.de>2009-12-04 13:00:40 -0500
commitdbf9bfe615717d1145f263c0049fe2328e6ed395 (patch)
treeae69b6f6cb4a15e15c59552f520c0f06209615ab /drivers/scsi/pm8001/pm8001_init.c
parent35e6601903fc41e48e9b6722a49cc5acc7065c51 (diff)
[SCSI] pm8001: add SAS/SATA HBA driver
This driver supports PMC-Sierra PCIe SAS/SATA 8x6G SPC 8001 chip based host adapters. Signed-off-by: Jack Wang <jack_wang@usish.com> Signed-off-by: Lindar Liu <lindar_liu@usish.com> Signed-off-by: Tom Peng <tom_peng@usish.com> Signed-off-by: Kevin Ao <aoqingyun@usish.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'drivers/scsi/pm8001/pm8001_init.c')
-rw-r--r--drivers/scsi/pm8001/pm8001_init.c888
1 files changed, 888 insertions, 0 deletions
diff --git a/drivers/scsi/pm8001/pm8001_init.c b/drivers/scsi/pm8001/pm8001_init.c
new file mode 100644
index 000000000000..811b5d36d5f0
--- /dev/null
+++ b/drivers/scsi/pm8001/pm8001_init.c
@@ -0,0 +1,888 @@
1/*
2 * PMC-Sierra SPC 8001 SAS/SATA based host adapters driver
3 *
4 * Copyright (c) 2008-2009 USI Co., Ltd.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 * substantially similar to the "NO WARRANTY" disclaimer below
15 * ("Disclaimer") and any redistribution must be conditioned upon
16 * including a substantially similar Disclaimer requirement for further
17 * binary redistribution.
18 * 3. Neither the names of the above-listed copyright holders nor the names
19 * of any contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * Alternatively, this software may be distributed under the terms of the
23 * GNU General Public License ("GPL") version 2 as published by the Free
24 * Software Foundation.
25 *
26 * NO WARRANTY
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
35 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
36 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGES.
38 *
39 */
40
41#include "pm8001_sas.h"
42#include "pm8001_chips.h"
43
44static struct scsi_transport_template *pm8001_stt;
45
46static const struct pm8001_chip_info pm8001_chips[] = {
47 [chip_8001] = { 8, &pm8001_8001_dispatch,},
48};
49static int pm8001_id;
50
51LIST_HEAD(hba_list);
52
53/**
54 * The main structure which LLDD must register for scsi core.
55 */
56static struct scsi_host_template pm8001_sht = {
57 .module = THIS_MODULE,
58 .name = DRV_NAME,
59 .queuecommand = sas_queuecommand,
60 .target_alloc = sas_target_alloc,
61 .slave_configure = pm8001_slave_configure,
62 .slave_destroy = sas_slave_destroy,
63 .scan_finished = pm8001_scan_finished,
64 .scan_start = pm8001_scan_start,
65 .change_queue_depth = sas_change_queue_depth,
66 .change_queue_type = sas_change_queue_type,
67 .bios_param = sas_bios_param,
68 .can_queue = 1,
69 .cmd_per_lun = 1,
70 .this_id = -1,
71 .sg_tablesize = SG_ALL,
72 .max_sectors = SCSI_DEFAULT_MAX_SECTORS,
73 .use_clustering = ENABLE_CLUSTERING,
74 .eh_device_reset_handler = sas_eh_device_reset_handler,
75 .eh_bus_reset_handler = sas_eh_bus_reset_handler,
76 .slave_alloc = pm8001_slave_alloc,
77 .target_destroy = sas_target_destroy,
78 .ioctl = sas_ioctl,
79 .shost_attrs = pm8001_host_attrs,
80};
81
82/**
83 * Sas layer call this function to execute specific task.
84 */
85static struct sas_domain_function_template pm8001_transport_ops = {
86 .lldd_dev_found = pm8001_dev_found,
87 .lldd_dev_gone = pm8001_dev_gone,
88
89 .lldd_execute_task = pm8001_queue_command,
90 .lldd_control_phy = pm8001_phy_control,
91
92 .lldd_abort_task = pm8001_abort_task,
93 .lldd_abort_task_set = pm8001_abort_task_set,
94 .lldd_clear_aca = pm8001_clear_aca,
95 .lldd_clear_task_set = pm8001_clear_task_set,
96 .lldd_I_T_nexus_reset = pm8001_I_T_nexus_reset,
97 .lldd_lu_reset = pm8001_lu_reset,
98 .lldd_query_task = pm8001_query_task,
99};
100
101/**
102 *pm8001_phy_init - initiate our adapter phys
103 *@pm8001_ha: our hba structure.
104 *@phy_id: phy id.
105 */
106static void __devinit pm8001_phy_init(struct pm8001_hba_info *pm8001_ha,
107 int phy_id)
108{
109 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
110 struct asd_sas_phy *sas_phy = &phy->sas_phy;
111 phy->phy_state = 0;
112 phy->pm8001_ha = pm8001_ha;
113 sas_phy->enabled = (phy_id < pm8001_ha->chip->n_phy) ? 1 : 0;
114 sas_phy->class = SAS;
115 sas_phy->iproto = SAS_PROTOCOL_ALL;
116 sas_phy->tproto = 0;
117 sas_phy->type = PHY_TYPE_PHYSICAL;
118 sas_phy->role = PHY_ROLE_INITIATOR;
119 sas_phy->oob_mode = OOB_NOT_CONNECTED;
120 sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN;
121 sas_phy->id = phy_id;
122 sas_phy->sas_addr = &pm8001_ha->sas_addr[0];
123 sas_phy->frame_rcvd = &phy->frame_rcvd[0];
124 sas_phy->ha = (struct sas_ha_struct *)pm8001_ha->shost->hostdata;
125 sas_phy->lldd_phy = phy;
126}
127
128/**
129 *pm8001_free - free hba
130 *@pm8001_ha: our hba structure.
131 *
132 */
133static void pm8001_free(struct pm8001_hba_info *pm8001_ha)
134{
135 int i;
136 struct pm8001_wq *wq;
137
138 if (!pm8001_ha)
139 return;
140
141 for (i = 0; i < USI_MAX_MEMCNT; i++) {
142 if (pm8001_ha->memoryMap.region[i].virt_ptr != NULL) {
143 pci_free_consistent(pm8001_ha->pdev,
144 pm8001_ha->memoryMap.region[i].element_size,
145 pm8001_ha->memoryMap.region[i].virt_ptr,
146 pm8001_ha->memoryMap.region[i].phys_addr);
147 }
148 }
149 PM8001_CHIP_DISP->chip_iounmap(pm8001_ha);
150 if (pm8001_ha->shost)
151 scsi_host_put(pm8001_ha->shost);
152 list_for_each_entry(wq, &pm8001_ha->wq_list, entry)
153 cancel_delayed_work(&wq->work_q);
154 kfree(pm8001_ha->tags);
155 kfree(pm8001_ha);
156}
157
158#ifdef PM8001_USE_TASKLET
159static void pm8001_tasklet(unsigned long opaque)
160{
161 struct pm8001_hba_info *pm8001_ha;
162 pm8001_ha = (struct pm8001_hba_info *)opaque;;
163 if (unlikely(!pm8001_ha))
164 BUG_ON(1);
165 PM8001_CHIP_DISP->isr(pm8001_ha);
166}
167#endif
168
169
170 /**
171 * pm8001_interrupt - when HBA originate a interrupt,we should invoke this
172 * dispatcher to handle each case.
173 * @irq: irq number.
174 * @opaque: the passed general host adapter struct
175 */
176static irqreturn_t pm8001_interrupt(int irq, void *opaque)
177{
178 struct pm8001_hba_info *pm8001_ha;
179 irqreturn_t ret = IRQ_HANDLED;
180 struct sas_ha_struct *sha = opaque;
181 pm8001_ha = sha->lldd_ha;
182 if (unlikely(!pm8001_ha))
183 return IRQ_NONE;
184 if (!PM8001_CHIP_DISP->is_our_interupt(pm8001_ha))
185 return IRQ_NONE;
186#ifdef PM8001_USE_TASKLET
187 tasklet_schedule(&pm8001_ha->tasklet);
188#else
189 ret = PM8001_CHIP_DISP->isr(pm8001_ha);
190#endif
191 return ret;
192}
193
194/**
195 * pm8001_alloc - initiate our hba structure and 6 DMAs area.
196 * @pm8001_ha:our hba structure.
197 *
198 */
199static int __devinit pm8001_alloc(struct pm8001_hba_info *pm8001_ha)
200{
201 int i;
202 spin_lock_init(&pm8001_ha->lock);
203 for (i = 0; i < pm8001_ha->chip->n_phy; i++)
204 pm8001_phy_init(pm8001_ha, i);
205
206 pm8001_ha->tags = kmalloc(sizeof(*pm8001_ha->tags)*PM8001_MAX_DEVICES,
207 GFP_KERNEL);
208
209 /* MPI Memory region 1 for AAP Event Log for fw */
210 pm8001_ha->memoryMap.region[AAP1].num_elements = 1;
211 pm8001_ha->memoryMap.region[AAP1].element_size = PM8001_EVENT_LOG_SIZE;
212 pm8001_ha->memoryMap.region[AAP1].total_len = PM8001_EVENT_LOG_SIZE;
213 pm8001_ha->memoryMap.region[AAP1].alignment = 32;
214
215 /* MPI Memory region 2 for IOP Event Log for fw */
216 pm8001_ha->memoryMap.region[IOP].num_elements = 1;
217 pm8001_ha->memoryMap.region[IOP].element_size = PM8001_EVENT_LOG_SIZE;
218 pm8001_ha->memoryMap.region[IOP].total_len = PM8001_EVENT_LOG_SIZE;
219 pm8001_ha->memoryMap.region[IOP].alignment = 32;
220
221 /* MPI Memory region 3 for consumer Index of inbound queues */
222 pm8001_ha->memoryMap.region[CI].num_elements = 1;
223 pm8001_ha->memoryMap.region[CI].element_size = 4;
224 pm8001_ha->memoryMap.region[CI].total_len = 4;
225 pm8001_ha->memoryMap.region[CI].alignment = 4;
226
227 /* MPI Memory region 4 for producer Index of outbound queues */
228 pm8001_ha->memoryMap.region[PI].num_elements = 1;
229 pm8001_ha->memoryMap.region[PI].element_size = 4;
230 pm8001_ha->memoryMap.region[PI].total_len = 4;
231 pm8001_ha->memoryMap.region[PI].alignment = 4;
232
233 /* MPI Memory region 5 inbound queues */
234 pm8001_ha->memoryMap.region[IB].num_elements = 256;
235 pm8001_ha->memoryMap.region[IB].element_size = 64;
236 pm8001_ha->memoryMap.region[IB].total_len = 256 * 64;
237 pm8001_ha->memoryMap.region[IB].alignment = 64;
238
239 /* MPI Memory region 6 inbound queues */
240 pm8001_ha->memoryMap.region[OB].num_elements = 256;
241 pm8001_ha->memoryMap.region[OB].element_size = 64;
242 pm8001_ha->memoryMap.region[OB].total_len = 256 * 64;
243 pm8001_ha->memoryMap.region[OB].alignment = 64;
244
245 /* Memory region write DMA*/
246 pm8001_ha->memoryMap.region[NVMD].num_elements = 1;
247 pm8001_ha->memoryMap.region[NVMD].element_size = 4096;
248 pm8001_ha->memoryMap.region[NVMD].total_len = 4096;
249 /* Memory region for devices*/
250 pm8001_ha->memoryMap.region[DEV_MEM].num_elements = 1;
251 pm8001_ha->memoryMap.region[DEV_MEM].element_size = PM8001_MAX_DEVICES *
252 sizeof(struct pm8001_device);
253 pm8001_ha->memoryMap.region[DEV_MEM].total_len = PM8001_MAX_DEVICES *
254 sizeof(struct pm8001_device);
255
256 /* Memory region for ccb_info*/
257 pm8001_ha->memoryMap.region[CCB_MEM].num_elements = 1;
258 pm8001_ha->memoryMap.region[CCB_MEM].element_size = PM8001_MAX_CCB *
259 sizeof(struct pm8001_ccb_info);
260 pm8001_ha->memoryMap.region[CCB_MEM].total_len = PM8001_MAX_CCB *
261 sizeof(struct pm8001_ccb_info);
262
263 for (i = 0; i < USI_MAX_MEMCNT; i++) {
264 if (pm8001_mem_alloc(pm8001_ha->pdev,
265 &pm8001_ha->memoryMap.region[i].virt_ptr,
266 &pm8001_ha->memoryMap.region[i].phys_addr,
267 &pm8001_ha->memoryMap.region[i].phys_addr_hi,
268 &pm8001_ha->memoryMap.region[i].phys_addr_lo,
269 pm8001_ha->memoryMap.region[i].total_len,
270 pm8001_ha->memoryMap.region[i].alignment) != 0) {
271 PM8001_FAIL_DBG(pm8001_ha,
272 pm8001_printk("Mem%d alloc failed\n",
273 i));
274 goto err_out;
275 }
276 }
277
278 pm8001_ha->devices = pm8001_ha->memoryMap.region[DEV_MEM].virt_ptr;
279 for (i = 0; i < PM8001_MAX_DEVICES; i++) {
280 pm8001_ha->devices[i].dev_type = NO_DEVICE;
281 pm8001_ha->devices[i].id = i;
282 pm8001_ha->devices[i].device_id = PM8001_MAX_DEVICES;
283 pm8001_ha->devices[i].running_req = 0;
284 }
285 pm8001_ha->ccb_info = pm8001_ha->memoryMap.region[CCB_MEM].virt_ptr;
286 for (i = 0; i < PM8001_MAX_CCB; i++) {
287 pm8001_ha->ccb_info[i].ccb_dma_handle =
288 pm8001_ha->memoryMap.region[CCB_MEM].phys_addr +
289 i * sizeof(struct pm8001_ccb_info);
290 ++pm8001_ha->tags_num;
291 }
292 pm8001_ha->flags = PM8001F_INIT_TIME;
293 /* Initialize tags */
294 pm8001_tag_init(pm8001_ha);
295 return 0;
296err_out:
297 return 1;
298}
299
300/**
301 * pm8001_ioremap - remap the pci high physical address to kernal virtual
302 * address so that we can access them.
303 * @pm8001_ha:our hba structure.
304 */
305static int pm8001_ioremap(struct pm8001_hba_info *pm8001_ha)
306{
307 u32 bar;
308 u32 logicalBar = 0;
309 struct pci_dev *pdev;
310
311 pdev = pm8001_ha->pdev;
312 /* map pci mem (PMC pci base 0-3)*/
313 for (bar = 0; bar < 6; bar++) {
314 /*
315 ** logical BARs for SPC:
316 ** bar 0 and 1 - logical BAR0
317 ** bar 2 and 3 - logical BAR1
318 ** bar4 - logical BAR2
319 ** bar5 - logical BAR3
320 ** Skip the appropriate assignments:
321 */
322 if ((bar == 1) || (bar == 3))
323 continue;
324 if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) {
325 pm8001_ha->io_mem[logicalBar].membase =
326 pci_resource_start(pdev, bar);
327 pm8001_ha->io_mem[logicalBar].membase &=
328 (u32)PCI_BASE_ADDRESS_MEM_MASK;
329 pm8001_ha->io_mem[logicalBar].memsize =
330 pci_resource_len(pdev, bar);
331 pm8001_ha->io_mem[logicalBar].memvirtaddr =
332 ioremap(pm8001_ha->io_mem[logicalBar].membase,
333 pm8001_ha->io_mem[logicalBar].memsize);
334 PM8001_INIT_DBG(pm8001_ha,
335 pm8001_printk("PCI: bar %d, logicalBar %d "
336 "virt_addr=%lx,len=%d\n", bar, logicalBar,
337 (unsigned long)
338 pm8001_ha->io_mem[logicalBar].memvirtaddr,
339 pm8001_ha->io_mem[logicalBar].memsize));
340 } else {
341 pm8001_ha->io_mem[logicalBar].membase = 0;
342 pm8001_ha->io_mem[logicalBar].memsize = 0;
343 pm8001_ha->io_mem[logicalBar].memvirtaddr = 0;
344 }
345 logicalBar++;
346 }
347 return 0;
348}
349
350/**
351 * pm8001_pci_alloc - initialize our ha card structure
352 * @pdev: pci device.
353 * @ent: ent
354 * @shost: scsi host struct which has been initialized before.
355 */
356static struct pm8001_hba_info *__devinit
357pm8001_pci_alloc(struct pci_dev *pdev, u32 chip_id, struct Scsi_Host *shost)
358{
359 struct pm8001_hba_info *pm8001_ha;
360 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
361
362
363 pm8001_ha = sha->lldd_ha;
364 if (!pm8001_ha)
365 return NULL;
366
367 pm8001_ha->pdev = pdev;
368 pm8001_ha->dev = &pdev->dev;
369 pm8001_ha->chip_id = chip_id;
370 pm8001_ha->chip = &pm8001_chips[pm8001_ha->chip_id];
371 pm8001_ha->irq = pdev->irq;
372 pm8001_ha->sas = sha;
373 pm8001_ha->shost = shost;
374 pm8001_ha->id = pm8001_id++;
375 INIT_LIST_HEAD(&pm8001_ha->wq_list);
376 pm8001_ha->logging_level = 0x01;
377 sprintf(pm8001_ha->name, "%s%d", DRV_NAME, pm8001_ha->id);
378#ifdef PM8001_USE_TASKLET
379 tasklet_init(&pm8001_ha->tasklet, pm8001_tasklet,
380 (unsigned long)pm8001_ha);
381#endif
382 pm8001_ioremap(pm8001_ha);
383 if (!pm8001_alloc(pm8001_ha))
384 return pm8001_ha;
385 pm8001_free(pm8001_ha);
386 return NULL;
387}
388
389/**
390 * pci_go_44 - pm8001 specified, its DMA is 44 bit rather than 64 bit
391 * @pdev: pci device.
392 */
393static int pci_go_44(struct pci_dev *pdev)
394{
395 int rc;
396
397 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(44))) {
398 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(44));
399 if (rc) {
400 rc = pci_set_consistent_dma_mask(pdev,
401 DMA_BIT_MASK(32));
402 if (rc) {
403 dev_printk(KERN_ERR, &pdev->dev,
404 "44-bit DMA enable failed\n");
405 return rc;
406 }
407 }
408 } else {
409 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
410 if (rc) {
411 dev_printk(KERN_ERR, &pdev->dev,
412 "32-bit DMA enable failed\n");
413 return rc;
414 }
415 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
416 if (rc) {
417 dev_printk(KERN_ERR, &pdev->dev,
418 "32-bit consistent DMA enable failed\n");
419 return rc;
420 }
421 }
422 return rc;
423}
424
425/**
426 * pm8001_prep_sas_ha_init - allocate memory in general hba struct && init them.
427 * @shost: scsi host which has been allocated outside.
428 * @chip_info: our ha struct.
429 */
430static int __devinit pm8001_prep_sas_ha_init(struct Scsi_Host * shost,
431 const struct pm8001_chip_info *chip_info)
432{
433 int phy_nr, port_nr;
434 struct asd_sas_phy **arr_phy;
435 struct asd_sas_port **arr_port;
436 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
437
438 phy_nr = chip_info->n_phy;
439 port_nr = phy_nr;
440 memset(sha, 0x00, sizeof(*sha));
441 arr_phy = kcalloc(phy_nr, sizeof(void *), GFP_KERNEL);
442 if (!arr_phy)
443 goto exit;
444 arr_port = kcalloc(port_nr, sizeof(void *), GFP_KERNEL);
445 if (!arr_port)
446 goto exit_free2;
447
448 sha->sas_phy = arr_phy;
449 sha->sas_port = arr_port;
450 sha->lldd_ha = kzalloc(sizeof(struct pm8001_hba_info), GFP_KERNEL);
451 if (!sha->lldd_ha)
452 goto exit_free1;
453
454 shost->transportt = pm8001_stt;
455 shost->max_id = PM8001_MAX_DEVICES;
456 shost->max_lun = 8;
457 shost->max_channel = 0;
458 shost->unique_id = pm8001_id;
459 shost->max_cmd_len = 16;
460 shost->can_queue = PM8001_CAN_QUEUE;
461 shost->cmd_per_lun = 32;
462 return 0;
463exit_free1:
464 kfree(arr_port);
465exit_free2:
466 kfree(arr_phy);
467exit:
468 return -1;
469}
470
471/**
472 * pm8001_post_sas_ha_init - initialize general hba struct defined in libsas
473 * @shost: scsi host which has been allocated outside
474 * @chip_info: our ha struct.
475 */
476static void __devinit pm8001_post_sas_ha_init(struct Scsi_Host *shost,
477 const struct pm8001_chip_info *chip_info)
478{
479 int i = 0;
480 struct pm8001_hba_info *pm8001_ha;
481 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
482
483 pm8001_ha = sha->lldd_ha;
484 for (i = 0; i < chip_info->n_phy; i++) {
485 sha->sas_phy[i] = &pm8001_ha->phy[i].sas_phy;
486 sha->sas_port[i] = &pm8001_ha->port[i].sas_port;
487 }
488 sha->sas_ha_name = DRV_NAME;
489 sha->dev = pm8001_ha->dev;
490
491 sha->lldd_module = THIS_MODULE;
492 sha->sas_addr = &pm8001_ha->sas_addr[0];
493 sha->num_phys = chip_info->n_phy;
494 sha->lldd_max_execute_num = 1;
495 sha->lldd_queue_size = PM8001_CAN_QUEUE;
496 sha->core.shost = shost;
497}
498
499/**
500 * pm8001_init_sas_add - initialize sas address
501 * @chip_info: our ha struct.
502 *
503 * Currently we just set the fixed SAS address to our HBA,for manufacture,
504 * it should read from the EEPROM
505 */
506static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
507{
508 u8 i;
509#ifdef PM8001_READ_VPD
510 DECLARE_COMPLETION_ONSTACK(completion);
511 pm8001_ha->nvmd_completion = &completion;
512 PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, 0, 0);
513 wait_for_completion(&completion);
514 for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
515 memcpy(&pm8001_ha->phy[i].dev_sas_addr, pm8001_ha->sas_addr,
516 SAS_ADDR_SIZE);
517 PM8001_INIT_DBG(pm8001_ha,
518 pm8001_printk("phy %d sas_addr = %x \n", i,
519 (u64)pm8001_ha->phy[i].dev_sas_addr));
520 }
521#else
522 for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
523 pm8001_ha->phy[i].dev_sas_addr = 0x500e004010000004ULL;
524 pm8001_ha->phy[i].dev_sas_addr =
525 cpu_to_be64((u64)
526 (*(u64 *)&pm8001_ha->phy[i].dev_sas_addr));
527 }
528 memcpy(pm8001_ha->sas_addr, &pm8001_ha->phy[0].dev_sas_addr,
529 SAS_ADDR_SIZE);
530#endif
531}
532
533#ifdef PM8001_USE_MSIX
534/**
535 * pm8001_setup_msix - enable MSI-X interrupt
536 * @chip_info: our ha struct.
537 * @irq_handler: irq_handler
538 */
539static u32 pm8001_setup_msix(struct pm8001_hba_info *pm8001_ha,
540 irq_handler_t irq_handler)
541{
542 u32 i = 0, j = 0;
543 u32 number_of_intr = 1;
544 int flag = 0;
545 u32 max_entry;
546 int rc;
547 max_entry = sizeof(pm8001_ha->msix_entries) /
548 sizeof(pm8001_ha->msix_entries[0]);
549 flag |= IRQF_DISABLED;
550 for (i = 0; i < max_entry ; i++)
551 pm8001_ha->msix_entries[i].entry = i;
552 rc = pci_enable_msix(pm8001_ha->pdev, pm8001_ha->msix_entries,
553 number_of_intr);
554 pm8001_ha->number_of_intr = number_of_intr;
555 if (!rc) {
556 for (i = 0; i < number_of_intr; i++) {
557 if (request_irq(pm8001_ha->msix_entries[i].vector,
558 irq_handler, flag, DRV_NAME,
559 SHOST_TO_SAS_HA(pm8001_ha->shost))) {
560 for (j = 0; j < i; j++)
561 free_irq(
562 pm8001_ha->msix_entries[j].vector,
563 SHOST_TO_SAS_HA(pm8001_ha->shost));
564 pci_disable_msix(pm8001_ha->pdev);
565 break;
566 }
567 }
568 }
569 return rc;
570}
571#endif
572
573/**
574 * pm8001_request_irq - register interrupt
575 * @chip_info: our ha struct.
576 */
577static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha)
578{
579 struct pci_dev *pdev;
580 irq_handler_t irq_handler = pm8001_interrupt;
581 u32 rc;
582
583 pdev = pm8001_ha->pdev;
584
585#ifdef PM8001_USE_MSIX
586 if (pci_find_capability(pdev, PCI_CAP_ID_MSIX))
587 return pm8001_setup_msix(pm8001_ha, irq_handler);
588 else
589 goto intx;
590#endif
591
592intx:
593 /* intialize the INT-X interrupt */
594 rc = request_irq(pdev->irq, irq_handler, IRQF_SHARED, DRV_NAME,
595 SHOST_TO_SAS_HA(pm8001_ha->shost));
596 return rc;
597}
598
599/**
600 * pm8001_pci_probe - probe supported device
601 * @pdev: pci device which kernel has been prepared for.
602 * @ent: pci device id
603 *
604 * This function is the main initialization function, when register a new
605 * pci driver it is invoked, all struct an hardware initilization should be done
606 * here, also, register interrupt
607 */
608static int __devinit pm8001_pci_probe(struct pci_dev *pdev,
609 const struct pci_device_id *ent)
610{
611 unsigned int rc;
612 u32 pci_reg;
613 struct pm8001_hba_info *pm8001_ha;
614 struct Scsi_Host *shost = NULL;
615 const struct pm8001_chip_info *chip;
616
617 dev_printk(KERN_INFO, &pdev->dev,
618 "pm8001: driver version %s\n", DRV_VERSION);
619 rc = pci_enable_device(pdev);
620 if (rc)
621 goto err_out_enable;
622 pci_set_master(pdev);
623 /*
624 * Enable pci slot busmaster by setting pci command register.
625 * This is required by FW for Cyclone card.
626 */
627
628 pci_read_config_dword(pdev, PCI_COMMAND, &pci_reg);
629 pci_reg |= 0x157;
630 pci_write_config_dword(pdev, PCI_COMMAND, pci_reg);
631 rc = pci_request_regions(pdev, DRV_NAME);
632 if (rc)
633 goto err_out_disable;
634 rc = pci_go_44(pdev);
635 if (rc)
636 goto err_out_regions;
637
638 shost = scsi_host_alloc(&pm8001_sht, sizeof(void *));
639 if (!shost) {
640 rc = -ENOMEM;
641 goto err_out_regions;
642 }
643 chip = &pm8001_chips[ent->driver_data];
644 SHOST_TO_SAS_HA(shost) =
645 kcalloc(1, sizeof(struct sas_ha_struct), GFP_KERNEL);
646 if (!SHOST_TO_SAS_HA(shost)) {
647 rc = -ENOMEM;
648 goto err_out_free_host;
649 }
650
651 rc = pm8001_prep_sas_ha_init(shost, chip);
652 if (rc) {
653 rc = -ENOMEM;
654 goto err_out_free;
655 }
656 pci_set_drvdata(pdev, SHOST_TO_SAS_HA(shost));
657 pm8001_ha = pm8001_pci_alloc(pdev, chip_8001, shost);
658 if (!pm8001_ha) {
659 rc = -ENOMEM;
660 goto err_out_free;
661 }
662 list_add_tail(&pm8001_ha->list, &hba_list);
663 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd);
664 rc = PM8001_CHIP_DISP->chip_init(pm8001_ha);
665 if (rc)
666 goto err_out_ha_free;
667
668 rc = scsi_add_host(shost, &pdev->dev);
669 if (rc)
670 goto err_out_ha_free;
671 rc = pm8001_request_irq(pm8001_ha);
672 if (rc)
673 goto err_out_shost;
674
675 PM8001_CHIP_DISP->interrupt_enable(pm8001_ha);
676 pm8001_init_sas_add(pm8001_ha);
677 pm8001_post_sas_ha_init(shost, chip);
678 rc = sas_register_ha(SHOST_TO_SAS_HA(shost));
679 if (rc)
680 goto err_out_shost;
681 scsi_scan_host(pm8001_ha->shost);
682 return 0;
683
684err_out_shost:
685 scsi_remove_host(pm8001_ha->shost);
686err_out_ha_free:
687 pm8001_free(pm8001_ha);
688err_out_free:
689 kfree(SHOST_TO_SAS_HA(shost));
690err_out_free_host:
691 kfree(shost);
692err_out_regions:
693 pci_release_regions(pdev);
694err_out_disable:
695 pci_disable_device(pdev);
696err_out_enable:
697 return rc;
698}
699
700static void __devexit pm8001_pci_remove(struct pci_dev *pdev)
701{
702 struct sas_ha_struct *sha = pci_get_drvdata(pdev);
703 struct pm8001_hba_info *pm8001_ha;
704 int i;
705 pm8001_ha = sha->lldd_ha;
706 pci_set_drvdata(pdev, NULL);
707 sas_unregister_ha(sha);
708 sas_remove_host(pm8001_ha->shost);
709 list_del(&pm8001_ha->list);
710 scsi_remove_host(pm8001_ha->shost);
711 PM8001_CHIP_DISP->interrupt_disable(pm8001_ha);
712 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd);
713
714#ifdef PM8001_USE_MSIX
715 for (i = 0; i < pm8001_ha->number_of_intr; i++)
716 synchronize_irq(pm8001_ha->msix_entries[i].vector);
717 for (i = 0; i < pm8001_ha->number_of_intr; i++)
718 free_irq(pm8001_ha->msix_entries[i].vector, sha);
719 pci_disable_msix(pdev);
720#else
721 free_irq(pm8001_ha->irq, sha);
722#endif
723#ifdef PM8001_USE_TASKLET
724 tasklet_kill(&pm8001_ha->tasklet);
725#endif
726 pm8001_free(pm8001_ha);
727 kfree(sha->sas_phy);
728 kfree(sha->sas_port);
729 kfree(sha);
730 pci_release_regions(pdev);
731 pci_disable_device(pdev);
732}
733
734/**
735 * pm8001_pci_suspend - power management suspend main entry point
736 * @pdev: PCI device struct
737 * @state: PM state change to (usually PCI_D3)
738 *
739 * Returns 0 success, anything else error.
740 */
741static int pm8001_pci_suspend(struct pci_dev *pdev, pm_message_t state)
742{
743 struct sas_ha_struct *sha = pci_get_drvdata(pdev);
744 struct pm8001_hba_info *pm8001_ha;
745 int i , pos;
746 u32 device_state;
747 pm8001_ha = sha->lldd_ha;
748 flush_scheduled_work();
749 scsi_block_requests(pm8001_ha->shost);
750 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
751 if (pos == 0) {
752 printk(KERN_ERR " PCI PM not supported\n");
753 return -ENODEV;
754 }
755 PM8001_CHIP_DISP->interrupt_disable(pm8001_ha);
756 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd);
757#ifdef PM8001_USE_MSIX
758 for (i = 0; i < pm8001_ha->number_of_intr; i++)
759 synchronize_irq(pm8001_ha->msix_entries[i].vector);
760 for (i = 0; i < pm8001_ha->number_of_intr; i++)
761 free_irq(pm8001_ha->msix_entries[i].vector, sha);
762 pci_disable_msix(pdev);
763#else
764 free_irq(pm8001_ha->irq, sha);
765#endif
766#ifdef PM8001_USE_TASKLET
767 tasklet_kill(&pm8001_ha->tasklet);
768#endif
769 device_state = pci_choose_state(pdev, state);
770 pm8001_printk("pdev=0x%p, slot=%s, entering "
771 "operating state [D%d]\n", pdev,
772 pm8001_ha->name, device_state);
773 pci_save_state(pdev);
774 pci_disable_device(pdev);
775 pci_set_power_state(pdev, device_state);
776 return 0;
777}
778
779/**
780 * pm8001_pci_resume - power management resume main entry point
781 * @pdev: PCI device struct
782 *
783 * Returns 0 success, anything else error.
784 */
785static int pm8001_pci_resume(struct pci_dev *pdev)
786{
787 struct sas_ha_struct *sha = pci_get_drvdata(pdev);
788 struct pm8001_hba_info *pm8001_ha;
789 int rc;
790 u32 device_state;
791 pm8001_ha = sha->lldd_ha;
792 device_state = pdev->current_state;
793
794 pm8001_printk("pdev=0x%p, slot=%s, resuming from previous "
795 "operating state [D%d]\n", pdev, pm8001_ha->name, device_state);
796
797 pci_set_power_state(pdev, PCI_D0);
798 pci_enable_wake(pdev, PCI_D0, 0);
799 pci_restore_state(pdev);
800 rc = pci_enable_device(pdev);
801 if (rc) {
802 pm8001_printk("slot=%s Enable device failed during resume\n",
803 pm8001_ha->name);
804 goto err_out_enable;
805 }
806
807 pci_set_master(pdev);
808 rc = pci_go_44(pdev);
809 if (rc)
810 goto err_out_disable;
811
812 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd);
813 rc = PM8001_CHIP_DISP->chip_init(pm8001_ha);
814 if (rc)
815 goto err_out_disable;
816 PM8001_CHIP_DISP->interrupt_disable(pm8001_ha);
817 rc = pm8001_request_irq(pm8001_ha);
818 if (rc)
819 goto err_out_disable;
820 #ifdef PM8001_USE_TASKLET
821 tasklet_init(&pm8001_ha->tasklet, pm8001_tasklet,
822 (unsigned long)pm8001_ha);
823 #endif
824 PM8001_CHIP_DISP->interrupt_enable(pm8001_ha);
825 scsi_unblock_requests(pm8001_ha->shost);
826 return 0;
827
828err_out_disable:
829 scsi_remove_host(pm8001_ha->shost);
830 pci_disable_device(pdev);
831err_out_enable:
832 return rc;
833}
834
835static struct pci_device_id __devinitdata pm8001_pci_table[] = {
836 {
837 PCI_VDEVICE(PMC_Sierra, 0x8001), chip_8001
838 },
839 {
840 PCI_DEVICE(0x117c, 0x0042),
841 .driver_data = chip_8001
842 },
843 {} /* terminate list */
844};
845
846static struct pci_driver pm8001_pci_driver = {
847 .name = DRV_NAME,
848 .id_table = pm8001_pci_table,
849 .probe = pm8001_pci_probe,
850 .remove = __devexit_p(pm8001_pci_remove),
851 .suspend = pm8001_pci_suspend,
852 .resume = pm8001_pci_resume,
853};
854
855/**
856 * pm8001_init - initialize scsi transport template
857 */
858static int __init pm8001_init(void)
859{
860 int rc;
861 pm8001_id = 0;
862 pm8001_stt = sas_domain_attach_transport(&pm8001_transport_ops);
863 if (!pm8001_stt)
864 return -ENOMEM;
865 rc = pci_register_driver(&pm8001_pci_driver);
866 if (rc)
867 goto err_out;
868 return 0;
869err_out:
870 sas_release_transport(pm8001_stt);
871 return rc;
872}
873
874static void __exit pm8001_exit(void)
875{
876 pci_unregister_driver(&pm8001_pci_driver);
877 sas_release_transport(pm8001_stt);
878}
879
880module_init(pm8001_init);
881module_exit(pm8001_exit);
882
883MODULE_AUTHOR("Jack Wang <jack_wang@usish.com>");
884MODULE_DESCRIPTION("PMC-Sierra PM8001 SAS/SATA controller driver");
885MODULE_VERSION(DRV_VERSION);
886MODULE_LICENSE("GPL");
887MODULE_DEVICE_TABLE(pci, pm8001_pci_table);
888
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-20 17:54:14 -0500