diff options
author | Matt LaPlante <kernel1@cyberdogtech.com> | 2006-11-29 23:24:39 -0500 |
---|---|---|
committer | Adrian Bunk <bunk@stusta.de> | 2006-11-29 23:24:39 -0500 |
commit | 0779bf2d2ecc4d9b1e9437ae659f50e6776a7666 (patch) | |
tree | dbcc9735ab63a833056572c8f4f0efe911246562 /drivers/scsi/ncr53c8xx.h | |
parent | 3cb2fccc5f48a4d6269dfd00b4db570fca2a04d5 (diff) |
Fix misc .c/.h comment typos
Fix various .c/.h typos in comments (no code changes).
Signed-off-by: Matt LaPlante <kernel1@cyberdogtech.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Diffstat (limited to 'drivers/scsi/ncr53c8xx.h')
-rw-r--r-- | drivers/scsi/ncr53c8xx.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/scsi/ncr53c8xx.h b/drivers/scsi/ncr53c8xx.h index cb8b7701431e..b39357d9af8d 100644 --- a/drivers/scsi/ncr53c8xx.h +++ b/drivers/scsi/ncr53c8xx.h | |||
@@ -218,7 +218,7 @@ | |||
218 | ** Same as option 1, but also deal with | 218 | ** Same as option 1, but also deal with |
219 | ** misconfigured interrupts. | 219 | ** misconfigured interrupts. |
220 | ** | 220 | ** |
221 | ** - Edge triggerred instead of level sensitive. | 221 | ** - Edge triggered instead of level sensitive. |
222 | ** - No interrupt line connected. | 222 | ** - No interrupt line connected. |
223 | ** - IRQ number misconfigured. | 223 | ** - IRQ number misconfigured. |
224 | ** | 224 | ** |
@@ -549,7 +549,7 @@ struct ncr_driver_setup { | |||
549 | 549 | ||
550 | /* | 550 | /* |
551 | ** Initial setup. | 551 | ** Initial setup. |
552 | ** Can be overriden at startup by a command line. | 552 | ** Can be overridden at startup by a command line. |
553 | */ | 553 | */ |
554 | #define SCSI_NCR_DRIVER_SETUP \ | 554 | #define SCSI_NCR_DRIVER_SETUP \ |
555 | { \ | 555 | { \ |
@@ -1093,7 +1093,7 @@ struct scr_tblsel { | |||
1093 | **----------------------------------------------------------- | 1093 | **----------------------------------------------------------- |
1094 | ** On 810A, 860, 825A, 875, 895 and 896 chips the content | 1094 | ** On 810A, 860, 825A, 875, 895 and 896 chips the content |
1095 | ** of SFBR register can be used as data (SCR_SFBR_DATA). | 1095 | ** of SFBR register can be used as data (SCR_SFBR_DATA). |
1096 | ** The 896 has additionnal IO registers starting at | 1096 | ** The 896 has additional IO registers starting at |
1097 | ** offset 0x80. Bit 7 of register offset is stored in | 1097 | ** offset 0x80. Bit 7 of register offset is stored in |
1098 | ** bit 7 of the SCRIPTS instruction first DWORD. | 1098 | ** bit 7 of the SCRIPTS instruction first DWORD. |
1099 | **----------------------------------------------------------- | 1099 | **----------------------------------------------------------- |