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authorXiangliang Yu <yuxiangl@marvell.com>2011-05-24 10:38:10 -0400
committerJames Bottomley <JBottomley@Parallels.com>2011-07-26 02:39:09 -0400
commite144f7ef49ec85e9dfdf130f3a9a2372fe5fe39b (patch)
tree1500ee564c2ca4f230afa548bbb023b91ffd88fb /drivers/scsi/mvsas/mv_94xx.c
parent84fbd0cea11b80d7b7097343d5262004d42b8a9a (diff)
[SCSI] mvsas: update comments
Remove obsolete comments and add new comments Signed-off-by: Xiangliang Yu <yuxiangl@marvell.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi/mvsas/mv_94xx.c')
-rw-r--r--drivers/scsi/mvsas/mv_94xx.c19
1 files changed, 6 insertions, 13 deletions
diff --git a/drivers/scsi/mvsas/mv_94xx.c b/drivers/scsi/mvsas/mv_94xx.c
index 1276e494b868..f4a995c29eb1 100644
--- a/drivers/scsi/mvsas/mv_94xx.c
+++ b/drivers/scsi/mvsas/mv_94xx.c
@@ -460,13 +460,7 @@ static int __devinit mvs_94xx_init(struct mvs_info *mvi)
460 mvs_update_phyinfo(mvi, i, 1); 460 mvs_update_phyinfo(mvi, i, 1);
461 } 461 }
462 462
463 /* FIXME: update wide port bitmaps */
464
465 /* little endian for open address and command table, etc. */ 463 /* little endian for open address and command table, etc. */
466 /*
467 * it seems that ( from the spec ) turning on big-endian won't
468 * do us any good on big-endian machines, need further confirmation
469 */
470 cctl = mr32(MVS_CTL); 464 cctl = mr32(MVS_CTL);
471 cctl |= CCTL_ENDIAN_CMD; 465 cctl |= CCTL_ENDIAN_CMD;
472 cctl &= ~CCTL_ENDIAN_OPEN; 466 cctl &= ~CCTL_ENDIAN_OPEN;
@@ -478,8 +472,8 @@ static int __devinit mvs_94xx_init(struct mvs_info *mvi)
478 tmp |= PCS_CMD_RST; 472 tmp |= PCS_CMD_RST;
479 tmp &= ~PCS_SELF_CLEAR; 473 tmp &= ~PCS_SELF_CLEAR;
480 mw32(MVS_PCS, tmp); 474 mw32(MVS_PCS, tmp);
481 /* interrupt coalescing may cause missing HW interrput in some case, 475 /*
482 * and the max count is 0x1ff, while our max slot is 0x200, 476 * the max count is 0x1ff, while our max slot is 0x200,
483 * it will make count 0. 477 * it will make count 0.
484 */ 478 */
485 tmp = 0; 479 tmp = 0;
@@ -488,6 +482,7 @@ static int __devinit mvs_94xx_init(struct mvs_info *mvi)
488 else 482 else
489 mw32(MVS_INT_COAL, MVS_CHIP_SLOT_SZ | COAL_EN); 483 mw32(MVS_INT_COAL, MVS_CHIP_SLOT_SZ | COAL_EN);
490 484
485 /* default interrupt coalescing time is 128us */
491 tmp = 0x10000 | interrupt_coalescing; 486 tmp = 0x10000 | interrupt_coalescing;
492 mw32(MVS_INT_COAL_TMOUT, tmp); 487 mw32(MVS_INT_COAL_TMOUT, tmp);
493 488
@@ -745,7 +740,7 @@ static int mvs_94xx_oob_done(struct mvs_info *mvi, int i)
745{ 740{
746 u32 phy_st; 741 u32 phy_st;
747 phy_st = mvs_read_phy_ctl(mvi, i); 742 phy_st = mvs_read_phy_ctl(mvi, i);
748 if (phy_st & PHY_READY_MASK) /* phy ready */ 743 if (phy_st & PHY_READY_MASK)
749 return 1; 744 return 1;
750 return 0; 745 return 0;
751} 746}
@@ -770,7 +765,6 @@ static void mvs_94xx_get_att_identify_frame(struct mvs_info *mvi, int port_id,
770 int i; 765 int i;
771 u32 id_frame[7]; 766 u32 id_frame[7];
772 767
773 /* mvs_hexdump(28, (u8 *)id_frame, 0); */
774 for (i = 0; i < 7; i++) { 768 for (i = 0; i < 7; i++) {
775 mvs_write_port_cfg_addr(mvi, port_id, 769 mvs_write_port_cfg_addr(mvi, port_id,
776 CONFIG_ATT_ID_FRAME0 + i * 4); 770 CONFIG_ATT_ID_FRAME0 + i * 4);
@@ -778,7 +772,6 @@ static void mvs_94xx_get_att_identify_frame(struct mvs_info *mvi, int port_id,
778 mv_dprintk("94xx phy %d atta frame %d %x.\n", 772 mv_dprintk("94xx phy %d atta frame %d %x.\n",
779 port_id + mvi->id * mvi->chip->n_phy, i, id_frame[i]); 773 port_id + mvi->id * mvi->chip->n_phy, i, id_frame[i]);
780 } 774 }
781 /* mvs_hexdump(28, (u8 *)id_frame, 0); */
782 memcpy(id, id_frame, 28); 775 memcpy(id, id_frame, 28);
783} 776}
784 777
@@ -962,8 +955,8 @@ static void mvs_94xx_tune_interrupt(struct mvs_info *mvi, u32 time)
962{ 955{
963 void __iomem *regs = mvi->regs; 956 void __iomem *regs = mvi->regs;
964 u32 tmp = 0; 957 u32 tmp = 0;
965 /* interrupt coalescing may cause missing HW interrput in some case, 958 /*
966 * and the max count is 0x1ff, while our max slot is 0x200, 959 * the max count is 0x1ff, while our max slot is 0x200,
967 * it will make count 0. 960 * it will make count 0.
968 */ 961 */
969 if (time == 0) { 962 if (time == 0) {