aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h
diff options
context:
space:
mode:
authornagalakshmi.nandigama@lsi.com <nagalakshmi.nandigama@lsi.com>2011-11-30 21:22:49 -0500
committerJames Bottomley <JBottomley@Parallels.com>2011-12-15 01:57:38 -0500
commita6affbd5ccbb45e03168996bae4a4d0abb780874 (patch)
tree2ea14864487e3f04fa93567ce030811596acfd90 /drivers/scsi/mpt2sas/mpi/mpi2_ioc.h
parent8bad3055e902a16b7cf47777fc3e78a965d0b57a (diff)
[SCSI] mpt2sas: MPI next revision header update
1)Removed Power Management Control option for PCIe link. 2)Added RAID Action for performing a compatibility check. Added product-specific range to RAID Action values. 3)Added PhysicalPort field to SAS Device Status Change Event data. 4)Added SpinupFlags field containing a Disable Spin-up bit to the SpinupGroupParameters fields of SAS IO Unit Page 4. Signed-off-by: Nagalakshmi Nandigama <nagalakshmi.nandigama@lsi.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi/mpt2sas/mpi/mpi2_ioc.h')
-rw-r--r--drivers/scsi/mpt2sas/mpi/mpi2_ioc.h23
1 files changed, 13 insertions, 10 deletions
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h b/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h
index 7b53be83e7e3..9a925c07a9ec 100644
--- a/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h
+++ b/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h
@@ -6,7 +6,7 @@
6 * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages 6 * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
7 * Creation Date: October 11, 2006 7 * Creation Date: October 11, 2006
8 * 8 *
9 * mpi2_ioc.h Version: 02.00.18 9 * mpi2_ioc.h Version: 02.00.19
10 * 10 *
11 * Version History 11 * Version History
12 * --------------- 12 * ---------------
@@ -114,6 +114,9 @@
114 * MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC and 114 * MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC and
115 * MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC defines. 115 * MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC defines.
116 * Deprecated MPI2_EXT_IMAGE_TYPE_MAX define. 116 * Deprecated MPI2_EXT_IMAGE_TYPE_MAX define.
117 * 08-24-11 02.00.19 Added PhysicalPort field to
118 * MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE structure.
119 * Marked MPI2_PM_CONTROL_FEATURE_PCIE_LINK as obsolete.
117 * -------------------------------------------------------------------------- 120 * --------------------------------------------------------------------------
118 */ 121 */
119 122
@@ -582,7 +585,7 @@ typedef struct _MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
582{ 585{
583 U16 TaskTag; /* 0x00 */ 586 U16 TaskTag; /* 0x00 */
584 U8 ReasonCode; /* 0x02 */ 587 U8 ReasonCode; /* 0x02 */
585 U8 Reserved1; /* 0x03 */ 588 U8 PhysicalPort; /* 0x03 */
586 U8 ASC; /* 0x04 */ 589 U8 ASC; /* 0x04 */
587 U8 ASCQ; /* 0x05 */ 590 U8 ASCQ; /* 0x05 */
588 U16 DevHandle; /* 0x06 */ 591 U16 DevHandle; /* 0x06 */
@@ -1574,7 +1577,7 @@ typedef struct _MPI2_PWR_MGMT_CONTROL_REQUEST {
1574/* defines for the Feature field */ 1577/* defines for the Feature field */
1575#define MPI2_PM_CONTROL_FEATURE_DA_PHY_POWER_COND (0x01) 1578#define MPI2_PM_CONTROL_FEATURE_DA_PHY_POWER_COND (0x01)
1576#define MPI2_PM_CONTROL_FEATURE_PORT_WIDTH_MODULATION (0x02) 1579#define MPI2_PM_CONTROL_FEATURE_PORT_WIDTH_MODULATION (0x02)
1577#define MPI2_PM_CONTROL_FEATURE_PCIE_LINK (0x03) 1580#define MPI2_PM_CONTROL_FEATURE_PCIE_LINK (0x03) /* obsolete */
1578#define MPI2_PM_CONTROL_FEATURE_IOC_SPEED (0x04) 1581#define MPI2_PM_CONTROL_FEATURE_IOC_SPEED (0x04)
1579#define MPI2_PM_CONTROL_FEATURE_MIN_PRODUCT_SPECIFIC (0x80) 1582#define MPI2_PM_CONTROL_FEATURE_MIN_PRODUCT_SPECIFIC (0x80)
1580#define MPI2_PM_CONTROL_FEATURE_MAX_PRODUCT_SPECIFIC (0xFF) 1583#define MPI2_PM_CONTROL_FEATURE_MAX_PRODUCT_SPECIFIC (0xFF)
@@ -1603,14 +1606,14 @@ typedef struct _MPI2_PWR_MGMT_CONTROL_REQUEST {
1603 1606
1604/* parameter usage for the MPI2_PM_CONTROL_FEATURE_PCIE_LINK Feature */ 1607/* parameter usage for the MPI2_PM_CONTROL_FEATURE_PCIE_LINK Feature */
1605/* Parameter1 indicates desired PCIe link speed using these defines */ 1608/* Parameter1 indicates desired PCIe link speed using these defines */
1606#define MPI2_PM_CONTROL_PARAM1_PCIE_2_5_GBPS (0x00) 1609#define MPI2_PM_CONTROL_PARAM1_PCIE_2_5_GBPS (0x00) /* obsolete */
1607#define MPI2_PM_CONTROL_PARAM1_PCIE_5_0_GBPS (0x01) 1610#define MPI2_PM_CONTROL_PARAM1_PCIE_5_0_GBPS (0x01) /* obsolete */
1608#define MPI2_PM_CONTROL_PARAM1_PCIE_8_0_GBPS (0x02) 1611#define MPI2_PM_CONTROL_PARAM1_PCIE_8_0_GBPS (0x02) /* obsolete */
1609/* Parameter2 indicates desired PCIe link width using these defines */ 1612/* Parameter2 indicates desired PCIe link width using these defines */
1610#define MPI2_PM_CONTROL_PARAM2_WIDTH_X1 (0x01) 1613#define MPI2_PM_CONTROL_PARAM2_WIDTH_X1 (0x01) /* obsolete */
1611#define MPI2_PM_CONTROL_PARAM2_WIDTH_X2 (0x02) 1614#define MPI2_PM_CONTROL_PARAM2_WIDTH_X2 (0x02) /* obsolete */
1612#define MPI2_PM_CONTROL_PARAM2_WIDTH_X4 (0x04) 1615#define MPI2_PM_CONTROL_PARAM2_WIDTH_X4 (0x04) /* obsolete */
1613#define MPI2_PM_CONTROL_PARAM2_WIDTH_X8 (0x08) 1616#define MPI2_PM_CONTROL_PARAM2_WIDTH_X8 (0x08) /* obsolete */
1614/* Parameter3 and Parameter4 are reserved */ 1617/* Parameter3 and Parameter4 are reserved */
1615 1618
1616/* parameter usage for the MPI2_PM_CONTROL_FEATURE_IOC_SPEED Feature */ 1619/* parameter usage for the MPI2_PM_CONTROL_FEATURE_IOC_SPEED Feature */