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authorSumant Patro <sumantp@lsil.com>2006-02-03 18:34:35 -0500
committer <jejb@mulgrave.il.steeleye.com>2006-02-04 17:38:41 -0500
commitf9876f0b67c3f0b04ee2167602df54e7ae139ad7 (patch)
tree7d82ef9fa3e19f837c4aa69a0f168fbf5f6e8114 /drivers/scsi/megaraid
parent122da30223c06cee181044af6d32e88b256d10df (diff)
[SCSI] megaraid_sas: support for 1078 type controller added
This patch adds support for 1078 type controller (device id : 0x60). Signed-off-by: Sumant Patro <Sumant.Patro@lsil.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'drivers/scsi/megaraid')
-rw-r--r--drivers/scsi/megaraid/megaraid_sas.c98
-rw-r--r--drivers/scsi/megaraid/megaraid_sas.h49
2 files changed, 129 insertions, 18 deletions
diff --git a/drivers/scsi/megaraid/megaraid_sas.c b/drivers/scsi/megaraid/megaraid_sas.c
index 0b738243782e..7de267e14458 100644
--- a/drivers/scsi/megaraid/megaraid_sas.c
+++ b/drivers/scsi/megaraid/megaraid_sas.c
@@ -60,6 +60,12 @@ static struct pci_device_id megasas_pci_table[] = {
60 PCI_ANY_ID, 60 PCI_ANY_ID,
61 }, 61 },
62 { 62 {
63 PCI_VENDOR_ID_LSI_LOGIC,
64 PCI_DEVICE_ID_LSI_SAS1078R, // ppc IOP
65 PCI_ANY_ID,
66 PCI_ANY_ID,
67 },
68 {
63 PCI_VENDOR_ID_DELL, 69 PCI_VENDOR_ID_DELL,
64 PCI_DEVICE_ID_DELL_PERC5, // xscale IOP 70 PCI_DEVICE_ID_DELL_PERC5, // xscale IOP
65 PCI_ANY_ID, 71 PCI_ANY_ID,
@@ -199,6 +205,86 @@ static struct megasas_instance_template megasas_instance_template_xscale = {
199*/ 205*/
200 206
201/** 207/**
208* The following functions are defined for ppc (deviceid : 0x60)
209* controllers
210*/
211
212/**
213 * megasas_enable_intr_ppc - Enables interrupts
214 * @regs: MFI register set
215 */
216static inline void
217megasas_enable_intr_ppc(struct megasas_register_set __iomem * regs)
218{
219 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
220
221 writel(~0x80000004, &(regs)->outbound_intr_mask);
222
223 /* Dummy readl to force pci flush */
224 readl(&regs->outbound_intr_mask);
225}
226
227/**
228 * megasas_read_fw_status_reg_ppc - returns the current FW status value
229 * @regs: MFI register set
230 */
231static u32
232megasas_read_fw_status_reg_ppc(struct megasas_register_set __iomem * regs)
233{
234 return readl(&(regs)->outbound_scratch_pad);
235}
236
237/**
238 * megasas_clear_interrupt_ppc - Check & clear interrupt
239 * @regs: MFI register set
240 */
241static int
242megasas_clear_intr_ppc(struct megasas_register_set __iomem * regs)
243{
244 u32 status;
245 /*
246 * Check if it is our interrupt
247 */
248 status = readl(&regs->outbound_intr_status);
249
250 if (!(status & MFI_REPLY_1078_MESSAGE_INTERRUPT)) {
251 return 1;
252 }
253
254 /*
255 * Clear the interrupt by writing back the same value
256 */
257 writel(status, &regs->outbound_doorbell_clear);
258
259 return 0;
260}
261/**
262 * megasas_fire_cmd_ppc - Sends command to the FW
263 * @frame_phys_addr : Physical address of cmd
264 * @frame_count : Number of frames for the command
265 * @regs : MFI register set
266 */
267static inline void
268megasas_fire_cmd_ppc(dma_addr_t frame_phys_addr, u32 frame_count, struct megasas_register_set __iomem *regs)
269{
270 writel((frame_phys_addr | (frame_count<<1))|1,
271 &(regs)->inbound_queue_port);
272}
273
274static struct megasas_instance_template megasas_instance_template_ppc = {
275
276 .fire_cmd = megasas_fire_cmd_ppc,
277 .enable_intr = megasas_enable_intr_ppc,
278 .clear_intr = megasas_clear_intr_ppc,
279 .read_fw_status_reg = megasas_read_fw_status_reg_ppc,
280};
281
282/**
283* This is the end of set of functions & definitions
284* specific to ppc (deviceid : 0x60) controllers
285*/
286
287/**
202 * megasas_disable_intr - Disables interrupts 288 * megasas_disable_intr - Disables interrupts
203 * @regs: MFI register set 289 * @regs: MFI register set
204 */ 290 */
@@ -1607,7 +1693,17 @@ static int megasas_init_mfi(struct megasas_instance *instance)
1607 1693
1608 reg_set = instance->reg_set; 1694 reg_set = instance->reg_set;
1609 1695
1610 instance->instancet = &megasas_instance_template_xscale; 1696 switch(instance->pdev->device)
1697 {
1698 case PCI_DEVICE_ID_LSI_SAS1078R:
1699 instance->instancet = &megasas_instance_template_ppc;
1700 break;
1701 case PCI_DEVICE_ID_LSI_SAS1064R:
1702 case PCI_DEVICE_ID_DELL_PERC5:
1703 default:
1704 instance->instancet = &megasas_instance_template_xscale;
1705 break;
1706 }
1611 1707
1612 /* 1708 /*
1613 * We expect the FW state to be READY 1709 * We expect the FW state to be READY
diff --git a/drivers/scsi/megaraid/megaraid_sas.h b/drivers/scsi/megaraid/megaraid_sas.h
index 917326f3770e..89639f0c38ef 100644
--- a/drivers/scsi/megaraid/megaraid_sas.h
+++ b/drivers/scsi/megaraid/megaraid_sas.h
@@ -20,7 +20,7 @@
20 */ 20 */
21#define MEGASAS_VERSION "00.00.02.04" 21#define MEGASAS_VERSION "00.00.02.04"
22#define MEGASAS_RELDATE "Feb 03, 2006" 22#define MEGASAS_RELDATE "Feb 03, 2006"
23#define MEGASAS_EXT_VERSION "Fri Feb 03 14:16:25 PST 2006" 23#define MEGASAS_EXT_VERSION "Fri Feb 03 14:31:44 PST 2006"
24/* 24/*
25 * ===================================== 25 * =====================================
26 * MegaRAID SAS MFI firmware definitions 26 * MegaRAID SAS MFI firmware definitions
@@ -553,31 +553,46 @@ struct megasas_ctrl_info {
553#define MFI_OB_INTR_STATUS_MASK 0x00000002 553#define MFI_OB_INTR_STATUS_MASK 0x00000002
554#define MFI_POLL_TIMEOUT_SECS 10 554#define MFI_POLL_TIMEOUT_SECS 10
555 555
556#define MFI_REPLY_1078_MESSAGE_INTERRUPT 0x80000000
557#define PCI_DEVICE_ID_LSI_SAS1078R 0x00000060
558
556struct megasas_register_set { 559struct megasas_register_set {
560 u32 reserved_0[4]; /*0000h*/
557 561
558 u32 reserved_0[4]; /*0000h */ 562 u32 inbound_msg_0; /*0010h*/
563 u32 inbound_msg_1; /*0014h*/
564 u32 outbound_msg_0; /*0018h*/
565 u32 outbound_msg_1; /*001Ch*/
559 566
560 u32 inbound_msg_0; /*0010h */ 567 u32 inbound_doorbell; /*0020h*/
561 u32 inbound_msg_1; /*0014h */ 568 u32 inbound_intr_status; /*0024h*/
562 u32 outbound_msg_0; /*0018h */ 569 u32 inbound_intr_mask; /*0028h*/
563 u32 outbound_msg_1; /*001Ch */
564 570
565 u32 inbound_doorbell; /*0020h */ 571 u32 outbound_doorbell; /*002Ch*/
566 u32 inbound_intr_status; /*0024h */ 572 u32 outbound_intr_status; /*0030h*/
567 u32 inbound_intr_mask; /*0028h */ 573 u32 outbound_intr_mask; /*0034h*/
568 574
569 u32 outbound_doorbell; /*002Ch */ 575 u32 reserved_1[2]; /*0038h*/
570 u32 outbound_intr_status; /*0030h */
571 u32 outbound_intr_mask; /*0034h */
572 576
573 u32 reserved_1[2]; /*0038h */ 577 u32 inbound_queue_port; /*0040h*/
578 u32 outbound_queue_port; /*0044h*/
574 579
575 u32 inbound_queue_port; /*0040h */ 580 u32 reserved_2[22]; /*0048h*/
576 u32 outbound_queue_port; /*0044h */
577 581
578 u32 reserved_2; /*004Ch */ 582 u32 outbound_doorbell_clear; /*00A0h*/
579 583
580 u32 index_registers[1004]; /*0050h */ 584 u32 reserved_3[3]; /*00A4h*/
585
586 u32 outbound_scratch_pad ; /*00B0h*/
587
588 u32 reserved_4[3]; /*00B4h*/
589
590 u32 inbound_low_queue_port ; /*00C0h*/
591
592 u32 inbound_high_queue_port ; /*00C4h*/
593
594 u32 reserved_5; /*00C8h*/
595 u32 index_registers[820]; /*00CCh*/
581 596
582} __attribute__ ((packed)); 597} __attribute__ ((packed));
583 598