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authorJames Smart <james.smart@emulex.com>2010-11-20 23:11:37 -0500
committerJames Bottomley <James.Bottomley@suse.de>2010-12-21 13:23:59 -0500
commit085c647c3377c3e39c8c572278507b1e1c7e7bf7 (patch)
treeb2b79117bace491f764a77a06e0f0fe093d823f6 /drivers/scsi/lpfc/lpfc_hw4.h
parent63e801ce685d151c5faca8f491adc2ad2e732259 (diff)
[SCSI] lpfc 8.3.19: Add latest SLI4 Hardware initialization support
- Add the Lancer FC and FCoE PCI IDs - Add new SLI4 INTF register definitions - Implement new SLI4 doorbell register Signed-off-by: Alex Iannicelli <alex.iannicelli@emulex.com> Signed-off-by: James Smart <james.smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'drivers/scsi/lpfc/lpfc_hw4.h')
-rw-r--r--drivers/scsi/lpfc/lpfc_hw4.h128
1 files changed, 107 insertions, 21 deletions
diff --git a/drivers/scsi/lpfc/lpfc_hw4.h b/drivers/scsi/lpfc/lpfc_hw4.h
index 6e4bc34e1d0d..7fbc58713f19 100644
--- a/drivers/scsi/lpfc/lpfc_hw4.h
+++ b/drivers/scsi/lpfc/lpfc_hw4.h
@@ -64,29 +64,39 @@ struct lpfc_sli_intf {
64#define lpfc_sli_intf_valid_MASK 0x00000007 64#define lpfc_sli_intf_valid_MASK 0x00000007
65#define lpfc_sli_intf_valid_WORD word0 65#define lpfc_sli_intf_valid_WORD word0
66#define LPFC_SLI_INTF_VALID 6 66#define LPFC_SLI_INTF_VALID 6
67#define lpfc_sli_intf_featurelevel2_SHIFT 24 67#define lpfc_sli_intf_sli_hint2_SHIFT 24
68#define lpfc_sli_intf_featurelevel2_MASK 0x0000001F 68#define lpfc_sli_intf_sli_hint2_MASK 0x0000001F
69#define lpfc_sli_intf_featurelevel2_WORD word0 69#define lpfc_sli_intf_sli_hint2_WORD word0
70#define lpfc_sli_intf_featurelevel1_SHIFT 16 70#define LPFC_SLI_INTF_SLI_HINT2_NONE 0
71#define lpfc_sli_intf_featurelevel1_MASK 0x000000FF 71#define lpfc_sli_intf_sli_hint1_SHIFT 16
72#define lpfc_sli_intf_featurelevel1_WORD word0 72#define lpfc_sli_intf_sli_hint1_MASK 0x000000FF
73#define LPFC_SLI_INTF_FEATURELEVEL1_1 1 73#define lpfc_sli_intf_sli_hint1_WORD word0
74#define LPFC_SLI_INTF_FEATURELEVEL1_2 2 74#define LPFC_SLI_INTF_SLI_HINT1_NONE 0
75#define LPFC_SLI_INTF_SLI_HINT1_1 1
76#define LPFC_SLI_INTF_SLI_HINT1_2 2
77#define lpfc_sli_intf_if_type_SHIFT 12
78#define lpfc_sli_intf_if_type_MASK 0x0000000F
79#define lpfc_sli_intf_if_type_WORD word0
80#define LPFC_SLI_INTF_IF_TYPE_0 0
81#define LPFC_SLI_INTF_IF_TYPE_1 1
82#define LPFC_SLI_INTF_IF_TYPE_2 2
75#define lpfc_sli_intf_sli_family_SHIFT 8 83#define lpfc_sli_intf_sli_family_SHIFT 8
76#define lpfc_sli_intf_sli_family_MASK 0x000000FF 84#define lpfc_sli_intf_sli_family_MASK 0x0000000F
77#define lpfc_sli_intf_sli_family_WORD word0 85#define lpfc_sli_intf_sli_family_WORD word0
78#define LPFC_SLI_INTF_FAMILY_BE2 0 86#define LPFC_SLI_INTF_FAMILY_BE2 0x0
79#define LPFC_SLI_INTF_FAMILY_BE3 1 87#define LPFC_SLI_INTF_FAMILY_BE3 0x1
88#define LPFC_SLI_INTF_FAMILY_LNCR_A0 0xa
89#define LPFC_SLI_INTF_FAMILY_LNCR_B0 0xb
80#define lpfc_sli_intf_slirev_SHIFT 4 90#define lpfc_sli_intf_slirev_SHIFT 4
81#define lpfc_sli_intf_slirev_MASK 0x0000000F 91#define lpfc_sli_intf_slirev_MASK 0x0000000F
82#define lpfc_sli_intf_slirev_WORD word0 92#define lpfc_sli_intf_slirev_WORD word0
83#define LPFC_SLI_INTF_REV_SLI3 3 93#define LPFC_SLI_INTF_REV_SLI3 3
84#define LPFC_SLI_INTF_REV_SLI4 4 94#define LPFC_SLI_INTF_REV_SLI4 4
85#define lpfc_sli_intf_if_type_SHIFT 0 95#define lpfc_sli_intf_func_type_SHIFT 0
86#define lpfc_sli_intf_if_type_MASK 0x00000007 96#define lpfc_sli_intf_func_type_MASK 0x00000001
87#define lpfc_sli_intf_if_type_WORD word0 97#define lpfc_sli_intf_func_type_WORD word0
88#define LPFC_SLI_INTF_IF_TYPE_0 0 98#define LPFC_SLI_INTF_IF_TYPE_PHYS 0
89#define LPFC_SLI_INTF_IF_TYPE_1 1 99#define LPFC_SLI_INTF_IF_TYPE_VIRT 1
90}; 100};
91 101
92#define LPFC_SLI4_MBX_EMBED true 102#define LPFC_SLI4_MBX_EMBED true
@@ -450,13 +460,15 @@ struct lpfc_register {
450 uint32_t word0; 460 uint32_t word0;
451}; 461};
452 462
463/* The SLI4 INTF register offset is common to all if_type values. */
464#define LPFC_SLI_INTF 0x0058
465
466/* The following BAR0 Registers apply to SLI4 if_type 0 UCNAs. */
453#define LPFC_UERR_STATUS_HI 0x00A4 467#define LPFC_UERR_STATUS_HI 0x00A4
454#define LPFC_UERR_STATUS_LO 0x00A0 468#define LPFC_UERR_STATUS_LO 0x00A0
455#define LPFC_UE_MASK_HI 0x00AC 469#define LPFC_UE_MASK_HI 0x00AC
456#define LPFC_UE_MASK_LO 0x00A8 470#define LPFC_UE_MASK_LO 0x00A8
457#define LPFC_SLI_INTF 0x0058
458 471
459/* BAR0 Registers */
460#define LPFC_HST_STATE 0x00AC 472#define LPFC_HST_STATE 0x00AC
461#define lpfc_hst_state_perr_SHIFT 31 473#define lpfc_hst_state_perr_SHIFT 31
462#define lpfc_hst_state_perr_MASK 0x1 474#define lpfc_hst_state_perr_MASK 0x1
@@ -480,6 +492,10 @@ struct lpfc_register {
480#define lpfc_hst_state_port_status_MASK 0xFFFF 492#define lpfc_hst_state_port_status_MASK 0xFFFF
481#define lpfc_hst_state_port_status_WORD word0 493#define lpfc_hst_state_port_status_WORD word0
482 494
495/*
496 * The following Port Status Values apply to SLI4, if_type 0 and 2
497 * UCNAs.
498 */
483#define LPFC_POST_STAGE_POWER_ON_RESET 0x0000 499#define LPFC_POST_STAGE_POWER_ON_RESET 0x0000
484#define LPFC_POST_STAGE_AWAITING_HOST_RDY 0x0001 500#define LPFC_POST_STAGE_AWAITING_HOST_RDY 0x0001
485#define LPFC_POST_STAGE_HOST_RDY 0x0002 501#define LPFC_POST_STAGE_HOST_RDY 0x0002
@@ -514,6 +530,64 @@ struct lpfc_register {
514#define LPFC_POST_STAGE_ARMFW_READY 0xC000 530#define LPFC_POST_STAGE_ARMFW_READY 0xC000
515#define LPFC_POST_STAGE_ARMFW_UE 0xF000 531#define LPFC_POST_STAGE_ARMFW_UE 0xF000
516 532
533
534/* The following BAR0 register sets are defined for if_type 2 UCNAs. */
535#define LPFC_SLIPORT_SEMAPHORE 0x0400
536#define lpfc_sliport_smphr_perr_SHIFT 31
537#define lpfc_sliport_smphr_perr_MASK 0x1
538#define lpfc_sliport_smphr_perr_WORD word0
539#define lpfc_sliport_smphr_sfi_SHIFT 30
540#define lpfc_sliport_smphr_sfi_MASK 0x1
541#define lpfc_sliport_smphr_sfi_WORD word0
542#define lpfc_sliport_smphr_nip_SHIFT 29
543#define lpfc_sliport_smphr_nip_MASK 0x1
544#define lpfc_sliport_smphr_nip_WORD word0
545#define lpfc_sliport_smphr_ipc_SHIFT 28
546#define lpfc_sliport_smphr_ipc_MASK 0x1
547#define lpfc_sliport_smphr_ipc_WORD word0
548#define lpfc_sliport_smphr_scr1_SHIFT 27
549#define lpfc_sliport_smphr_scr1_MASK 0x1
550#define lpfc_sliport_smphr_scr1_WORD word0
551#define lpfc_sliport_smphr_scr2_SHIFT 26
552#define lpfc_sliport_smphr_scr2_MASK 0x1
553#define lpfc_sliport_smphr_scr2_WORD word0
554#define lpfc_sliport_smphr_host_scratch_SHIFT 16
555#define lpfc_sliport_smphr_host_scratch_MASK 0xFF
556#define lpfc_sliport_smphr_host_scratch_WORD word0
557#define lpfc_sliport_smphr_port_status_SHIFT 0
558#define lpfc_sliport_smphr_port_status_MASK 0xFFFF
559#define lpfc_sliport_smphr_port_status_WORD word0
560
561#define LPFC_SLIPORT_STATUS 0x0404
562#define lpfc_sliport_status_err_SHIFT 31
563#define lpfc_sliport_status_err_MASK 0x1
564#define lpfc_sliport_status_err_WORD word0
565#define lpfc_sliport_status_end_SHIFT 30
566#define lpfc_sliport_status_end_MASK 0x1
567#define lpfc_sliport_status_end_WORD word0
568#define lpfc_sliport_status_oti_SHIFT 29
569#define lpfc_sliport_status_oti_MASK 0x1
570#define lpfc_sliport_status_oti_WORD word0
571#define lpfc_sliport_status_rn_SHIFT 24
572#define lpfc_sliport_status_rn_MASK 0x1
573#define lpfc_sliport_status_rn_WORD word0
574#define lpfc_sliport_status_rdy_SHIFT 23
575#define lpfc_sliport_status_rdy_MASK 0x1
576#define lpfc_sliport_status_rdy_WORD word0
577
578#define LPFC_SLIPORT_CONTROL 0x0408
579#define lpfc_sliport_ctrl_end_SHIFT 30
580#define lpfc_sliport_ctrl_end_MASK 0x1
581#define lpfc_sliport_ctrl_end_WORD word0
582#define LPFC_SLIPORT_LITTLE_ENDIAN 0
583#define LPFC_SLIPORT_BIG_ENDIAN 1
584#define lpfc_sliport_ctrl_ip_SHIFT 27
585#define lpfc_sliport_ctrl_ip_MASK 0x1
586#define lpfc_sliport_ctrl_ip_WORD word0
587
588#define LPFC_SLIPORT_ERROR_1 0x040C
589#define LPFC_SLIPORT_ERROR_2 0x0410
590
517/* BAR1 Registers */ 591/* BAR1 Registers */
518#define LPFC_IMR_MASK_ALL 0xFFFFFFFF 592#define LPFC_IMR_MASK_ALL 0xFFFFFFFF
519#define LPFC_ISCR_CLEAR_ALL 0xFFFFFFFF 593#define LPFC_ISCR_CLEAR_ALL 0xFFFFFFFF
@@ -569,14 +643,21 @@ struct lpfc_register {
569#define LPFC_SLI4_INTR30 BIT30 643#define LPFC_SLI4_INTR30 BIT30
570#define LPFC_SLI4_INTR31 BIT31 644#define LPFC_SLI4_INTR31 BIT31
571 645
572/* BAR2 Registers */ 646/*
647 * The Doorbell registers defined here exist in different BAR
648 * register sets depending on the UCNA Port's reported if_type
649 * value. For UCNA ports running SLI4 and if_type 0, they reside in
650 * BAR2. For UCNA ports running SLI4 and if_type 2, they reside in
651 * BAR0. The offsets are the same so the driver must account for
652 * any base address difference.
653 */
573#define LPFC_RQ_DOORBELL 0x00A0 654#define LPFC_RQ_DOORBELL 0x00A0
574#define lpfc_rq_doorbell_num_posted_SHIFT 16 655#define lpfc_rq_doorbell_num_posted_SHIFT 16
575#define lpfc_rq_doorbell_num_posted_MASK 0x3FFF 656#define lpfc_rq_doorbell_num_posted_MASK 0x3FFF
576#define lpfc_rq_doorbell_num_posted_WORD word0 657#define lpfc_rq_doorbell_num_posted_WORD word0
577#define LPFC_RQ_POST_BATCH 8 /* RQEs to post at one time */ 658#define LPFC_RQ_POST_BATCH 8 /* RQEs to post at one time */
578#define lpfc_rq_doorbell_id_SHIFT 0 659#define lpfc_rq_doorbell_id_SHIFT 0
579#define lpfc_rq_doorbell_id_MASK 0x03FF 660#define lpfc_rq_doorbell_id_MASK 0xFFFF
580#define lpfc_rq_doorbell_id_WORD word0 661#define lpfc_rq_doorbell_id_WORD word0
581 662
582#define LPFC_WQ_DOORBELL 0x0040 663#define LPFC_WQ_DOORBELL 0x0040
@@ -591,6 +672,11 @@ struct lpfc_register {
591#define lpfc_wq_doorbell_id_WORD word0 672#define lpfc_wq_doorbell_id_WORD word0
592 673
593#define LPFC_EQCQ_DOORBELL 0x0120 674#define LPFC_EQCQ_DOORBELL 0x0120
675#define lpfc_eqcq_doorbell_se_SHIFT 31
676#define lpfc_eqcq_doorbell_se_MASK 0x0001
677#define lpfc_eqcq_doorbell_se_WORD word0
678#define LPFC_EQCQ_SOLICIT_ENABLE_OFF 0
679#define LPFC_EQCQ_SOLICIT_ENABLE_ON 1
594#define lpfc_eqcq_doorbell_arm_SHIFT 29 680#define lpfc_eqcq_doorbell_arm_SHIFT 29
595#define lpfc_eqcq_doorbell_arm_MASK 0x0001 681#define lpfc_eqcq_doorbell_arm_MASK 0x0001
596#define lpfc_eqcq_doorbell_arm_WORD word0 682#define lpfc_eqcq_doorbell_arm_WORD word0
@@ -628,7 +714,7 @@ struct lpfc_register {
628#define lpfc_mq_doorbell_num_posted_MASK 0x3FFF 714#define lpfc_mq_doorbell_num_posted_MASK 0x3FFF
629#define lpfc_mq_doorbell_num_posted_WORD word0 715#define lpfc_mq_doorbell_num_posted_WORD word0
630#define lpfc_mq_doorbell_id_SHIFT 0 716#define lpfc_mq_doorbell_id_SHIFT 0
631#define lpfc_mq_doorbell_id_MASK 0x03FF 717#define lpfc_mq_doorbell_id_MASK 0xFFFF
632#define lpfc_mq_doorbell_id_WORD word0 718#define lpfc_mq_doorbell_id_WORD word0
633 719
634struct lpfc_sli4_cfg_mhdr { 720struct lpfc_sli4_cfg_mhdr {