diff options
author | James Smart <James.Smart@Emulex.Com> | 2009-05-22 14:51:39 -0400 |
---|---|---|
committer | James Bottomley <James.Bottomley@HansenPartnership.com> | 2009-06-08 12:21:29 -0400 |
commit | da0436e915a5c17ee79e72c1bf978a4ebb1cbf4d (patch) | |
tree | 7784646b7627117fa7849a901c85294fae905505 /drivers/scsi/lpfc/lpfc_hw.h | |
parent | 3772a99175f5378b5001e8da364341a8b8226a4a (diff) |
[SCSI] lpfc 8.3.2 : Addition of SLI4 Interface - Base Support
Adds new hardware and interface definitions.
Adds new interface routines - utilizing the reorganized layout of the
driver. Adds SLI-4 specific functions for attachment, initialization,
teardown, etc.
Signed-off-by: James Smart <james.smart@emulex.com>
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Diffstat (limited to 'drivers/scsi/lpfc/lpfc_hw.h')
-rw-r--r-- | drivers/scsi/lpfc/lpfc_hw.h | 140 |
1 files changed, 98 insertions, 42 deletions
diff --git a/drivers/scsi/lpfc/lpfc_hw.h b/drivers/scsi/lpfc/lpfc_hw.h index 4168c7b498b8..a9d64cfbe5cc 100644 --- a/drivers/scsi/lpfc/lpfc_hw.h +++ b/drivers/scsi/lpfc/lpfc_hw.h | |||
@@ -471,6 +471,35 @@ struct serv_parm { /* Structure is in Big Endian format */ | |||
471 | }; | 471 | }; |
472 | 472 | ||
473 | /* | 473 | /* |
474 | * Virtual Fabric Tagging Header | ||
475 | */ | ||
476 | struct fc_vft_header { | ||
477 | uint32_t word0; | ||
478 | #define fc_vft_hdr_r_ctl_SHIFT 24 | ||
479 | #define fc_vft_hdr_r_ctl_MASK 0xFF | ||
480 | #define fc_vft_hdr_r_ctl_WORD word0 | ||
481 | #define fc_vft_hdr_ver_SHIFT 22 | ||
482 | #define fc_vft_hdr_ver_MASK 0x3 | ||
483 | #define fc_vft_hdr_ver_WORD word0 | ||
484 | #define fc_vft_hdr_type_SHIFT 18 | ||
485 | #define fc_vft_hdr_type_MASK 0xF | ||
486 | #define fc_vft_hdr_type_WORD word0 | ||
487 | #define fc_vft_hdr_e_SHIFT 16 | ||
488 | #define fc_vft_hdr_e_MASK 0x1 | ||
489 | #define fc_vft_hdr_e_WORD word0 | ||
490 | #define fc_vft_hdr_priority_SHIFT 13 | ||
491 | #define fc_vft_hdr_priority_MASK 0x7 | ||
492 | #define fc_vft_hdr_priority_WORD word0 | ||
493 | #define fc_vft_hdr_vf_id_SHIFT 1 | ||
494 | #define fc_vft_hdr_vf_id_MASK 0xFFF | ||
495 | #define fc_vft_hdr_vf_id_WORD word0 | ||
496 | uint32_t word1; | ||
497 | #define fc_vft_hdr_hopct_SHIFT 24 | ||
498 | #define fc_vft_hdr_hopct_MASK 0xFF | ||
499 | #define fc_vft_hdr_hopct_WORD word1 | ||
500 | }; | ||
501 | |||
502 | /* | ||
474 | * Extended Link Service LS_COMMAND codes (Payload Word 0) | 503 | * Extended Link Service LS_COMMAND codes (Payload Word 0) |
475 | */ | 504 | */ |
476 | #ifdef __BIG_ENDIAN_BITFIELD | 505 | #ifdef __BIG_ENDIAN_BITFIELD |
@@ -1152,6 +1181,9 @@ typedef struct { | |||
1152 | #define PCI_DEVICE_ID_HORNET 0xfe05 | 1181 | #define PCI_DEVICE_ID_HORNET 0xfe05 |
1153 | #define PCI_DEVICE_ID_ZEPHYR_SCSP 0xfe11 | 1182 | #define PCI_DEVICE_ID_ZEPHYR_SCSP 0xfe11 |
1154 | #define PCI_DEVICE_ID_ZEPHYR_DCSP 0xfe12 | 1183 | #define PCI_DEVICE_ID_ZEPHYR_DCSP 0xfe12 |
1184 | #define PCI_VENDOR_ID_SERVERENGINE 0x19a2 | ||
1185 | #define PCI_DEVICE_ID_TIGERSHARK 0x0704 | ||
1186 | #define PCI_DEVICE_ID_TIGERSHARK_S 0x0705 | ||
1155 | 1187 | ||
1156 | #define JEDEC_ID_ADDRESS 0x0080001c | 1188 | #define JEDEC_ID_ADDRESS 0x0080001c |
1157 | #define FIREFLY_JEDEC_ID 0x1ACC | 1189 | #define FIREFLY_JEDEC_ID 0x1ACC |
@@ -1342,15 +1374,21 @@ typedef struct { /* FireFly BIU registers */ | |||
1342 | #define MBX_READ_LA64 0x95 | 1374 | #define MBX_READ_LA64 0x95 |
1343 | #define MBX_REG_VPI 0x96 | 1375 | #define MBX_REG_VPI 0x96 |
1344 | #define MBX_UNREG_VPI 0x97 | 1376 | #define MBX_UNREG_VPI 0x97 |
1345 | #define MBX_REG_VNPID 0x96 | ||
1346 | #define MBX_UNREG_VNPID 0x97 | ||
1347 | 1377 | ||
1348 | #define MBX_WRITE_WWN 0x98 | 1378 | #define MBX_WRITE_WWN 0x98 |
1349 | #define MBX_SET_DEBUG 0x99 | 1379 | #define MBX_SET_DEBUG 0x99 |
1350 | #define MBX_LOAD_EXP_ROM 0x9C | 1380 | #define MBX_LOAD_EXP_ROM 0x9C |
1351 | 1381 | #define MBX_SLI4_CONFIG 0x9B | |
1352 | #define MBX_MAX_CMDS 0x9D | 1382 | #define MBX_SLI4_REQ_FTRS 0x9D |
1383 | #define MBX_MAX_CMDS 0x9E | ||
1384 | #define MBX_RESUME_RPI 0x9E | ||
1353 | #define MBX_SLI2_CMD_MASK 0x80 | 1385 | #define MBX_SLI2_CMD_MASK 0x80 |
1386 | #define MBX_REG_VFI 0x9F | ||
1387 | #define MBX_REG_FCFI 0xA0 | ||
1388 | #define MBX_UNREG_VFI 0xA1 | ||
1389 | #define MBX_UNREG_FCFI 0xA2 | ||
1390 | #define MBX_INIT_VFI 0xA3 | ||
1391 | #define MBX_INIT_VPI 0xA4 | ||
1354 | 1392 | ||
1355 | /* IOCB Commands */ | 1393 | /* IOCB Commands */ |
1356 | 1394 | ||
@@ -1440,6 +1478,16 @@ typedef struct { /* FireFly BIU registers */ | |||
1440 | #define CMD_IOCB_LOGENTRY_CN 0x94 | 1478 | #define CMD_IOCB_LOGENTRY_CN 0x94 |
1441 | #define CMD_IOCB_LOGENTRY_ASYNC_CN 0x96 | 1479 | #define CMD_IOCB_LOGENTRY_ASYNC_CN 0x96 |
1442 | 1480 | ||
1481 | /* Unhandled Data Security SLI Commands */ | ||
1482 | #define DSSCMD_IWRITE64_CR 0xD8 | ||
1483 | #define DSSCMD_IWRITE64_CX 0xD9 | ||
1484 | #define DSSCMD_IREAD64_CR 0xDA | ||
1485 | #define DSSCMD_IREAD64_CX 0xDB | ||
1486 | #define DSSCMD_INVALIDATE_DEK 0xDC | ||
1487 | #define DSSCMD_SET_KEK 0xDD | ||
1488 | #define DSSCMD_GET_KEK_ID 0xDE | ||
1489 | #define DSSCMD_GEN_XFER 0xDF | ||
1490 | |||
1443 | #define CMD_MAX_IOCB_CMD 0xE6 | 1491 | #define CMD_MAX_IOCB_CMD 0xE6 |
1444 | #define CMD_IOCB_MASK 0xff | 1492 | #define CMD_IOCB_MASK 0xff |
1445 | 1493 | ||
@@ -1466,6 +1514,7 @@ typedef struct { /* FireFly BIU registers */ | |||
1466 | #define MBXERR_BAD_RCV_LENGTH 14 | 1514 | #define MBXERR_BAD_RCV_LENGTH 14 |
1467 | #define MBXERR_DMA_ERROR 15 | 1515 | #define MBXERR_DMA_ERROR 15 |
1468 | #define MBXERR_ERROR 16 | 1516 | #define MBXERR_ERROR 16 |
1517 | #define MBXERR_LINK_DOWN 0x33 | ||
1469 | #define MBX_NOT_FINISHED 255 | 1518 | #define MBX_NOT_FINISHED 255 |
1470 | 1519 | ||
1471 | #define MBX_BUSY 0xffffff /* Attempted cmd to busy Mailbox */ | 1520 | #define MBX_BUSY 0xffffff /* Attempted cmd to busy Mailbox */ |
@@ -1504,32 +1553,6 @@ struct ulp_bde { | |||
1504 | #endif | 1553 | #endif |
1505 | }; | 1554 | }; |
1506 | 1555 | ||
1507 | struct ulp_bde64 { /* SLI-2 */ | ||
1508 | union ULP_BDE_TUS { | ||
1509 | uint32_t w; | ||
1510 | struct { | ||
1511 | #ifdef __BIG_ENDIAN_BITFIELD | ||
1512 | uint32_t bdeFlags:8; /* BDE Flags 0 IS A SUPPORTED | ||
1513 | VALUE !! */ | ||
1514 | uint32_t bdeSize:24; /* Size of buffer (in bytes) */ | ||
1515 | #else /* __LITTLE_ENDIAN_BITFIELD */ | ||
1516 | uint32_t bdeSize:24; /* Size of buffer (in bytes) */ | ||
1517 | uint32_t bdeFlags:8; /* BDE Flags 0 IS A SUPPORTED | ||
1518 | VALUE !! */ | ||
1519 | #endif | ||
1520 | #define BUFF_TYPE_BDE_64 0x00 /* BDE (Host_resident) */ | ||
1521 | #define BUFF_TYPE_BDE_IMMED 0x01 /* Immediate Data BDE */ | ||
1522 | #define BUFF_TYPE_BDE_64P 0x02 /* BDE (Port-resident) */ | ||
1523 | #define BUFF_TYPE_BDE_64I 0x08 /* Input BDE (Host-resident) */ | ||
1524 | #define BUFF_TYPE_BDE_64IP 0x0A /* Input BDE (Port-resident) */ | ||
1525 | #define BUFF_TYPE_BLP_64 0x40 /* BLP (Host-resident) */ | ||
1526 | #define BUFF_TYPE_BLP_64P 0x42 /* BLP (Port-resident) */ | ||
1527 | } f; | ||
1528 | } tus; | ||
1529 | uint32_t addrLow; | ||
1530 | uint32_t addrHigh; | ||
1531 | }; | ||
1532 | |||
1533 | typedef struct ULP_BDL { /* SLI-2 */ | 1556 | typedef struct ULP_BDL { /* SLI-2 */ |
1534 | #ifdef __BIG_ENDIAN_BITFIELD | 1557 | #ifdef __BIG_ENDIAN_BITFIELD |
1535 | uint32_t bdeFlags:8; /* BDL Flags */ | 1558 | uint32_t bdeFlags:8; /* BDL Flags */ |
@@ -2287,7 +2310,7 @@ typedef struct { | |||
2287 | uint32_t rsvd3; | 2310 | uint32_t rsvd3; |
2288 | uint32_t rsvd4; | 2311 | uint32_t rsvd4; |
2289 | uint32_t rsvd5; | 2312 | uint32_t rsvd5; |
2290 | uint16_t rsvd6; | 2313 | uint16_t vfi; |
2291 | uint16_t vpi; | 2314 | uint16_t vpi; |
2292 | #else /* __LITTLE_ENDIAN */ | 2315 | #else /* __LITTLE_ENDIAN */ |
2293 | uint32_t rsvd1; | 2316 | uint32_t rsvd1; |
@@ -2297,7 +2320,7 @@ typedef struct { | |||
2297 | uint32_t rsvd4; | 2320 | uint32_t rsvd4; |
2298 | uint32_t rsvd5; | 2321 | uint32_t rsvd5; |
2299 | uint16_t vpi; | 2322 | uint16_t vpi; |
2300 | uint16_t rsvd6; | 2323 | uint16_t vfi; |
2301 | #endif | 2324 | #endif |
2302 | } REG_VPI_VAR; | 2325 | } REG_VPI_VAR; |
2303 | 2326 | ||
@@ -2457,7 +2480,7 @@ typedef struct { | |||
2457 | uint32_t entry_index:16; | 2480 | uint32_t entry_index:16; |
2458 | #endif | 2481 | #endif |
2459 | 2482 | ||
2460 | uint32_t rsvd1; | 2483 | uint32_t sli4_length; |
2461 | uint32_t word_cnt; | 2484 | uint32_t word_cnt; |
2462 | uint32_t resp_offset; | 2485 | uint32_t resp_offset; |
2463 | } DUMP_VAR; | 2486 | } DUMP_VAR; |
@@ -2470,9 +2493,32 @@ typedef struct { | |||
2470 | #define DMP_RSP_OFFSET 0x14 /* word 5 contains first word of rsp */ | 2493 | #define DMP_RSP_OFFSET 0x14 /* word 5 contains first word of rsp */ |
2471 | #define DMP_RSP_SIZE 0x6C /* maximum of 27 words of rsp data */ | 2494 | #define DMP_RSP_SIZE 0x6C /* maximum of 27 words of rsp data */ |
2472 | 2495 | ||
2496 | #define DMP_REGION_VPORT 0x16 /* VPort info region */ | ||
2497 | #define DMP_VPORT_REGION_SIZE 0x200 | ||
2498 | #define DMP_MBOX_OFFSET_WORD 0x5 | ||
2499 | |||
2500 | #define DMP_REGION_FCOEPARAM 0x17 /* fcoe param region */ | ||
2501 | #define DMP_FCOEPARAM_RGN_SIZE 0x400 | ||
2502 | |||
2473 | #define WAKE_UP_PARMS_REGION_ID 4 | 2503 | #define WAKE_UP_PARMS_REGION_ID 4 |
2474 | #define WAKE_UP_PARMS_WORD_SIZE 15 | 2504 | #define WAKE_UP_PARMS_WORD_SIZE 15 |
2475 | 2505 | ||
2506 | struct vport_rec { | ||
2507 | uint8_t wwpn[8]; | ||
2508 | uint8_t wwnn[8]; | ||
2509 | }; | ||
2510 | |||
2511 | #define VPORT_INFO_SIG 0x32324752 | ||
2512 | #define VPORT_INFO_REV_MASK 0xff | ||
2513 | #define VPORT_INFO_REV 0x1 | ||
2514 | #define MAX_STATIC_VPORT_COUNT 16 | ||
2515 | struct static_vport_info { | ||
2516 | uint32_t signature; | ||
2517 | uint32_t rev; | ||
2518 | struct vport_rec vport_list[MAX_STATIC_VPORT_COUNT]; | ||
2519 | uint32_t resvd[66]; | ||
2520 | }; | ||
2521 | |||
2476 | /* Option rom version structure */ | 2522 | /* Option rom version structure */ |
2477 | struct prog_id { | 2523 | struct prog_id { |
2478 | #ifdef __BIG_ENDIAN_BITFIELD | 2524 | #ifdef __BIG_ENDIAN_BITFIELD |
@@ -2697,7 +2743,9 @@ typedef struct { | |||
2697 | #endif | 2743 | #endif |
2698 | 2744 | ||
2699 | #ifdef __BIG_ENDIAN_BITFIELD | 2745 | #ifdef __BIG_ENDIAN_BITFIELD |
2700 | uint32_t rsvd1 : 23; /* Reserved */ | 2746 | uint32_t rsvd1 : 19; /* Reserved */ |
2747 | uint32_t cdss : 1; /* Configure Data Security SLI */ | ||
2748 | uint32_t rsvd2 : 3; /* Reserved */ | ||
2701 | uint32_t cbg : 1; /* Configure BlockGuard */ | 2749 | uint32_t cbg : 1; /* Configure BlockGuard */ |
2702 | uint32_t cmv : 1; /* Configure Max VPIs */ | 2750 | uint32_t cmv : 1; /* Configure Max VPIs */ |
2703 | uint32_t ccrp : 1; /* Config Command Ring Polling */ | 2751 | uint32_t ccrp : 1; /* Config Command Ring Polling */ |
@@ -2717,10 +2765,14 @@ typedef struct { | |||
2717 | uint32_t ccrp : 1; /* Config Command Ring Polling */ | 2765 | uint32_t ccrp : 1; /* Config Command Ring Polling */ |
2718 | uint32_t cmv : 1; /* Configure Max VPIs */ | 2766 | uint32_t cmv : 1; /* Configure Max VPIs */ |
2719 | uint32_t cbg : 1; /* Configure BlockGuard */ | 2767 | uint32_t cbg : 1; /* Configure BlockGuard */ |
2720 | uint32_t rsvd1 : 23; /* Reserved */ | 2768 | uint32_t rsvd2 : 3; /* Reserved */ |
2769 | uint32_t cdss : 1; /* Configure Data Security SLI */ | ||
2770 | uint32_t rsvd1 : 19; /* Reserved */ | ||
2721 | #endif | 2771 | #endif |
2722 | #ifdef __BIG_ENDIAN_BITFIELD | 2772 | #ifdef __BIG_ENDIAN_BITFIELD |
2723 | uint32_t rsvd2 : 23; /* Reserved */ | 2773 | uint32_t rsvd3 : 19; /* Reserved */ |
2774 | uint32_t gdss : 1; /* Configure Data Security SLI */ | ||
2775 | uint32_t rsvd4 : 3; /* Reserved */ | ||
2724 | uint32_t gbg : 1; /* Grant BlockGuard */ | 2776 | uint32_t gbg : 1; /* Grant BlockGuard */ |
2725 | uint32_t gmv : 1; /* Grant Max VPIs */ | 2777 | uint32_t gmv : 1; /* Grant Max VPIs */ |
2726 | uint32_t gcrp : 1; /* Grant Command Ring Polling */ | 2778 | uint32_t gcrp : 1; /* Grant Command Ring Polling */ |
@@ -2740,7 +2792,9 @@ typedef struct { | |||
2740 | uint32_t gcrp : 1; /* Grant Command Ring Polling */ | 2792 | uint32_t gcrp : 1; /* Grant Command Ring Polling */ |
2741 | uint32_t gmv : 1; /* Grant Max VPIs */ | 2793 | uint32_t gmv : 1; /* Grant Max VPIs */ |
2742 | uint32_t gbg : 1; /* Grant BlockGuard */ | 2794 | uint32_t gbg : 1; /* Grant BlockGuard */ |
2743 | uint32_t rsvd2 : 23; /* Reserved */ | 2795 | uint32_t rsvd4 : 3; /* Reserved */ |
2796 | uint32_t gdss : 1; /* Configure Data Security SLI */ | ||
2797 | uint32_t rsvd3 : 19; /* Reserved */ | ||
2744 | #endif | 2798 | #endif |
2745 | 2799 | ||
2746 | #ifdef __BIG_ENDIAN_BITFIELD | 2800 | #ifdef __BIG_ENDIAN_BITFIELD |
@@ -2753,20 +2807,20 @@ typedef struct { | |||
2753 | 2807 | ||
2754 | #ifdef __BIG_ENDIAN_BITFIELD | 2808 | #ifdef __BIG_ENDIAN_BITFIELD |
2755 | uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */ | 2809 | uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */ |
2756 | uint32_t rsvd3 : 16; /* Max HBQs Host expect to configure */ | 2810 | uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */ |
2757 | #else /* __LITTLE_ENDIAN */ | 2811 | #else /* __LITTLE_ENDIAN */ |
2758 | uint32_t rsvd3 : 16; /* Max HBQs Host expect to configure */ | 2812 | uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */ |
2759 | uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */ | 2813 | uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */ |
2760 | #endif | 2814 | #endif |
2761 | 2815 | ||
2762 | uint32_t rsvd4; /* Reserved */ | 2816 | uint32_t rsvd6; /* Reserved */ |
2763 | 2817 | ||
2764 | #ifdef __BIG_ENDIAN_BITFIELD | 2818 | #ifdef __BIG_ENDIAN_BITFIELD |
2765 | uint32_t rsvd5 : 16; /* Reserved */ | 2819 | uint32_t rsvd7 : 16; /* Reserved */ |
2766 | uint32_t max_vpi : 16; /* Max number of virt N-Ports */ | 2820 | uint32_t max_vpi : 16; /* Max number of virt N-Ports */ |
2767 | #else /* __LITTLE_ENDIAN */ | 2821 | #else /* __LITTLE_ENDIAN */ |
2768 | uint32_t max_vpi : 16; /* Max number of virt N-Ports */ | 2822 | uint32_t max_vpi : 16; /* Max number of virt N-Ports */ |
2769 | uint32_t rsvd5 : 16; /* Reserved */ | 2823 | uint32_t rsvd7 : 16; /* Reserved */ |
2770 | #endif | 2824 | #endif |
2771 | 2825 | ||
2772 | } CONFIG_PORT_VAR; | 2826 | } CONFIG_PORT_VAR; |
@@ -3666,3 +3720,5 @@ lpfc_error_lost_link(IOCB_t *iocbp) | |||
3666 | #define MENLO_TIMEOUT 30 | 3720 | #define MENLO_TIMEOUT 30 |
3667 | #define SETVAR_MLOMNT 0x103107 | 3721 | #define SETVAR_MLOMNT 0x103107 |
3668 | #define SETVAR_MLORST 0x103007 | 3722 | #define SETVAR_MLORST 0x103007 |
3723 | |||
3724 | #define BPL_ALIGN_SZ 8 /* 8 byte alignment for bpl and mbufs */ | ||