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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/scsi/libata-core.c
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'drivers/scsi/libata-core.c')
-rw-r--r--drivers/scsi/libata-core.c4024
1 files changed, 4024 insertions, 0 deletions
diff --git a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c
new file mode 100644
index 000000000000..0b5d3a5b7eda
--- /dev/null
+++ b/drivers/scsi/libata-core.c
@@ -0,0 +1,4024 @@
1/*
2 libata-core.c - helper library for ATA
3
4 Copyright 2003-2004 Red Hat, Inc. All rights reserved.
5 Copyright 2003-2004 Jeff Garzik
6
7 The contents of this file are subject to the Open
8 Software License version 1.1 that can be found at
9 http://www.opensource.org/licenses/osl-1.1.txt and is included herein
10 by reference.
11
12 Alternatively, the contents of this file may be used under the terms
13 of the GNU General Public License version 2 (the "GPL") as distributed
14 in the kernel source COPYING file, in which case the provisions of
15 the GPL are applicable instead of the above. If you wish to allow
16 the use of your version of this file only under the terms of the
17 GPL and not to allow others to use your version of this file under
18 the OSL, indicate your decision by deleting the provisions above and
19 replace them with the notice and other provisions required by the GPL.
20 If you do not delete the provisions above, a recipient may use your
21 version of this file under either the OSL or the GPL.
22
23 */
24
25#include <linux/config.h>
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/pci.h>
29#include <linux/init.h>
30#include <linux/list.h>
31#include <linux/mm.h>
32#include <linux/highmem.h>
33#include <linux/spinlock.h>
34#include <linux/blkdev.h>
35#include <linux/delay.h>
36#include <linux/timer.h>
37#include <linux/interrupt.h>
38#include <linux/completion.h>
39#include <linux/suspend.h>
40#include <linux/workqueue.h>
41#include <scsi/scsi.h>
42#include "scsi.h"
43#include "scsi_priv.h"
44#include <scsi/scsi_host.h>
45#include <linux/libata.h>
46#include <asm/io.h>
47#include <asm/semaphore.h>
48#include <asm/byteorder.h>
49
50#include "libata.h"
51
52static unsigned int ata_busy_sleep (struct ata_port *ap,
53 unsigned long tmout_pat,
54 unsigned long tmout);
55static void ata_set_mode(struct ata_port *ap);
56static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
57static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift);
58static int fgb(u32 bitmap);
59static int ata_choose_xfer_mode(struct ata_port *ap,
60 u8 *xfer_mode_out,
61 unsigned int *xfer_shift_out);
62static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat);
63static void __ata_qc_complete(struct ata_queued_cmd *qc);
64
65static unsigned int ata_unique_id = 1;
66static struct workqueue_struct *ata_wq;
67
68MODULE_AUTHOR("Jeff Garzik");
69MODULE_DESCRIPTION("Library module for ATA devices");
70MODULE_LICENSE("GPL");
71MODULE_VERSION(DRV_VERSION);
72
73/**
74 * ata_tf_load - send taskfile registers to host controller
75 * @ap: Port to which output is sent
76 * @tf: ATA taskfile register set
77 *
78 * Outputs ATA taskfile to standard ATA host controller.
79 *
80 * LOCKING:
81 * Inherited from caller.
82 */
83
84static void ata_tf_load_pio(struct ata_port *ap, struct ata_taskfile *tf)
85{
86 struct ata_ioports *ioaddr = &ap->ioaddr;
87 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
88
89 if (tf->ctl != ap->last_ctl) {
90 outb(tf->ctl, ioaddr->ctl_addr);
91 ap->last_ctl = tf->ctl;
92 ata_wait_idle(ap);
93 }
94
95 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
96 outb(tf->hob_feature, ioaddr->feature_addr);
97 outb(tf->hob_nsect, ioaddr->nsect_addr);
98 outb(tf->hob_lbal, ioaddr->lbal_addr);
99 outb(tf->hob_lbam, ioaddr->lbam_addr);
100 outb(tf->hob_lbah, ioaddr->lbah_addr);
101 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
102 tf->hob_feature,
103 tf->hob_nsect,
104 tf->hob_lbal,
105 tf->hob_lbam,
106 tf->hob_lbah);
107 }
108
109 if (is_addr) {
110 outb(tf->feature, ioaddr->feature_addr);
111 outb(tf->nsect, ioaddr->nsect_addr);
112 outb(tf->lbal, ioaddr->lbal_addr);
113 outb(tf->lbam, ioaddr->lbam_addr);
114 outb(tf->lbah, ioaddr->lbah_addr);
115 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
116 tf->feature,
117 tf->nsect,
118 tf->lbal,
119 tf->lbam,
120 tf->lbah);
121 }
122
123 if (tf->flags & ATA_TFLAG_DEVICE) {
124 outb(tf->device, ioaddr->device_addr);
125 VPRINTK("device 0x%X\n", tf->device);
126 }
127
128 ata_wait_idle(ap);
129}
130
131/**
132 * ata_tf_load_mmio - send taskfile registers to host controller
133 * @ap: Port to which output is sent
134 * @tf: ATA taskfile register set
135 *
136 * Outputs ATA taskfile to standard ATA host controller using MMIO.
137 *
138 * LOCKING:
139 * Inherited from caller.
140 */
141
142static void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf)
143{
144 struct ata_ioports *ioaddr = &ap->ioaddr;
145 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
146
147 if (tf->ctl != ap->last_ctl) {
148 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
149 ap->last_ctl = tf->ctl;
150 ata_wait_idle(ap);
151 }
152
153 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
154 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
155 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
156 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
157 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
158 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
159 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
160 tf->hob_feature,
161 tf->hob_nsect,
162 tf->hob_lbal,
163 tf->hob_lbam,
164 tf->hob_lbah);
165 }
166
167 if (is_addr) {
168 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
169 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
170 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
171 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
172 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
173 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
174 tf->feature,
175 tf->nsect,
176 tf->lbal,
177 tf->lbam,
178 tf->lbah);
179 }
180
181 if (tf->flags & ATA_TFLAG_DEVICE) {
182 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
183 VPRINTK("device 0x%X\n", tf->device);
184 }
185
186 ata_wait_idle(ap);
187}
188
189void ata_tf_load(struct ata_port *ap, struct ata_taskfile *tf)
190{
191 if (ap->flags & ATA_FLAG_MMIO)
192 ata_tf_load_mmio(ap, tf);
193 else
194 ata_tf_load_pio(ap, tf);
195}
196
197/**
198 * ata_exec_command - issue ATA command to host controller
199 * @ap: port to which command is being issued
200 * @tf: ATA taskfile register set
201 *
202 * Issues PIO/MMIO write to ATA command register, with proper
203 * synchronization with interrupt handler / other threads.
204 *
205 * LOCKING:
206 * spin_lock_irqsave(host_set lock)
207 */
208
209static void ata_exec_command_pio(struct ata_port *ap, struct ata_taskfile *tf)
210{
211 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
212
213 outb(tf->command, ap->ioaddr.command_addr);
214 ata_pause(ap);
215}
216
217
218/**
219 * ata_exec_command_mmio - issue ATA command to host controller
220 * @ap: port to which command is being issued
221 * @tf: ATA taskfile register set
222 *
223 * Issues MMIO write to ATA command register, with proper
224 * synchronization with interrupt handler / other threads.
225 *
226 * LOCKING:
227 * spin_lock_irqsave(host_set lock)
228 */
229
230static void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf)
231{
232 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
233
234 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
235 ata_pause(ap);
236}
237
238void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf)
239{
240 if (ap->flags & ATA_FLAG_MMIO)
241 ata_exec_command_mmio(ap, tf);
242 else
243 ata_exec_command_pio(ap, tf);
244}
245
246/**
247 * ata_exec - issue ATA command to host controller
248 * @ap: port to which command is being issued
249 * @tf: ATA taskfile register set
250 *
251 * Issues PIO/MMIO write to ATA command register, with proper
252 * synchronization with interrupt handler / other threads.
253 *
254 * LOCKING:
255 * Obtains host_set lock.
256 */
257
258static inline void ata_exec(struct ata_port *ap, struct ata_taskfile *tf)
259{
260 unsigned long flags;
261
262 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
263 spin_lock_irqsave(&ap->host_set->lock, flags);
264 ap->ops->exec_command(ap, tf);
265 spin_unlock_irqrestore(&ap->host_set->lock, flags);
266}
267
268/**
269 * ata_tf_to_host - issue ATA taskfile to host controller
270 * @ap: port to which command is being issued
271 * @tf: ATA taskfile register set
272 *
273 * Issues ATA taskfile register set to ATA host controller,
274 * with proper synchronization with interrupt handler and
275 * other threads.
276 *
277 * LOCKING:
278 * Obtains host_set lock.
279 */
280
281static void ata_tf_to_host(struct ata_port *ap, struct ata_taskfile *tf)
282{
283 ap->ops->tf_load(ap, tf);
284
285 ata_exec(ap, tf);
286}
287
288/**
289 * ata_tf_to_host_nolock - issue ATA taskfile to host controller
290 * @ap: port to which command is being issued
291 * @tf: ATA taskfile register set
292 *
293 * Issues ATA taskfile register set to ATA host controller,
294 * with proper synchronization with interrupt handler and
295 * other threads.
296 *
297 * LOCKING:
298 * spin_lock_irqsave(host_set lock)
299 */
300
301void ata_tf_to_host_nolock(struct ata_port *ap, struct ata_taskfile *tf)
302{
303 ap->ops->tf_load(ap, tf);
304 ap->ops->exec_command(ap, tf);
305}
306
307/**
308 * ata_tf_read - input device's ATA taskfile shadow registers
309 * @ap: Port from which input is read
310 * @tf: ATA taskfile register set for storing input
311 *
312 * Reads ATA taskfile registers for currently-selected device
313 * into @tf.
314 *
315 * LOCKING:
316 * Inherited from caller.
317 */
318
319static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
320{
321 struct ata_ioports *ioaddr = &ap->ioaddr;
322
323 tf->nsect = inb(ioaddr->nsect_addr);
324 tf->lbal = inb(ioaddr->lbal_addr);
325 tf->lbam = inb(ioaddr->lbam_addr);
326 tf->lbah = inb(ioaddr->lbah_addr);
327 tf->device = inb(ioaddr->device_addr);
328
329 if (tf->flags & ATA_TFLAG_LBA48) {
330 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
331 tf->hob_feature = inb(ioaddr->error_addr);
332 tf->hob_nsect = inb(ioaddr->nsect_addr);
333 tf->hob_lbal = inb(ioaddr->lbal_addr);
334 tf->hob_lbam = inb(ioaddr->lbam_addr);
335 tf->hob_lbah = inb(ioaddr->lbah_addr);
336 }
337}
338
339/**
340 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
341 * @ap: Port from which input is read
342 * @tf: ATA taskfile register set for storing input
343 *
344 * Reads ATA taskfile registers for currently-selected device
345 * into @tf via MMIO.
346 *
347 * LOCKING:
348 * Inherited from caller.
349 */
350
351static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
352{
353 struct ata_ioports *ioaddr = &ap->ioaddr;
354
355 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
356 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
357 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
358 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
359 tf->device = readb((void __iomem *)ioaddr->device_addr);
360
361 if (tf->flags & ATA_TFLAG_LBA48) {
362 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
363 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
364 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
365 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
366 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
367 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
368 }
369}
370
371void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
372{
373 if (ap->flags & ATA_FLAG_MMIO)
374 ata_tf_read_mmio(ap, tf);
375 else
376 ata_tf_read_pio(ap, tf);
377}
378
379/**
380 * ata_check_status_pio - Read device status reg & clear interrupt
381 * @ap: port where the device is
382 *
383 * Reads ATA taskfile status register for currently-selected device
384 * and return it's value. This also clears pending interrupts
385 * from this device
386 *
387 * LOCKING:
388 * Inherited from caller.
389 */
390static u8 ata_check_status_pio(struct ata_port *ap)
391{
392 return inb(ap->ioaddr.status_addr);
393}
394
395/**
396 * ata_check_status_mmio - Read device status reg & clear interrupt
397 * @ap: port where the device is
398 *
399 * Reads ATA taskfile status register for currently-selected device
400 * via MMIO and return it's value. This also clears pending interrupts
401 * from this device
402 *
403 * LOCKING:
404 * Inherited from caller.
405 */
406static u8 ata_check_status_mmio(struct ata_port *ap)
407{
408 return readb((void __iomem *) ap->ioaddr.status_addr);
409}
410
411u8 ata_check_status(struct ata_port *ap)
412{
413 if (ap->flags & ATA_FLAG_MMIO)
414 return ata_check_status_mmio(ap);
415 return ata_check_status_pio(ap);
416}
417
418u8 ata_altstatus(struct ata_port *ap)
419{
420 if (ap->ops->check_altstatus)
421 return ap->ops->check_altstatus(ap);
422
423 if (ap->flags & ATA_FLAG_MMIO)
424 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
425 return inb(ap->ioaddr.altstatus_addr);
426}
427
428u8 ata_chk_err(struct ata_port *ap)
429{
430 if (ap->ops->check_err)
431 return ap->ops->check_err(ap);
432
433 if (ap->flags & ATA_FLAG_MMIO) {
434 return readb((void __iomem *) ap->ioaddr.error_addr);
435 }
436 return inb(ap->ioaddr.error_addr);
437}
438
439/**
440 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
441 * @tf: Taskfile to convert
442 * @fis: Buffer into which data will output
443 * @pmp: Port multiplier port
444 *
445 * Converts a standard ATA taskfile to a Serial ATA
446 * FIS structure (Register - Host to Device).
447 *
448 * LOCKING:
449 * Inherited from caller.
450 */
451
452void ata_tf_to_fis(struct ata_taskfile *tf, u8 *fis, u8 pmp)
453{
454 fis[0] = 0x27; /* Register - Host to Device FIS */
455 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
456 bit 7 indicates Command FIS */
457 fis[2] = tf->command;
458 fis[3] = tf->feature;
459
460 fis[4] = tf->lbal;
461 fis[5] = tf->lbam;
462 fis[6] = tf->lbah;
463 fis[7] = tf->device;
464
465 fis[8] = tf->hob_lbal;
466 fis[9] = tf->hob_lbam;
467 fis[10] = tf->hob_lbah;
468 fis[11] = tf->hob_feature;
469
470 fis[12] = tf->nsect;
471 fis[13] = tf->hob_nsect;
472 fis[14] = 0;
473 fis[15] = tf->ctl;
474
475 fis[16] = 0;
476 fis[17] = 0;
477 fis[18] = 0;
478 fis[19] = 0;
479}
480
481/**
482 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
483 * @fis: Buffer from which data will be input
484 * @tf: Taskfile to output
485 *
486 * Converts a standard ATA taskfile to a Serial ATA
487 * FIS structure (Register - Host to Device).
488 *
489 * LOCKING:
490 * Inherited from caller.
491 */
492
493void ata_tf_from_fis(u8 *fis, struct ata_taskfile *tf)
494{
495 tf->command = fis[2]; /* status */
496 tf->feature = fis[3]; /* error */
497
498 tf->lbal = fis[4];
499 tf->lbam = fis[5];
500 tf->lbah = fis[6];
501 tf->device = fis[7];
502
503 tf->hob_lbal = fis[8];
504 tf->hob_lbam = fis[9];
505 tf->hob_lbah = fis[10];
506
507 tf->nsect = fis[12];
508 tf->hob_nsect = fis[13];
509}
510
511/**
512 * ata_prot_to_cmd - determine which read/write opcodes to use
513 * @protocol: ATA_PROT_xxx taskfile protocol
514 * @lba48: true is lba48 is present
515 *
516 * Given necessary input, determine which read/write commands
517 * to use to transfer data.
518 *
519 * LOCKING:
520 * None.
521 */
522static int ata_prot_to_cmd(int protocol, int lba48)
523{
524 int rcmd = 0, wcmd = 0;
525
526 switch (protocol) {
527 case ATA_PROT_PIO:
528 if (lba48) {
529 rcmd = ATA_CMD_PIO_READ_EXT;
530 wcmd = ATA_CMD_PIO_WRITE_EXT;
531 } else {
532 rcmd = ATA_CMD_PIO_READ;
533 wcmd = ATA_CMD_PIO_WRITE;
534 }
535 break;
536
537 case ATA_PROT_DMA:
538 if (lba48) {
539 rcmd = ATA_CMD_READ_EXT;
540 wcmd = ATA_CMD_WRITE_EXT;
541 } else {
542 rcmd = ATA_CMD_READ;
543 wcmd = ATA_CMD_WRITE;
544 }
545 break;
546
547 default:
548 return -1;
549 }
550
551 return rcmd | (wcmd << 8);
552}
553
554/**
555 * ata_dev_set_protocol - set taskfile protocol and r/w commands
556 * @dev: device to examine and configure
557 *
558 * Examine the device configuration, after we have
559 * read the identify-device page and configured the
560 * data transfer mode. Set internal state related to
561 * the ATA taskfile protocol (pio, pio mult, dma, etc.)
562 * and calculate the proper read/write commands to use.
563 *
564 * LOCKING:
565 * caller.
566 */
567static void ata_dev_set_protocol(struct ata_device *dev)
568{
569 int pio = (dev->flags & ATA_DFLAG_PIO);
570 int lba48 = (dev->flags & ATA_DFLAG_LBA48);
571 int proto, cmd;
572
573 if (pio)
574 proto = dev->xfer_protocol = ATA_PROT_PIO;
575 else
576 proto = dev->xfer_protocol = ATA_PROT_DMA;
577
578 cmd = ata_prot_to_cmd(proto, lba48);
579 if (cmd < 0)
580 BUG();
581
582 dev->read_cmd = cmd & 0xff;
583 dev->write_cmd = (cmd >> 8) & 0xff;
584}
585
586static const char * xfer_mode_str[] = {
587 "UDMA/16",
588 "UDMA/25",
589 "UDMA/33",
590 "UDMA/44",
591 "UDMA/66",
592 "UDMA/100",
593 "UDMA/133",
594 "UDMA7",
595 "MWDMA0",
596 "MWDMA1",
597 "MWDMA2",
598 "PIO0",
599 "PIO1",
600 "PIO2",
601 "PIO3",
602 "PIO4",
603};
604
605/**
606 * ata_udma_string - convert UDMA bit offset to string
607 * @mask: mask of bits supported; only highest bit counts.
608 *
609 * Determine string which represents the highest speed
610 * (highest bit in @udma_mask).
611 *
612 * LOCKING:
613 * None.
614 *
615 * RETURNS:
616 * Constant C string representing highest speed listed in
617 * @udma_mask, or the constant C string "<n/a>".
618 */
619
620static const char *ata_mode_string(unsigned int mask)
621{
622 int i;
623
624 for (i = 7; i >= 0; i--)
625 if (mask & (1 << i))
626 goto out;
627 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
628 if (mask & (1 << i))
629 goto out;
630 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
631 if (mask & (1 << i))
632 goto out;
633
634 return "<n/a>";
635
636out:
637 return xfer_mode_str[i];
638}
639
640/**
641 * ata_pio_devchk - PATA device presence detection
642 * @ap: ATA channel to examine
643 * @device: Device to examine (starting at zero)
644 *
645 * This technique was originally described in
646 * Hale Landis's ATADRVR (www.ata-atapi.com), and
647 * later found its way into the ATA/ATAPI spec.
648 *
649 * Write a pattern to the ATA shadow registers,
650 * and if a device is present, it will respond by
651 * correctly storing and echoing back the
652 * ATA shadow register contents.
653 *
654 * LOCKING:
655 * caller.
656 */
657
658static unsigned int ata_pio_devchk(struct ata_port *ap,
659 unsigned int device)
660{
661 struct ata_ioports *ioaddr = &ap->ioaddr;
662 u8 nsect, lbal;
663
664 ap->ops->dev_select(ap, device);
665
666 outb(0x55, ioaddr->nsect_addr);
667 outb(0xaa, ioaddr->lbal_addr);
668
669 outb(0xaa, ioaddr->nsect_addr);
670 outb(0x55, ioaddr->lbal_addr);
671
672 outb(0x55, ioaddr->nsect_addr);
673 outb(0xaa, ioaddr->lbal_addr);
674
675 nsect = inb(ioaddr->nsect_addr);
676 lbal = inb(ioaddr->lbal_addr);
677
678 if ((nsect == 0x55) && (lbal == 0xaa))
679 return 1; /* we found a device */
680
681 return 0; /* nothing found */
682}
683
684/**
685 * ata_mmio_devchk - PATA device presence detection
686 * @ap: ATA channel to examine
687 * @device: Device to examine (starting at zero)
688 *
689 * This technique was originally described in
690 * Hale Landis's ATADRVR (www.ata-atapi.com), and
691 * later found its way into the ATA/ATAPI spec.
692 *
693 * Write a pattern to the ATA shadow registers,
694 * and if a device is present, it will respond by
695 * correctly storing and echoing back the
696 * ATA shadow register contents.
697 *
698 * LOCKING:
699 * caller.
700 */
701
702static unsigned int ata_mmio_devchk(struct ata_port *ap,
703 unsigned int device)
704{
705 struct ata_ioports *ioaddr = &ap->ioaddr;
706 u8 nsect, lbal;
707
708 ap->ops->dev_select(ap, device);
709
710 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
711 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
712
713 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
714 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
715
716 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
717 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
718
719 nsect = readb((void __iomem *) ioaddr->nsect_addr);
720 lbal = readb((void __iomem *) ioaddr->lbal_addr);
721
722 if ((nsect == 0x55) && (lbal == 0xaa))
723 return 1; /* we found a device */
724
725 return 0; /* nothing found */
726}
727
728/**
729 * ata_devchk - PATA device presence detection
730 * @ap: ATA channel to examine
731 * @device: Device to examine (starting at zero)
732 *
733 * Dispatch ATA device presence detection, depending
734 * on whether we are using PIO or MMIO to talk to the
735 * ATA shadow registers.
736 *
737 * LOCKING:
738 * caller.
739 */
740
741static unsigned int ata_devchk(struct ata_port *ap,
742 unsigned int device)
743{
744 if (ap->flags & ATA_FLAG_MMIO)
745 return ata_mmio_devchk(ap, device);
746 return ata_pio_devchk(ap, device);
747}
748
749/**
750 * ata_dev_classify - determine device type based on ATA-spec signature
751 * @tf: ATA taskfile register set for device to be identified
752 *
753 * Determine from taskfile register contents whether a device is
754 * ATA or ATAPI, as per "Signature and persistence" section
755 * of ATA/PI spec (volume 1, sect 5.14).
756 *
757 * LOCKING:
758 * None.
759 *
760 * RETURNS:
761 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
762 * the event of failure.
763 */
764
765unsigned int ata_dev_classify(struct ata_taskfile *tf)
766{
767 /* Apple's open source Darwin code hints that some devices only
768 * put a proper signature into the LBA mid/high registers,
769 * So, we only check those. It's sufficient for uniqueness.
770 */
771
772 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
773 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
774 DPRINTK("found ATA device by sig\n");
775 return ATA_DEV_ATA;
776 }
777
778 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
779 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
780 DPRINTK("found ATAPI device by sig\n");
781 return ATA_DEV_ATAPI;
782 }
783
784 DPRINTK("unknown device\n");
785 return ATA_DEV_UNKNOWN;
786}
787
788/**
789 * ata_dev_try_classify - Parse returned ATA device signature
790 * @ap: ATA channel to examine
791 * @device: Device to examine (starting at zero)
792 *
793 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
794 * an ATA/ATAPI-defined set of values is placed in the ATA
795 * shadow registers, indicating the results of device detection
796 * and diagnostics.
797 *
798 * Select the ATA device, and read the values from the ATA shadow
799 * registers. Then parse according to the Error register value,
800 * and the spec-defined values examined by ata_dev_classify().
801 *
802 * LOCKING:
803 * caller.
804 */
805
806static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
807{
808 struct ata_device *dev = &ap->device[device];
809 struct ata_taskfile tf;
810 unsigned int class;
811 u8 err;
812
813 ap->ops->dev_select(ap, device);
814
815 memset(&tf, 0, sizeof(tf));
816
817 err = ata_chk_err(ap);
818 ap->ops->tf_read(ap, &tf);
819
820 dev->class = ATA_DEV_NONE;
821
822 /* see if device passed diags */
823 if (err == 1)
824 /* do nothing */ ;
825 else if ((device == 0) && (err == 0x81))
826 /* do nothing */ ;
827 else
828 return err;
829
830 /* determine if device if ATA or ATAPI */
831 class = ata_dev_classify(&tf);
832 if (class == ATA_DEV_UNKNOWN)
833 return err;
834 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
835 return err;
836
837 dev->class = class;
838
839 return err;
840}
841
842/**
843 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
844 * @id: IDENTIFY DEVICE results we will examine
845 * @s: string into which data is output
846 * @ofs: offset into identify device page
847 * @len: length of string to return. must be an even number.
848 *
849 * The strings in the IDENTIFY DEVICE page are broken up into
850 * 16-bit chunks. Run through the string, and output each
851 * 8-bit chunk linearly, regardless of platform.
852 *
853 * LOCKING:
854 * caller.
855 */
856
857void ata_dev_id_string(u16 *id, unsigned char *s,
858 unsigned int ofs, unsigned int len)
859{
860 unsigned int c;
861
862 while (len > 0) {
863 c = id[ofs] >> 8;
864 *s = c;
865 s++;
866
867 c = id[ofs] & 0xff;
868 *s = c;
869 s++;
870
871 ofs++;
872 len -= 2;
873 }
874}
875
876void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
877{
878}
879
880/**
881 * ata_std_dev_select - Select device 0/1 on ATA bus
882 * @ap: ATA channel to manipulate
883 * @device: ATA device (numbered from zero) to select
884 *
885 * Use the method defined in the ATA specification to
886 * make either device 0, or device 1, active on the
887 * ATA channel.
888 *
889 * LOCKING:
890 * caller.
891 */
892
893void ata_std_dev_select (struct ata_port *ap, unsigned int device)
894{
895 u8 tmp;
896
897 if (device == 0)
898 tmp = ATA_DEVICE_OBS;
899 else
900 tmp = ATA_DEVICE_OBS | ATA_DEV1;
901
902 if (ap->flags & ATA_FLAG_MMIO) {
903 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
904 } else {
905 outb(tmp, ap->ioaddr.device_addr);
906 }
907 ata_pause(ap); /* needed; also flushes, for mmio */
908}
909
910/**
911 * ata_dev_select - Select device 0/1 on ATA bus
912 * @ap: ATA channel to manipulate
913 * @device: ATA device (numbered from zero) to select
914 * @wait: non-zero to wait for Status register BSY bit to clear
915 * @can_sleep: non-zero if context allows sleeping
916 *
917 * Use the method defined in the ATA specification to
918 * make either device 0, or device 1, active on the
919 * ATA channel.
920 *
921 * This is a high-level version of ata_std_dev_select(),
922 * which additionally provides the services of inserting
923 * the proper pauses and status polling, where needed.
924 *
925 * LOCKING:
926 * caller.
927 */
928
929void ata_dev_select(struct ata_port *ap, unsigned int device,
930 unsigned int wait, unsigned int can_sleep)
931{
932 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
933 ap->id, device, wait);
934
935 if (wait)
936 ata_wait_idle(ap);
937
938 ap->ops->dev_select(ap, device);
939
940 if (wait) {
941 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
942 msleep(150);
943 ata_wait_idle(ap);
944 }
945}
946
947/**
948 * ata_dump_id - IDENTIFY DEVICE info debugging output
949 * @dev: Device whose IDENTIFY DEVICE page we will dump
950 *
951 * Dump selected 16-bit words from a detected device's
952 * IDENTIFY PAGE page.
953 *
954 * LOCKING:
955 * caller.
956 */
957
958static inline void ata_dump_id(struct ata_device *dev)
959{
960 DPRINTK("49==0x%04x "
961 "53==0x%04x "
962 "63==0x%04x "
963 "64==0x%04x "
964 "75==0x%04x \n",
965 dev->id[49],
966 dev->id[53],
967 dev->id[63],
968 dev->id[64],
969 dev->id[75]);
970 DPRINTK("80==0x%04x "
971 "81==0x%04x "
972 "82==0x%04x "
973 "83==0x%04x "
974 "84==0x%04x \n",
975 dev->id[80],
976 dev->id[81],
977 dev->id[82],
978 dev->id[83],
979 dev->id[84]);
980 DPRINTK("88==0x%04x "
981 "93==0x%04x\n",
982 dev->id[88],
983 dev->id[93]);
984}
985
986/**
987 * ata_dev_identify - obtain IDENTIFY x DEVICE page
988 * @ap: port on which device we wish to probe resides
989 * @device: device bus address, starting at zero
990 *
991 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
992 * command, and read back the 512-byte device information page.
993 * The device information page is fed to us via the standard
994 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
995 * using standard PIO-IN paths)
996 *
997 * After reading the device information page, we use several
998 * bits of information from it to initialize data structures
999 * that will be used during the lifetime of the ata_device.
1000 * Other data from the info page is used to disqualify certain
1001 * older ATA devices we do not wish to support.
1002 *
1003 * LOCKING:
1004 * Inherited from caller. Some functions called by this function
1005 * obtain the host_set lock.
1006 */
1007
1008static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1009{
1010 struct ata_device *dev = &ap->device[device];
1011 unsigned int i;
1012 u16 tmp;
1013 unsigned long xfer_modes;
1014 u8 status;
1015 unsigned int using_edd;
1016 DECLARE_COMPLETION(wait);
1017 struct ata_queued_cmd *qc;
1018 unsigned long flags;
1019 int rc;
1020
1021 if (!ata_dev_present(dev)) {
1022 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1023 ap->id, device);
1024 return;
1025 }
1026
1027 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1028 using_edd = 0;
1029 else
1030 using_edd = 1;
1031
1032 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1033
1034 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1035 dev->class == ATA_DEV_NONE);
1036
1037 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1038
1039 qc = ata_qc_new_init(ap, dev);
1040 BUG_ON(qc == NULL);
1041
1042 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
1043 qc->dma_dir = DMA_FROM_DEVICE;
1044 qc->tf.protocol = ATA_PROT_PIO;
1045 qc->nsect = 1;
1046
1047retry:
1048 if (dev->class == ATA_DEV_ATA) {
1049 qc->tf.command = ATA_CMD_ID_ATA;
1050 DPRINTK("do ATA identify\n");
1051 } else {
1052 qc->tf.command = ATA_CMD_ID_ATAPI;
1053 DPRINTK("do ATAPI identify\n");
1054 }
1055
1056 qc->waiting = &wait;
1057 qc->complete_fn = ata_qc_complete_noop;
1058
1059 spin_lock_irqsave(&ap->host_set->lock, flags);
1060 rc = ata_qc_issue(qc);
1061 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1062
1063 if (rc)
1064 goto err_out;
1065 else
1066 wait_for_completion(&wait);
1067
1068 status = ata_chk_status(ap);
1069 if (status & ATA_ERR) {
1070 /*
1071 * arg! EDD works for all test cases, but seems to return
1072 * the ATA signature for some ATAPI devices. Until the
1073 * reason for this is found and fixed, we fix up the mess
1074 * here. If IDENTIFY DEVICE returns command aborted
1075 * (as ATAPI devices do), then we issue an
1076 * IDENTIFY PACKET DEVICE.
1077 *
1078 * ATA software reset (SRST, the default) does not appear
1079 * to have this problem.
1080 */
1081 if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) {
1082 u8 err = ata_chk_err(ap);
1083 if (err & ATA_ABORTED) {
1084 dev->class = ATA_DEV_ATAPI;
1085 qc->cursg = 0;
1086 qc->cursg_ofs = 0;
1087 qc->cursect = 0;
1088 qc->nsect = 1;
1089 goto retry;
1090 }
1091 }
1092 goto err_out;
1093 }
1094
1095 swap_buf_le16(dev->id, ATA_ID_WORDS);
1096
1097 /* print device capabilities */
1098 printk(KERN_DEBUG "ata%u: dev %u cfg "
1099 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1100 ap->id, device, dev->id[49],
1101 dev->id[82], dev->id[83], dev->id[84],
1102 dev->id[85], dev->id[86], dev->id[87],
1103 dev->id[88]);
1104
1105 /*
1106 * common ATA, ATAPI feature tests
1107 */
1108
1109 /* we require LBA and DMA support (bits 8 & 9 of word 49) */
1110 if (!ata_id_has_dma(dev->id) || !ata_id_has_lba(dev->id)) {
1111 printk(KERN_DEBUG "ata%u: no dma/lba\n", ap->id);
1112 goto err_out_nosup;
1113 }
1114
1115 /* quick-n-dirty find max transfer mode; for printk only */
1116 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1117 if (!xfer_modes)
1118 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1119 if (!xfer_modes) {
1120 xfer_modes = (dev->id[ATA_ID_PIO_MODES]) << (ATA_SHIFT_PIO + 3);
1121 xfer_modes |= (0x7 << ATA_SHIFT_PIO);
1122 }
1123
1124 ata_dump_id(dev);
1125
1126 /* ATA-specific feature tests */
1127 if (dev->class == ATA_DEV_ATA) {
1128 if (!ata_id_is_ata(dev->id)) /* sanity check */
1129 goto err_out_nosup;
1130
1131 tmp = dev->id[ATA_ID_MAJOR_VER];
1132 for (i = 14; i >= 1; i--)
1133 if (tmp & (1 << i))
1134 break;
1135
1136 /* we require at least ATA-3 */
1137 if (i < 3) {
1138 printk(KERN_DEBUG "ata%u: no ATA-3\n", ap->id);
1139 goto err_out_nosup;
1140 }
1141
1142 if (ata_id_has_lba48(dev->id)) {
1143 dev->flags |= ATA_DFLAG_LBA48;
1144 dev->n_sectors = ata_id_u64(dev->id, 100);
1145 } else {
1146 dev->n_sectors = ata_id_u32(dev->id, 60);
1147 }
1148
1149 ap->host->max_cmd_len = 16;
1150
1151 /* print device info to dmesg */
1152 printk(KERN_INFO "ata%u: dev %u ATA, max %s, %Lu sectors:%s\n",
1153 ap->id, device,
1154 ata_mode_string(xfer_modes),
1155 (unsigned long long)dev->n_sectors,
1156 dev->flags & ATA_DFLAG_LBA48 ? " lba48" : "");
1157 }
1158
1159 /* ATAPI-specific feature tests */
1160 else {
1161 if (ata_id_is_ata(dev->id)) /* sanity check */
1162 goto err_out_nosup;
1163
1164 rc = atapi_cdb_len(dev->id);
1165 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1166 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1167 goto err_out_nosup;
1168 }
1169 ap->cdb_len = (unsigned int) rc;
1170 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1171
1172 /* print device info to dmesg */
1173 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1174 ap->id, device,
1175 ata_mode_string(xfer_modes));
1176 }
1177
1178 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1179 return;
1180
1181err_out_nosup:
1182 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1183 ap->id, device);
1184err_out:
1185 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1186 DPRINTK("EXIT, err\n");
1187}
1188
1189/**
1190 * ata_bus_probe - Reset and probe ATA bus
1191 * @ap: Bus to probe
1192 *
1193 * LOCKING:
1194 *
1195 * RETURNS:
1196 * Zero on success, non-zero on error.
1197 */
1198
1199static int ata_bus_probe(struct ata_port *ap)
1200{
1201 unsigned int i, found = 0;
1202
1203 ap->ops->phy_reset(ap);
1204 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1205 goto err_out;
1206
1207 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1208 ata_dev_identify(ap, i);
1209 if (ata_dev_present(&ap->device[i])) {
1210 found = 1;
1211 if (ap->ops->dev_config)
1212 ap->ops->dev_config(ap, &ap->device[i]);
1213 }
1214 }
1215
1216 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1217 goto err_out_disable;
1218
1219 ata_set_mode(ap);
1220 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1221 goto err_out_disable;
1222
1223 return 0;
1224
1225err_out_disable:
1226 ap->ops->port_disable(ap);
1227err_out:
1228 return -1;
1229}
1230
1231/**
1232 * ata_port_probe -
1233 * @ap:
1234 *
1235 * LOCKING:
1236 */
1237
1238void ata_port_probe(struct ata_port *ap)
1239{
1240 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1241}
1242
1243/**
1244 * __sata_phy_reset -
1245 * @ap:
1246 *
1247 * LOCKING:
1248 *
1249 */
1250void __sata_phy_reset(struct ata_port *ap)
1251{
1252 u32 sstatus;
1253 unsigned long timeout = jiffies + (HZ * 5);
1254
1255 if (ap->flags & ATA_FLAG_SATA_RESET) {
1256 scr_write(ap, SCR_CONTROL, 0x301); /* issue phy wake/reset */
1257 scr_read(ap, SCR_STATUS); /* dummy read; flush */
1258 udelay(400); /* FIXME: a guess */
1259 }
1260 scr_write(ap, SCR_CONTROL, 0x300); /* issue phy wake/clear reset */
1261
1262 /* wait for phy to become ready, if necessary */
1263 do {
1264 msleep(200);
1265 sstatus = scr_read(ap, SCR_STATUS);
1266 if ((sstatus & 0xf) != 1)
1267 break;
1268 } while (time_before(jiffies, timeout));
1269
1270 /* TODO: phy layer with polling, timeouts, etc. */
1271 if (sata_dev_present(ap))
1272 ata_port_probe(ap);
1273 else {
1274 sstatus = scr_read(ap, SCR_STATUS);
1275 printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n",
1276 ap->id, sstatus);
1277 ata_port_disable(ap);
1278 }
1279
1280 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1281 return;
1282
1283 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1284 ata_port_disable(ap);
1285 return;
1286 }
1287
1288 ap->cbl = ATA_CBL_SATA;
1289}
1290
1291/**
1292 * __sata_phy_reset -
1293 * @ap:
1294 *
1295 * LOCKING:
1296 *
1297 */
1298void sata_phy_reset(struct ata_port *ap)
1299{
1300 __sata_phy_reset(ap);
1301 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1302 return;
1303 ata_bus_reset(ap);
1304}
1305
1306/**
1307 * ata_port_disable -
1308 * @ap:
1309 *
1310 * LOCKING:
1311 */
1312
1313void ata_port_disable(struct ata_port *ap)
1314{
1315 ap->device[0].class = ATA_DEV_NONE;
1316 ap->device[1].class = ATA_DEV_NONE;
1317 ap->flags |= ATA_FLAG_PORT_DISABLED;
1318}
1319
1320static struct {
1321 unsigned int shift;
1322 u8 base;
1323} xfer_mode_classes[] = {
1324 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1325 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1326 { ATA_SHIFT_PIO, XFER_PIO_0 },
1327};
1328
1329static inline u8 base_from_shift(unsigned int shift)
1330{
1331 int i;
1332
1333 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1334 if (xfer_mode_classes[i].shift == shift)
1335 return xfer_mode_classes[i].base;
1336
1337 return 0xff;
1338}
1339
1340static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1341{
1342 int ofs, idx;
1343 u8 base;
1344
1345 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1346 return;
1347
1348 if (dev->xfer_shift == ATA_SHIFT_PIO)
1349 dev->flags |= ATA_DFLAG_PIO;
1350
1351 ata_dev_set_xfermode(ap, dev);
1352
1353 base = base_from_shift(dev->xfer_shift);
1354 ofs = dev->xfer_mode - base;
1355 idx = ofs + dev->xfer_shift;
1356 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1357
1358 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1359 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1360
1361 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1362 ap->id, dev->devno, xfer_mode_str[idx]);
1363}
1364
1365static int ata_host_set_pio(struct ata_port *ap)
1366{
1367 unsigned int mask;
1368 int x, i;
1369 u8 base, xfer_mode;
1370
1371 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1372 x = fgb(mask);
1373 if (x < 0) {
1374 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1375 return -1;
1376 }
1377
1378 base = base_from_shift(ATA_SHIFT_PIO);
1379 xfer_mode = base + x;
1380
1381 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1382 (int)base, (int)xfer_mode, mask, x);
1383
1384 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1385 struct ata_device *dev = &ap->device[i];
1386 if (ata_dev_present(dev)) {
1387 dev->pio_mode = xfer_mode;
1388 dev->xfer_mode = xfer_mode;
1389 dev->xfer_shift = ATA_SHIFT_PIO;
1390 if (ap->ops->set_piomode)
1391 ap->ops->set_piomode(ap, dev);
1392 }
1393 }
1394
1395 return 0;
1396}
1397
1398static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1399 unsigned int xfer_shift)
1400{
1401 int i;
1402
1403 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1404 struct ata_device *dev = &ap->device[i];
1405 if (ata_dev_present(dev)) {
1406 dev->dma_mode = xfer_mode;
1407 dev->xfer_mode = xfer_mode;
1408 dev->xfer_shift = xfer_shift;
1409 if (ap->ops->set_dmamode)
1410 ap->ops->set_dmamode(ap, dev);
1411 }
1412 }
1413}
1414
1415/**
1416 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1417 * @ap: port on which timings will be programmed
1418 *
1419 * LOCKING:
1420 *
1421 */
1422static void ata_set_mode(struct ata_port *ap)
1423{
1424 unsigned int i, xfer_shift;
1425 u8 xfer_mode;
1426 int rc;
1427
1428 /* step 1: always set host PIO timings */
1429 rc = ata_host_set_pio(ap);
1430 if (rc)
1431 goto err_out;
1432
1433 /* step 2: choose the best data xfer mode */
1434 xfer_mode = xfer_shift = 0;
1435 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1436 if (rc)
1437 goto err_out;
1438
1439 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1440 if (xfer_shift != ATA_SHIFT_PIO)
1441 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1442
1443 /* step 4: update devices' xfer mode */
1444 ata_dev_set_mode(ap, &ap->device[0]);
1445 ata_dev_set_mode(ap, &ap->device[1]);
1446
1447 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1448 return;
1449
1450 if (ap->ops->post_set_mode)
1451 ap->ops->post_set_mode(ap);
1452
1453 for (i = 0; i < 2; i++) {
1454 struct ata_device *dev = &ap->device[i];
1455 ata_dev_set_protocol(dev);
1456 }
1457
1458 return;
1459
1460err_out:
1461 ata_port_disable(ap);
1462}
1463
1464/**
1465 * ata_busy_sleep - sleep until BSY clears, or timeout
1466 * @ap: port containing status register to be polled
1467 * @tmout_pat: impatience timeout
1468 * @tmout: overall timeout
1469 *
1470 * LOCKING:
1471 *
1472 */
1473
1474static unsigned int ata_busy_sleep (struct ata_port *ap,
1475 unsigned long tmout_pat,
1476 unsigned long tmout)
1477{
1478 unsigned long timer_start, timeout;
1479 u8 status;
1480
1481 status = ata_busy_wait(ap, ATA_BUSY, 300);
1482 timer_start = jiffies;
1483 timeout = timer_start + tmout_pat;
1484 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1485 msleep(50);
1486 status = ata_busy_wait(ap, ATA_BUSY, 3);
1487 }
1488
1489 if (status & ATA_BUSY)
1490 printk(KERN_WARNING "ata%u is slow to respond, "
1491 "please be patient\n", ap->id);
1492
1493 timeout = timer_start + tmout;
1494 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1495 msleep(50);
1496 status = ata_chk_status(ap);
1497 }
1498
1499 if (status & ATA_BUSY) {
1500 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1501 ap->id, tmout / HZ);
1502 return 1;
1503 }
1504
1505 return 0;
1506}
1507
1508static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1509{
1510 struct ata_ioports *ioaddr = &ap->ioaddr;
1511 unsigned int dev0 = devmask & (1 << 0);
1512 unsigned int dev1 = devmask & (1 << 1);
1513 unsigned long timeout;
1514
1515 /* if device 0 was found in ata_devchk, wait for its
1516 * BSY bit to clear
1517 */
1518 if (dev0)
1519 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1520
1521 /* if device 1 was found in ata_devchk, wait for
1522 * register access, then wait for BSY to clear
1523 */
1524 timeout = jiffies + ATA_TMOUT_BOOT;
1525 while (dev1) {
1526 u8 nsect, lbal;
1527
1528 ap->ops->dev_select(ap, 1);
1529 if (ap->flags & ATA_FLAG_MMIO) {
1530 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1531 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1532 } else {
1533 nsect = inb(ioaddr->nsect_addr);
1534 lbal = inb(ioaddr->lbal_addr);
1535 }
1536 if ((nsect == 1) && (lbal == 1))
1537 break;
1538 if (time_after(jiffies, timeout)) {
1539 dev1 = 0;
1540 break;
1541 }
1542 msleep(50); /* give drive a breather */
1543 }
1544 if (dev1)
1545 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1546
1547 /* is all this really necessary? */
1548 ap->ops->dev_select(ap, 0);
1549 if (dev1)
1550 ap->ops->dev_select(ap, 1);
1551 if (dev0)
1552 ap->ops->dev_select(ap, 0);
1553}
1554
1555/**
1556 * ata_bus_edd -
1557 * @ap:
1558 *
1559 * LOCKING:
1560 *
1561 */
1562
1563static unsigned int ata_bus_edd(struct ata_port *ap)
1564{
1565 struct ata_taskfile tf;
1566
1567 /* set up execute-device-diag (bus reset) taskfile */
1568 /* also, take interrupts to a known state (disabled) */
1569 DPRINTK("execute-device-diag\n");
1570 ata_tf_init(ap, &tf, 0);
1571 tf.ctl |= ATA_NIEN;
1572 tf.command = ATA_CMD_EDD;
1573 tf.protocol = ATA_PROT_NODATA;
1574
1575 /* do bus reset */
1576 ata_tf_to_host(ap, &tf);
1577
1578 /* spec says at least 2ms. but who knows with those
1579 * crazy ATAPI devices...
1580 */
1581 msleep(150);
1582
1583 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1584}
1585
1586static unsigned int ata_bus_softreset(struct ata_port *ap,
1587 unsigned int devmask)
1588{
1589 struct ata_ioports *ioaddr = &ap->ioaddr;
1590
1591 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1592
1593 /* software reset. causes dev0 to be selected */
1594 if (ap->flags & ATA_FLAG_MMIO) {
1595 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1596 udelay(20); /* FIXME: flush */
1597 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1598 udelay(20); /* FIXME: flush */
1599 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1600 } else {
1601 outb(ap->ctl, ioaddr->ctl_addr);
1602 udelay(10);
1603 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1604 udelay(10);
1605 outb(ap->ctl, ioaddr->ctl_addr);
1606 }
1607
1608 /* spec mandates ">= 2ms" before checking status.
1609 * We wait 150ms, because that was the magic delay used for
1610 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1611 * between when the ATA command register is written, and then
1612 * status is checked. Because waiting for "a while" before
1613 * checking status is fine, post SRST, we perform this magic
1614 * delay here as well.
1615 */
1616 msleep(150);
1617
1618 ata_bus_post_reset(ap, devmask);
1619
1620 return 0;
1621}
1622
1623/**
1624 * ata_bus_reset - reset host port and associated ATA channel
1625 * @ap: port to reset
1626 *
1627 * This is typically the first time we actually start issuing
1628 * commands to the ATA channel. We wait for BSY to clear, then
1629 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1630 * result. Determine what devices, if any, are on the channel
1631 * by looking at the device 0/1 error register. Look at the signature
1632 * stored in each device's taskfile registers, to determine if
1633 * the device is ATA or ATAPI.
1634 *
1635 * LOCKING:
1636 * Inherited from caller. Some functions called by this function
1637 * obtain the host_set lock.
1638 *
1639 * SIDE EFFECTS:
1640 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1641 */
1642
1643void ata_bus_reset(struct ata_port *ap)
1644{
1645 struct ata_ioports *ioaddr = &ap->ioaddr;
1646 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1647 u8 err;
1648 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1649
1650 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1651
1652 /* determine if device 0/1 are present */
1653 if (ap->flags & ATA_FLAG_SATA_RESET)
1654 dev0 = 1;
1655 else {
1656 dev0 = ata_devchk(ap, 0);
1657 if (slave_possible)
1658 dev1 = ata_devchk(ap, 1);
1659 }
1660
1661 if (dev0)
1662 devmask |= (1 << 0);
1663 if (dev1)
1664 devmask |= (1 << 1);
1665
1666 /* select device 0 again */
1667 ap->ops->dev_select(ap, 0);
1668
1669 /* issue bus reset */
1670 if (ap->flags & ATA_FLAG_SRST)
1671 rc = ata_bus_softreset(ap, devmask);
1672 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
1673 /* set up device control */
1674 if (ap->flags & ATA_FLAG_MMIO)
1675 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1676 else
1677 outb(ap->ctl, ioaddr->ctl_addr);
1678 rc = ata_bus_edd(ap);
1679 }
1680
1681 if (rc)
1682 goto err_out;
1683
1684 /*
1685 * determine by signature whether we have ATA or ATAPI devices
1686 */
1687 err = ata_dev_try_classify(ap, 0);
1688 if ((slave_possible) && (err != 0x81))
1689 ata_dev_try_classify(ap, 1);
1690
1691 /* re-enable interrupts */
1692 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
1693 ata_irq_on(ap);
1694
1695 /* is double-select really necessary? */
1696 if (ap->device[1].class != ATA_DEV_NONE)
1697 ap->ops->dev_select(ap, 1);
1698 if (ap->device[0].class != ATA_DEV_NONE)
1699 ap->ops->dev_select(ap, 0);
1700
1701 /* if no devices were detected, disable this port */
1702 if ((ap->device[0].class == ATA_DEV_NONE) &&
1703 (ap->device[1].class == ATA_DEV_NONE))
1704 goto err_out;
1705
1706 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
1707 /* set up device control for ATA_FLAG_SATA_RESET */
1708 if (ap->flags & ATA_FLAG_MMIO)
1709 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1710 else
1711 outb(ap->ctl, ioaddr->ctl_addr);
1712 }
1713
1714 DPRINTK("EXIT\n");
1715 return;
1716
1717err_out:
1718 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
1719 ap->ops->port_disable(ap);
1720
1721 DPRINTK("EXIT\n");
1722}
1723
1724static void ata_pr_blacklisted(struct ata_port *ap, struct ata_device *dev)
1725{
1726 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
1727 ap->id, dev->devno);
1728}
1729
1730static const char * ata_dma_blacklist [] = {
1731 "WDC AC11000H",
1732 "WDC AC22100H",
1733 "WDC AC32500H",
1734 "WDC AC33100H",
1735 "WDC AC31600H",
1736 "WDC AC32100H",
1737 "WDC AC23200L",
1738 "Compaq CRD-8241B",
1739 "CRD-8400B",
1740 "CRD-8480B",
1741 "CRD-8482B",
1742 "CRD-84",
1743 "SanDisk SDP3B",
1744 "SanDisk SDP3B-64",
1745 "SANYO CD-ROM CRD",
1746 "HITACHI CDR-8",
1747 "HITACHI CDR-8335",
1748 "HITACHI CDR-8435",
1749 "Toshiba CD-ROM XM-6202B",
1750 "CD-532E-A",
1751 "E-IDE CD-ROM CR-840",
1752 "CD-ROM Drive/F5A",
1753 "WPI CDD-820",
1754 "SAMSUNG CD-ROM SC-148C",
1755 "SAMSUNG CD-ROM SC",
1756 "SanDisk SDP3B-64",
1757 "SAMSUNG CD-ROM SN-124",
1758 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
1759 "_NEC DV5800A",
1760};
1761
1762static int ata_dma_blacklisted(struct ata_port *ap, struct ata_device *dev)
1763{
1764 unsigned char model_num[40];
1765 char *s;
1766 unsigned int len;
1767 int i;
1768
1769 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
1770 sizeof(model_num));
1771 s = &model_num[0];
1772 len = strnlen(s, sizeof(model_num));
1773
1774 /* ATAPI specifies that empty space is blank-filled; remove blanks */
1775 while ((len > 0) && (s[len - 1] == ' ')) {
1776 len--;
1777 s[len] = 0;
1778 }
1779
1780 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
1781 if (!strncmp(ata_dma_blacklist[i], s, len))
1782 return 1;
1783
1784 return 0;
1785}
1786
1787static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift)
1788{
1789 struct ata_device *master, *slave;
1790 unsigned int mask;
1791
1792 master = &ap->device[0];
1793 slave = &ap->device[1];
1794
1795 assert (ata_dev_present(master) || ata_dev_present(slave));
1796
1797 if (shift == ATA_SHIFT_UDMA) {
1798 mask = ap->udma_mask;
1799 if (ata_dev_present(master)) {
1800 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
1801 if (ata_dma_blacklisted(ap, master)) {
1802 mask = 0;
1803 ata_pr_blacklisted(ap, master);
1804 }
1805 }
1806 if (ata_dev_present(slave)) {
1807 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
1808 if (ata_dma_blacklisted(ap, slave)) {
1809 mask = 0;
1810 ata_pr_blacklisted(ap, slave);
1811 }
1812 }
1813 }
1814 else if (shift == ATA_SHIFT_MWDMA) {
1815 mask = ap->mwdma_mask;
1816 if (ata_dev_present(master)) {
1817 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
1818 if (ata_dma_blacklisted(ap, master)) {
1819 mask = 0;
1820 ata_pr_blacklisted(ap, master);
1821 }
1822 }
1823 if (ata_dev_present(slave)) {
1824 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
1825 if (ata_dma_blacklisted(ap, slave)) {
1826 mask = 0;
1827 ata_pr_blacklisted(ap, slave);
1828 }
1829 }
1830 }
1831 else if (shift == ATA_SHIFT_PIO) {
1832 mask = ap->pio_mask;
1833 if (ata_dev_present(master)) {
1834 /* spec doesn't return explicit support for
1835 * PIO0-2, so we fake it
1836 */
1837 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
1838 tmp_mode <<= 3;
1839 tmp_mode |= 0x7;
1840 mask &= tmp_mode;
1841 }
1842 if (ata_dev_present(slave)) {
1843 /* spec doesn't return explicit support for
1844 * PIO0-2, so we fake it
1845 */
1846 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
1847 tmp_mode <<= 3;
1848 tmp_mode |= 0x7;
1849 mask &= tmp_mode;
1850 }
1851 }
1852 else {
1853 mask = 0xffffffff; /* shut up compiler warning */
1854 BUG();
1855 }
1856
1857 return mask;
1858}
1859
1860/* find greatest bit */
1861static int fgb(u32 bitmap)
1862{
1863 unsigned int i;
1864 int x = -1;
1865
1866 for (i = 0; i < 32; i++)
1867 if (bitmap & (1 << i))
1868 x = i;
1869
1870 return x;
1871}
1872
1873/**
1874 * ata_choose_xfer_mode - attempt to find best transfer mode
1875 * @ap: Port for which an xfer mode will be selected
1876 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
1877 * @xfer_shift_out: (output) bit shift that selects this mode
1878 *
1879 * LOCKING:
1880 *
1881 * RETURNS:
1882 * Zero on success, negative on error.
1883 */
1884
1885static int ata_choose_xfer_mode(struct ata_port *ap,
1886 u8 *xfer_mode_out,
1887 unsigned int *xfer_shift_out)
1888{
1889 unsigned int mask, shift;
1890 int x, i;
1891
1892 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
1893 shift = xfer_mode_classes[i].shift;
1894 mask = ata_get_mode_mask(ap, shift);
1895
1896 x = fgb(mask);
1897 if (x >= 0) {
1898 *xfer_mode_out = xfer_mode_classes[i].base + x;
1899 *xfer_shift_out = shift;
1900 return 0;
1901 }
1902 }
1903
1904 return -1;
1905}
1906
1907/**
1908 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
1909 * @ap: Port associated with device @dev
1910 * @dev: Device to which command will be sent
1911 *
1912 * LOCKING:
1913 */
1914
1915static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
1916{
1917 DECLARE_COMPLETION(wait);
1918 struct ata_queued_cmd *qc;
1919 int rc;
1920 unsigned long flags;
1921
1922 /* set up set-features taskfile */
1923 DPRINTK("set features - xfer mode\n");
1924
1925 qc = ata_qc_new_init(ap, dev);
1926 BUG_ON(qc == NULL);
1927
1928 qc->tf.command = ATA_CMD_SET_FEATURES;
1929 qc->tf.feature = SETFEATURES_XFER;
1930 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1931 qc->tf.protocol = ATA_PROT_NODATA;
1932 qc->tf.nsect = dev->xfer_mode;
1933
1934 qc->waiting = &wait;
1935 qc->complete_fn = ata_qc_complete_noop;
1936
1937 spin_lock_irqsave(&ap->host_set->lock, flags);
1938 rc = ata_qc_issue(qc);
1939 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1940
1941 if (rc)
1942 ata_port_disable(ap);
1943 else
1944 wait_for_completion(&wait);
1945
1946 DPRINTK("EXIT\n");
1947}
1948
1949/**
1950 * ata_sg_clean -
1951 * @qc:
1952 *
1953 * LOCKING:
1954 */
1955
1956static void ata_sg_clean(struct ata_queued_cmd *qc)
1957{
1958 struct ata_port *ap = qc->ap;
1959 struct scatterlist *sg = qc->sg;
1960 int dir = qc->dma_dir;
1961
1962 assert(qc->flags & ATA_QCFLAG_DMAMAP);
1963 assert(sg != NULL);
1964
1965 if (qc->flags & ATA_QCFLAG_SINGLE)
1966 assert(qc->n_elem == 1);
1967
1968 DPRINTK("unmapping %u sg elements\n", qc->n_elem);
1969
1970 if (qc->flags & ATA_QCFLAG_SG)
1971 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
1972 else
1973 dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]),
1974 sg_dma_len(&sg[0]), dir);
1975
1976 qc->flags &= ~ATA_QCFLAG_DMAMAP;
1977 qc->sg = NULL;
1978}
1979
1980/**
1981 * ata_fill_sg - Fill PCI IDE PRD table
1982 * @qc: Metadata associated with taskfile to be transferred
1983 *
1984 * LOCKING:
1985 *
1986 */
1987static void ata_fill_sg(struct ata_queued_cmd *qc)
1988{
1989 struct scatterlist *sg = qc->sg;
1990 struct ata_port *ap = qc->ap;
1991 unsigned int idx, nelem;
1992
1993 assert(sg != NULL);
1994 assert(qc->n_elem > 0);
1995
1996 idx = 0;
1997 for (nelem = qc->n_elem; nelem; nelem--,sg++) {
1998 u32 addr, offset;
1999 u32 sg_len, len;
2000
2001 /* determine if physical DMA addr spans 64K boundary.
2002 * Note h/w doesn't support 64-bit, so we unconditionally
2003 * truncate dma_addr_t to u32.
2004 */
2005 addr = (u32) sg_dma_address(sg);
2006 sg_len = sg_dma_len(sg);
2007
2008 while (sg_len) {
2009 offset = addr & 0xffff;
2010 len = sg_len;
2011 if ((offset + sg_len) > 0x10000)
2012 len = 0x10000 - offset;
2013
2014 ap->prd[idx].addr = cpu_to_le32(addr);
2015 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2016 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2017
2018 idx++;
2019 sg_len -= len;
2020 addr += len;
2021 }
2022 }
2023
2024 if (idx)
2025 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2026}
2027/**
2028 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2029 * @qc: Metadata associated with taskfile to check
2030 *
2031 * LOCKING:
2032 * RETURNS: 0 when ATAPI DMA can be used
2033 * nonzero otherwise
2034 */
2035int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2036{
2037 struct ata_port *ap = qc->ap;
2038 int rc = 0; /* Assume ATAPI DMA is OK by default */
2039
2040 if (ap->ops->check_atapi_dma)
2041 rc = ap->ops->check_atapi_dma(qc);
2042
2043 return rc;
2044}
2045/**
2046 * ata_qc_prep - Prepare taskfile for submission
2047 * @qc: Metadata associated with taskfile to be prepared
2048 *
2049 * LOCKING:
2050 * spin_lock_irqsave(host_set lock)
2051 */
2052void ata_qc_prep(struct ata_queued_cmd *qc)
2053{
2054 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2055 return;
2056
2057 ata_fill_sg(qc);
2058}
2059
2060void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2061{
2062 struct scatterlist *sg;
2063
2064 qc->flags |= ATA_QCFLAG_SINGLE;
2065
2066 memset(&qc->sgent, 0, sizeof(qc->sgent));
2067 qc->sg = &qc->sgent;
2068 qc->n_elem = 1;
2069 qc->buf_virt = buf;
2070
2071 sg = qc->sg;
2072 sg->page = virt_to_page(buf);
2073 sg->offset = (unsigned long) buf & ~PAGE_MASK;
2074 sg_dma_len(sg) = buflen;
2075}
2076
2077void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2078 unsigned int n_elem)
2079{
2080 qc->flags |= ATA_QCFLAG_SG;
2081 qc->sg = sg;
2082 qc->n_elem = n_elem;
2083}
2084
2085/**
2086 * ata_sg_setup_one -
2087 * @qc:
2088 *
2089 * LOCKING:
2090 * spin_lock_irqsave(host_set lock)
2091 *
2092 * RETURNS:
2093 *
2094 */
2095
2096static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2097{
2098 struct ata_port *ap = qc->ap;
2099 int dir = qc->dma_dir;
2100 struct scatterlist *sg = qc->sg;
2101 dma_addr_t dma_address;
2102
2103 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2104 sg_dma_len(sg), dir);
2105 if (dma_mapping_error(dma_address))
2106 return -1;
2107
2108 sg_dma_address(sg) = dma_address;
2109
2110 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2111 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2112
2113 return 0;
2114}
2115
2116/**
2117 * ata_sg_setup -
2118 * @qc:
2119 *
2120 * LOCKING:
2121 * spin_lock_irqsave(host_set lock)
2122 *
2123 * RETURNS:
2124 *
2125 */
2126
2127static int ata_sg_setup(struct ata_queued_cmd *qc)
2128{
2129 struct ata_port *ap = qc->ap;
2130 struct scatterlist *sg = qc->sg;
2131 int n_elem, dir;
2132
2133 VPRINTK("ENTER, ata%u\n", ap->id);
2134 assert(qc->flags & ATA_QCFLAG_SG);
2135
2136 dir = qc->dma_dir;
2137 n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2138 if (n_elem < 1)
2139 return -1;
2140
2141 DPRINTK("%d sg elements mapped\n", n_elem);
2142
2143 qc->n_elem = n_elem;
2144
2145 return 0;
2146}
2147
2148/**
2149 * ata_pio_poll -
2150 * @ap:
2151 *
2152 * LOCKING:
2153 *
2154 * RETURNS:
2155 *
2156 */
2157
2158static unsigned long ata_pio_poll(struct ata_port *ap)
2159{
2160 u8 status;
2161 unsigned int poll_state = PIO_ST_UNKNOWN;
2162 unsigned int reg_state = PIO_ST_UNKNOWN;
2163 const unsigned int tmout_state = PIO_ST_TMOUT;
2164
2165 switch (ap->pio_task_state) {
2166 case PIO_ST:
2167 case PIO_ST_POLL:
2168 poll_state = PIO_ST_POLL;
2169 reg_state = PIO_ST;
2170 break;
2171 case PIO_ST_LAST:
2172 case PIO_ST_LAST_POLL:
2173 poll_state = PIO_ST_LAST_POLL;
2174 reg_state = PIO_ST_LAST;
2175 break;
2176 default:
2177 BUG();
2178 break;
2179 }
2180
2181 status = ata_chk_status(ap);
2182 if (status & ATA_BUSY) {
2183 if (time_after(jiffies, ap->pio_task_timeout)) {
2184 ap->pio_task_state = tmout_state;
2185 return 0;
2186 }
2187 ap->pio_task_state = poll_state;
2188 return ATA_SHORT_PAUSE;
2189 }
2190
2191 ap->pio_task_state = reg_state;
2192 return 0;
2193}
2194
2195/**
2196 * ata_pio_complete -
2197 * @ap:
2198 *
2199 * LOCKING:
2200 */
2201
2202static void ata_pio_complete (struct ata_port *ap)
2203{
2204 struct ata_queued_cmd *qc;
2205 u8 drv_stat;
2206
2207 /*
2208 * This is purely hueristic. This is a fast path.
2209 * Sometimes when we enter, BSY will be cleared in
2210 * a chk-status or two. If not, the drive is probably seeking
2211 * or something. Snooze for a couple msecs, then
2212 * chk-status again. If still busy, fall back to
2213 * PIO_ST_POLL state.
2214 */
2215 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2216 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2217 msleep(2);
2218 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2219 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2220 ap->pio_task_state = PIO_ST_LAST_POLL;
2221 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2222 return;
2223 }
2224 }
2225
2226 drv_stat = ata_wait_idle(ap);
2227 if (!ata_ok(drv_stat)) {
2228 ap->pio_task_state = PIO_ST_ERR;
2229 return;
2230 }
2231
2232 qc = ata_qc_from_tag(ap, ap->active_tag);
2233 assert(qc != NULL);
2234
2235 ap->pio_task_state = PIO_ST_IDLE;
2236
2237 ata_irq_on(ap);
2238
2239 ata_qc_complete(qc, drv_stat);
2240}
2241
2242void swap_buf_le16(u16 *buf, unsigned int buf_words)
2243{
2244#ifdef __BIG_ENDIAN
2245 unsigned int i;
2246
2247 for (i = 0; i < buf_words; i++)
2248 buf[i] = le16_to_cpu(buf[i]);
2249#endif /* __BIG_ENDIAN */
2250}
2251
2252static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2253 unsigned int buflen, int write_data)
2254{
2255 unsigned int i;
2256 unsigned int words = buflen >> 1;
2257 u16 *buf16 = (u16 *) buf;
2258 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
2259
2260 if (write_data) {
2261 for (i = 0; i < words; i++)
2262 writew(le16_to_cpu(buf16[i]), mmio);
2263 } else {
2264 for (i = 0; i < words; i++)
2265 buf16[i] = cpu_to_le16(readw(mmio));
2266 }
2267}
2268
2269static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
2270 unsigned int buflen, int write_data)
2271{
2272 unsigned int dwords = buflen >> 1;
2273
2274 if (write_data)
2275 outsw(ap->ioaddr.data_addr, buf, dwords);
2276 else
2277 insw(ap->ioaddr.data_addr, buf, dwords);
2278}
2279
2280static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
2281 unsigned int buflen, int do_write)
2282{
2283 if (ap->flags & ATA_FLAG_MMIO)
2284 ata_mmio_data_xfer(ap, buf, buflen, do_write);
2285 else
2286 ata_pio_data_xfer(ap, buf, buflen, do_write);
2287}
2288
2289static void ata_pio_sector(struct ata_queued_cmd *qc)
2290{
2291 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2292 struct scatterlist *sg = qc->sg;
2293 struct ata_port *ap = qc->ap;
2294 struct page *page;
2295 unsigned int offset;
2296 unsigned char *buf;
2297
2298 if (qc->cursect == (qc->nsect - 1))
2299 ap->pio_task_state = PIO_ST_LAST;
2300
2301 page = sg[qc->cursg].page;
2302 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
2303
2304 /* get the current page and offset */
2305 page = nth_page(page, (offset >> PAGE_SHIFT));
2306 offset %= PAGE_SIZE;
2307
2308 buf = kmap(page) + offset;
2309
2310 qc->cursect++;
2311 qc->cursg_ofs++;
2312
2313 if ((qc->cursg_ofs * ATA_SECT_SIZE) == sg_dma_len(&sg[qc->cursg])) {
2314 qc->cursg++;
2315 qc->cursg_ofs = 0;
2316 }
2317
2318 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2319
2320 /* do the actual data transfer */
2321 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2322 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
2323
2324 kunmap(page);
2325}
2326
2327static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
2328{
2329 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2330 struct scatterlist *sg = qc->sg;
2331 struct ata_port *ap = qc->ap;
2332 struct page *page;
2333 unsigned char *buf;
2334 unsigned int offset, count;
2335
2336 if (qc->curbytes == qc->nbytes - bytes)
2337 ap->pio_task_state = PIO_ST_LAST;
2338
2339next_sg:
2340 sg = &qc->sg[qc->cursg];
2341
2342next_page:
2343 page = sg->page;
2344 offset = sg->offset + qc->cursg_ofs;
2345
2346 /* get the current page and offset */
2347 page = nth_page(page, (offset >> PAGE_SHIFT));
2348 offset %= PAGE_SIZE;
2349
2350 count = min(sg_dma_len(sg) - qc->cursg_ofs, bytes);
2351
2352 /* don't cross page boundaries */
2353 count = min(count, (unsigned int)PAGE_SIZE - offset);
2354
2355 buf = kmap(page) + offset;
2356
2357 bytes -= count;
2358 qc->curbytes += count;
2359 qc->cursg_ofs += count;
2360
2361 if (qc->cursg_ofs == sg_dma_len(sg)) {
2362 qc->cursg++;
2363 qc->cursg_ofs = 0;
2364 }
2365
2366 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2367
2368 /* do the actual data transfer */
2369 ata_data_xfer(ap, buf, count, do_write);
2370
2371 kunmap(page);
2372
2373 if (bytes) {
2374 if (qc->cursg_ofs < sg_dma_len(sg))
2375 goto next_page;
2376 goto next_sg;
2377 }
2378}
2379
2380static void atapi_pio_bytes(struct ata_queued_cmd *qc)
2381{
2382 struct ata_port *ap = qc->ap;
2383 struct ata_device *dev = qc->dev;
2384 unsigned int ireason, bc_lo, bc_hi, bytes;
2385 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
2386
2387 ap->ops->tf_read(ap, &qc->tf);
2388 ireason = qc->tf.nsect;
2389 bc_lo = qc->tf.lbam;
2390 bc_hi = qc->tf.lbah;
2391 bytes = (bc_hi << 8) | bc_lo;
2392
2393 /* shall be cleared to zero, indicating xfer of data */
2394 if (ireason & (1 << 0))
2395 goto err_out;
2396
2397 /* make sure transfer direction matches expected */
2398 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
2399 if (do_write != i_write)
2400 goto err_out;
2401
2402 __atapi_pio_bytes(qc, bytes);
2403
2404 return;
2405
2406err_out:
2407 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
2408 ap->id, dev->devno);
2409 ap->pio_task_state = PIO_ST_ERR;
2410}
2411
2412/**
2413 * ata_pio_sector -
2414 * @ap:
2415 *
2416 * LOCKING:
2417 */
2418
2419static void ata_pio_block(struct ata_port *ap)
2420{
2421 struct ata_queued_cmd *qc;
2422 u8 status;
2423
2424 /*
2425 * This is purely hueristic. This is a fast path.
2426 * Sometimes when we enter, BSY will be cleared in
2427 * a chk-status or two. If not, the drive is probably seeking
2428 * or something. Snooze for a couple msecs, then
2429 * chk-status again. If still busy, fall back to
2430 * PIO_ST_POLL state.
2431 */
2432 status = ata_busy_wait(ap, ATA_BUSY, 5);
2433 if (status & ATA_BUSY) {
2434 msleep(2);
2435 status = ata_busy_wait(ap, ATA_BUSY, 10);
2436 if (status & ATA_BUSY) {
2437 ap->pio_task_state = PIO_ST_POLL;
2438 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2439 return;
2440 }
2441 }
2442
2443 qc = ata_qc_from_tag(ap, ap->active_tag);
2444 assert(qc != NULL);
2445
2446 if (is_atapi_taskfile(&qc->tf)) {
2447 /* no more data to transfer or unsupported ATAPI command */
2448 if ((status & ATA_DRQ) == 0) {
2449 ap->pio_task_state = PIO_ST_IDLE;
2450
2451 ata_irq_on(ap);
2452
2453 ata_qc_complete(qc, status);
2454 return;
2455 }
2456
2457 atapi_pio_bytes(qc);
2458 } else {
2459 /* handle BSY=0, DRQ=0 as error */
2460 if ((status & ATA_DRQ) == 0) {
2461 ap->pio_task_state = PIO_ST_ERR;
2462 return;
2463 }
2464
2465 ata_pio_sector(qc);
2466 }
2467}
2468
2469static void ata_pio_error(struct ata_port *ap)
2470{
2471 struct ata_queued_cmd *qc;
2472 u8 drv_stat;
2473
2474 qc = ata_qc_from_tag(ap, ap->active_tag);
2475 assert(qc != NULL);
2476
2477 drv_stat = ata_chk_status(ap);
2478 printk(KERN_WARNING "ata%u: PIO error, drv_stat 0x%x\n",
2479 ap->id, drv_stat);
2480
2481 ap->pio_task_state = PIO_ST_IDLE;
2482
2483 ata_irq_on(ap);
2484
2485 ata_qc_complete(qc, drv_stat | ATA_ERR);
2486}
2487
2488static void ata_pio_task(void *_data)
2489{
2490 struct ata_port *ap = _data;
2491 unsigned long timeout = 0;
2492
2493 switch (ap->pio_task_state) {
2494 case PIO_ST_IDLE:
2495 return;
2496
2497 case PIO_ST:
2498 ata_pio_block(ap);
2499 break;
2500
2501 case PIO_ST_LAST:
2502 ata_pio_complete(ap);
2503 break;
2504
2505 case PIO_ST_POLL:
2506 case PIO_ST_LAST_POLL:
2507 timeout = ata_pio_poll(ap);
2508 break;
2509
2510 case PIO_ST_TMOUT:
2511 case PIO_ST_ERR:
2512 ata_pio_error(ap);
2513 return;
2514 }
2515
2516 if (timeout)
2517 queue_delayed_work(ata_wq, &ap->pio_task,
2518 timeout);
2519 else
2520 queue_work(ata_wq, &ap->pio_task);
2521}
2522
2523static void atapi_request_sense(struct ata_port *ap, struct ata_device *dev,
2524 struct scsi_cmnd *cmd)
2525{
2526 DECLARE_COMPLETION(wait);
2527 struct ata_queued_cmd *qc;
2528 unsigned long flags;
2529 int rc;
2530
2531 DPRINTK("ATAPI request sense\n");
2532
2533 qc = ata_qc_new_init(ap, dev);
2534 BUG_ON(qc == NULL);
2535
2536 /* FIXME: is this needed? */
2537 memset(cmd->sense_buffer, 0, sizeof(cmd->sense_buffer));
2538
2539 ata_sg_init_one(qc, cmd->sense_buffer, sizeof(cmd->sense_buffer));
2540 qc->dma_dir = DMA_FROM_DEVICE;
2541
2542 memset(&qc->cdb, 0, sizeof(ap->cdb_len));
2543 qc->cdb[0] = REQUEST_SENSE;
2544 qc->cdb[4] = SCSI_SENSE_BUFFERSIZE;
2545
2546 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2547 qc->tf.command = ATA_CMD_PACKET;
2548
2549 qc->tf.protocol = ATA_PROT_ATAPI;
2550 qc->tf.lbam = (8 * 1024) & 0xff;
2551 qc->tf.lbah = (8 * 1024) >> 8;
2552 qc->nbytes = SCSI_SENSE_BUFFERSIZE;
2553
2554 qc->waiting = &wait;
2555 qc->complete_fn = ata_qc_complete_noop;
2556
2557 spin_lock_irqsave(&ap->host_set->lock, flags);
2558 rc = ata_qc_issue(qc);
2559 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2560
2561 if (rc)
2562 ata_port_disable(ap);
2563 else
2564 wait_for_completion(&wait);
2565
2566 DPRINTK("EXIT\n");
2567}
2568
2569/**
2570 * ata_qc_timeout - Handle timeout of queued command
2571 * @qc: Command that timed out
2572 *
2573 * Some part of the kernel (currently, only the SCSI layer)
2574 * has noticed that the active command on port @ap has not
2575 * completed after a specified length of time. Handle this
2576 * condition by disabling DMA (if necessary) and completing
2577 * transactions, with error if necessary.
2578 *
2579 * This also handles the case of the "lost interrupt", where
2580 * for some reason (possibly hardware bug, possibly driver bug)
2581 * an interrupt was not delivered to the driver, even though the
2582 * transaction completed successfully.
2583 *
2584 * LOCKING:
2585 */
2586
2587static void ata_qc_timeout(struct ata_queued_cmd *qc)
2588{
2589 struct ata_port *ap = qc->ap;
2590 struct ata_device *dev = qc->dev;
2591 u8 host_stat = 0, drv_stat;
2592
2593 DPRINTK("ENTER\n");
2594
2595 /* FIXME: doesn't this conflict with timeout handling? */
2596 if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) {
2597 struct scsi_cmnd *cmd = qc->scsicmd;
2598
2599 if (!scsi_eh_eflags_chk(cmd, SCSI_EH_CANCEL_CMD)) {
2600
2601 /* finish completing original command */
2602 __ata_qc_complete(qc);
2603
2604 atapi_request_sense(ap, dev, cmd);
2605
2606 cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16);
2607 scsi_finish_command(cmd);
2608
2609 goto out;
2610 }
2611 }
2612
2613 /* hack alert! We cannot use the supplied completion
2614 * function from inside the ->eh_strategy_handler() thread.
2615 * libata is the only user of ->eh_strategy_handler() in
2616 * any kernel, so the default scsi_done() assumes it is
2617 * not being called from the SCSI EH.
2618 */
2619 qc->scsidone = scsi_finish_command;
2620
2621 switch (qc->tf.protocol) {
2622
2623 case ATA_PROT_DMA:
2624 case ATA_PROT_ATAPI_DMA:
2625 host_stat = ap->ops->bmdma_status(ap);
2626
2627 /* before we do anything else, clear DMA-Start bit */
2628 ap->ops->bmdma_stop(ap);
2629
2630 /* fall through */
2631
2632 default:
2633 ata_altstatus(ap);
2634 drv_stat = ata_chk_status(ap);
2635
2636 /* ack bmdma irq events */
2637 ap->ops->irq_clear(ap);
2638
2639 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
2640 ap->id, qc->tf.command, drv_stat, host_stat);
2641
2642 /* complete taskfile transaction */
2643 ata_qc_complete(qc, drv_stat);
2644 break;
2645 }
2646out:
2647 DPRINTK("EXIT\n");
2648}
2649
2650/**
2651 * ata_eng_timeout - Handle timeout of queued command
2652 * @ap: Port on which timed-out command is active
2653 *
2654 * Some part of the kernel (currently, only the SCSI layer)
2655 * has noticed that the active command on port @ap has not
2656 * completed after a specified length of time. Handle this
2657 * condition by disabling DMA (if necessary) and completing
2658 * transactions, with error if necessary.
2659 *
2660 * This also handles the case of the "lost interrupt", where
2661 * for some reason (possibly hardware bug, possibly driver bug)
2662 * an interrupt was not delivered to the driver, even though the
2663 * transaction completed successfully.
2664 *
2665 * LOCKING:
2666 * Inherited from SCSI layer (none, can sleep)
2667 */
2668
2669void ata_eng_timeout(struct ata_port *ap)
2670{
2671 struct ata_queued_cmd *qc;
2672
2673 DPRINTK("ENTER\n");
2674
2675 qc = ata_qc_from_tag(ap, ap->active_tag);
2676 if (!qc) {
2677 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
2678 ap->id);
2679 goto out;
2680 }
2681
2682 ata_qc_timeout(qc);
2683
2684out:
2685 DPRINTK("EXIT\n");
2686}
2687
2688/**
2689 * ata_qc_new - Request an available ATA command, for queueing
2690 * @ap: Port associated with device @dev
2691 * @dev: Device from whom we request an available command structure
2692 *
2693 * LOCKING:
2694 */
2695
2696static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
2697{
2698 struct ata_queued_cmd *qc = NULL;
2699 unsigned int i;
2700
2701 for (i = 0; i < ATA_MAX_QUEUE; i++)
2702 if (!test_and_set_bit(i, &ap->qactive)) {
2703 qc = ata_qc_from_tag(ap, i);
2704 break;
2705 }
2706
2707 if (qc)
2708 qc->tag = i;
2709
2710 return qc;
2711}
2712
2713/**
2714 * ata_qc_new_init - Request an available ATA command, and initialize it
2715 * @ap: Port associated with device @dev
2716 * @dev: Device from whom we request an available command structure
2717 *
2718 * LOCKING:
2719 */
2720
2721struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
2722 struct ata_device *dev)
2723{
2724 struct ata_queued_cmd *qc;
2725
2726 qc = ata_qc_new(ap);
2727 if (qc) {
2728 qc->sg = NULL;
2729 qc->flags = 0;
2730 qc->scsicmd = NULL;
2731 qc->ap = ap;
2732 qc->dev = dev;
2733 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
2734 qc->nsect = 0;
2735 qc->nbytes = qc->curbytes = 0;
2736
2737 ata_tf_init(ap, &qc->tf, dev->devno);
2738
2739 if (dev->flags & ATA_DFLAG_LBA48)
2740 qc->tf.flags |= ATA_TFLAG_LBA48;
2741 }
2742
2743 return qc;
2744}
2745
2746static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat)
2747{
2748 return 0;
2749}
2750
2751static void __ata_qc_complete(struct ata_queued_cmd *qc)
2752{
2753 struct ata_port *ap = qc->ap;
2754 unsigned int tag, do_clear = 0;
2755
2756 qc->flags = 0;
2757 tag = qc->tag;
2758 if (likely(ata_tag_valid(tag))) {
2759 if (tag == ap->active_tag)
2760 ap->active_tag = ATA_TAG_POISON;
2761 qc->tag = ATA_TAG_POISON;
2762 do_clear = 1;
2763 }
2764
2765 if (qc->waiting) {
2766 struct completion *waiting = qc->waiting;
2767 qc->waiting = NULL;
2768 complete(waiting);
2769 }
2770
2771 if (likely(do_clear))
2772 clear_bit(tag, &ap->qactive);
2773}
2774
2775/**
2776 * ata_qc_free - free unused ata_queued_cmd
2777 * @qc: Command to complete
2778 *
2779 * Designed to free unused ata_queued_cmd object
2780 * in case something prevents using it.
2781 *
2782 * LOCKING:
2783 *
2784 */
2785void ata_qc_free(struct ata_queued_cmd *qc)
2786{
2787 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
2788 assert(qc->waiting == NULL); /* nothing should be waiting */
2789
2790 __ata_qc_complete(qc);
2791}
2792
2793/**
2794 * ata_qc_complete - Complete an active ATA command
2795 * @qc: Command to complete
2796 * @drv_stat: ATA status register contents
2797 *
2798 * LOCKING:
2799 *
2800 */
2801
2802void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
2803{
2804 int rc;
2805
2806 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
2807 assert(qc->flags & ATA_QCFLAG_ACTIVE);
2808
2809 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
2810 ata_sg_clean(qc);
2811
2812 /* call completion callback */
2813 rc = qc->complete_fn(qc, drv_stat);
2814
2815 /* if callback indicates not to complete command (non-zero),
2816 * return immediately
2817 */
2818 if (rc != 0)
2819 return;
2820
2821 __ata_qc_complete(qc);
2822
2823 VPRINTK("EXIT\n");
2824}
2825
2826static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
2827{
2828 struct ata_port *ap = qc->ap;
2829
2830 switch (qc->tf.protocol) {
2831 case ATA_PROT_DMA:
2832 case ATA_PROT_ATAPI_DMA:
2833 return 1;
2834
2835 case ATA_PROT_ATAPI:
2836 case ATA_PROT_PIO:
2837 case ATA_PROT_PIO_MULT:
2838 if (ap->flags & ATA_FLAG_PIO_DMA)
2839 return 1;
2840
2841 /* fall through */
2842
2843 default:
2844 return 0;
2845 }
2846
2847 /* never reached */
2848}
2849
2850/**
2851 * ata_qc_issue - issue taskfile to device
2852 * @qc: command to issue to device
2853 *
2854 * Prepare an ATA command to submission to device.
2855 * This includes mapping the data into a DMA-able
2856 * area, filling in the S/G table, and finally
2857 * writing the taskfile to hardware, starting the command.
2858 *
2859 * LOCKING:
2860 * spin_lock_irqsave(host_set lock)
2861 *
2862 * RETURNS:
2863 * Zero on success, negative on error.
2864 */
2865
2866int ata_qc_issue(struct ata_queued_cmd *qc)
2867{
2868 struct ata_port *ap = qc->ap;
2869
2870 if (ata_should_dma_map(qc)) {
2871 if (qc->flags & ATA_QCFLAG_SG) {
2872 if (ata_sg_setup(qc))
2873 goto err_out;
2874 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
2875 if (ata_sg_setup_one(qc))
2876 goto err_out;
2877 }
2878 } else {
2879 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2880 }
2881
2882 ap->ops->qc_prep(qc);
2883
2884 qc->ap->active_tag = qc->tag;
2885 qc->flags |= ATA_QCFLAG_ACTIVE;
2886
2887 return ap->ops->qc_issue(qc);
2888
2889err_out:
2890 return -1;
2891}
2892
2893/**
2894 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
2895 * @qc: command to issue to device
2896 *
2897 * Using various libata functions and hooks, this function
2898 * starts an ATA command. ATA commands are grouped into
2899 * classes called "protocols", and issuing each type of protocol
2900 * is slightly different.
2901 *
2902 * LOCKING:
2903 * spin_lock_irqsave(host_set lock)
2904 *
2905 * RETURNS:
2906 * Zero on success, negative on error.
2907 */
2908
2909int ata_qc_issue_prot(struct ata_queued_cmd *qc)
2910{
2911 struct ata_port *ap = qc->ap;
2912
2913 ata_dev_select(ap, qc->dev->devno, 1, 0);
2914
2915 switch (qc->tf.protocol) {
2916 case ATA_PROT_NODATA:
2917 ata_tf_to_host_nolock(ap, &qc->tf);
2918 break;
2919
2920 case ATA_PROT_DMA:
2921 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
2922 ap->ops->bmdma_setup(qc); /* set up bmdma */
2923 ap->ops->bmdma_start(qc); /* initiate bmdma */
2924 break;
2925
2926 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
2927 ata_qc_set_polling(qc);
2928 ata_tf_to_host_nolock(ap, &qc->tf);
2929 ap->pio_task_state = PIO_ST;
2930 queue_work(ata_wq, &ap->pio_task);
2931 break;
2932
2933 case ATA_PROT_ATAPI:
2934 ata_qc_set_polling(qc);
2935 ata_tf_to_host_nolock(ap, &qc->tf);
2936 queue_work(ata_wq, &ap->packet_task);
2937 break;
2938
2939 case ATA_PROT_ATAPI_NODATA:
2940 ata_tf_to_host_nolock(ap, &qc->tf);
2941 queue_work(ata_wq, &ap->packet_task);
2942 break;
2943
2944 case ATA_PROT_ATAPI_DMA:
2945 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
2946 ap->ops->bmdma_setup(qc); /* set up bmdma */
2947 queue_work(ata_wq, &ap->packet_task);
2948 break;
2949
2950 default:
2951 WARN_ON(1);
2952 return -1;
2953 }
2954
2955 return 0;
2956}
2957
2958/**
2959 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
2960 * @qc: Info associated with this ATA transaction.
2961 *
2962 * LOCKING:
2963 * spin_lock_irqsave(host_set lock)
2964 */
2965
2966static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
2967{
2968 struct ata_port *ap = qc->ap;
2969 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
2970 u8 dmactl;
2971 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
2972
2973 /* load PRD table addr. */
2974 mb(); /* make sure PRD table writes are visible to controller */
2975 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
2976
2977 /* specify data direction, triple-check start bit is clear */
2978 dmactl = readb(mmio + ATA_DMA_CMD);
2979 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
2980 if (!rw)
2981 dmactl |= ATA_DMA_WR;
2982 writeb(dmactl, mmio + ATA_DMA_CMD);
2983
2984 /* issue r/w command */
2985 ap->ops->exec_command(ap, &qc->tf);
2986}
2987
2988/**
2989 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
2990 * @qc: Info associated with this ATA transaction.
2991 *
2992 * LOCKING:
2993 * spin_lock_irqsave(host_set lock)
2994 */
2995
2996static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
2997{
2998 struct ata_port *ap = qc->ap;
2999 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3000 u8 dmactl;
3001
3002 /* start host DMA transaction */
3003 dmactl = readb(mmio + ATA_DMA_CMD);
3004 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3005
3006 /* Strictly, one may wish to issue a readb() here, to
3007 * flush the mmio write. However, control also passes
3008 * to the hardware at this point, and it will interrupt
3009 * us when we are to resume control. So, in effect,
3010 * we don't care when the mmio write flushes.
3011 * Further, a read of the DMA status register _immediately_
3012 * following the write may not be what certain flaky hardware
3013 * is expected, so I think it is best to not add a readb()
3014 * without first all the MMIO ATA cards/mobos.
3015 * Or maybe I'm just being paranoid.
3016 */
3017}
3018
3019/**
3020 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3021 * @qc: Info associated with this ATA transaction.
3022 *
3023 * LOCKING:
3024 * spin_lock_irqsave(host_set lock)
3025 */
3026
3027static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3028{
3029 struct ata_port *ap = qc->ap;
3030 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3031 u8 dmactl;
3032
3033 /* load PRD table addr. */
3034 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3035
3036 /* specify data direction, triple-check start bit is clear */
3037 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3038 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3039 if (!rw)
3040 dmactl |= ATA_DMA_WR;
3041 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3042
3043 /* issue r/w command */
3044 ap->ops->exec_command(ap, &qc->tf);
3045}
3046
3047/**
3048 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3049 * @qc: Info associated with this ATA transaction.
3050 *
3051 * LOCKING:
3052 * spin_lock_irqsave(host_set lock)
3053 */
3054
3055static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3056{
3057 struct ata_port *ap = qc->ap;
3058 u8 dmactl;
3059
3060 /* start host DMA transaction */
3061 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3062 outb(dmactl | ATA_DMA_START,
3063 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3064}
3065
3066void ata_bmdma_start(struct ata_queued_cmd *qc)
3067{
3068 if (qc->ap->flags & ATA_FLAG_MMIO)
3069 ata_bmdma_start_mmio(qc);
3070 else
3071 ata_bmdma_start_pio(qc);
3072}
3073
3074void ata_bmdma_setup(struct ata_queued_cmd *qc)
3075{
3076 if (qc->ap->flags & ATA_FLAG_MMIO)
3077 ata_bmdma_setup_mmio(qc);
3078 else
3079 ata_bmdma_setup_pio(qc);
3080}
3081
3082void ata_bmdma_irq_clear(struct ata_port *ap)
3083{
3084 if (ap->flags & ATA_FLAG_MMIO) {
3085 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3086 writeb(readb(mmio), mmio);
3087 } else {
3088 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3089 outb(inb(addr), addr);
3090 }
3091
3092}
3093
3094u8 ata_bmdma_status(struct ata_port *ap)
3095{
3096 u8 host_stat;
3097 if (ap->flags & ATA_FLAG_MMIO) {
3098 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3099 host_stat = readb(mmio + ATA_DMA_STATUS);
3100 } else
3101 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3102 return host_stat;
3103}
3104
3105void ata_bmdma_stop(struct ata_port *ap)
3106{
3107 if (ap->flags & ATA_FLAG_MMIO) {
3108 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3109
3110 /* clear start/stop bit */
3111 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3112 mmio + ATA_DMA_CMD);
3113 } else {
3114 /* clear start/stop bit */
3115 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
3116 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3117 }
3118
3119 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3120 ata_altstatus(ap); /* dummy read */
3121}
3122
3123/**
3124 * ata_host_intr - Handle host interrupt for given (port, task)
3125 * @ap: Port on which interrupt arrived (possibly...)
3126 * @qc: Taskfile currently active in engine
3127 *
3128 * Handle host interrupt for given queued command. Currently,
3129 * only DMA interrupts are handled. All other commands are
3130 * handled via polling with interrupts disabled (nIEN bit).
3131 *
3132 * LOCKING:
3133 * spin_lock_irqsave(host_set lock)
3134 *
3135 * RETURNS:
3136 * One if interrupt was handled, zero if not (shared irq).
3137 */
3138
3139inline unsigned int ata_host_intr (struct ata_port *ap,
3140 struct ata_queued_cmd *qc)
3141{
3142 u8 status, host_stat;
3143
3144 switch (qc->tf.protocol) {
3145
3146 case ATA_PROT_DMA:
3147 case ATA_PROT_ATAPI_DMA:
3148 case ATA_PROT_ATAPI:
3149 /* check status of DMA engine */
3150 host_stat = ap->ops->bmdma_status(ap);
3151 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
3152
3153 /* if it's not our irq... */
3154 if (!(host_stat & ATA_DMA_INTR))
3155 goto idle_irq;
3156
3157 /* before we do anything else, clear DMA-Start bit */
3158 ap->ops->bmdma_stop(ap);
3159
3160 /* fall through */
3161
3162 case ATA_PROT_ATAPI_NODATA:
3163 case ATA_PROT_NODATA:
3164 /* check altstatus */
3165 status = ata_altstatus(ap);
3166 if (status & ATA_BUSY)
3167 goto idle_irq;
3168
3169 /* check main status, clearing INTRQ */
3170 status = ata_chk_status(ap);
3171 if (unlikely(status & ATA_BUSY))
3172 goto idle_irq;
3173 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
3174 ap->id, qc->tf.protocol, status);
3175
3176 /* ack bmdma irq events */
3177 ap->ops->irq_clear(ap);
3178
3179 /* complete taskfile transaction */
3180 ata_qc_complete(qc, status);
3181 break;
3182
3183 default:
3184 goto idle_irq;
3185 }
3186
3187 return 1; /* irq handled */
3188
3189idle_irq:
3190 ap->stats.idle_irq++;
3191
3192#ifdef ATA_IRQ_TRAP
3193 if ((ap->stats.idle_irq % 1000) == 0) {
3194 handled = 1;
3195 ata_irq_ack(ap, 0); /* debug trap */
3196 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
3197 }
3198#endif
3199 return 0; /* irq not handled */
3200}
3201
3202/**
3203 * ata_interrupt - Default ATA host interrupt handler
3204 * @irq: irq line
3205 * @dev_instance: pointer to our host information structure
3206 * @regs: unused
3207 *
3208 * LOCKING:
3209 *
3210 * RETURNS:
3211 *
3212 */
3213
3214irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
3215{
3216 struct ata_host_set *host_set = dev_instance;
3217 unsigned int i;
3218 unsigned int handled = 0;
3219 unsigned long flags;
3220
3221 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
3222 spin_lock_irqsave(&host_set->lock, flags);
3223
3224 for (i = 0; i < host_set->n_ports; i++) {
3225 struct ata_port *ap;
3226
3227 ap = host_set->ports[i];
3228 if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) {
3229 struct ata_queued_cmd *qc;
3230
3231 qc = ata_qc_from_tag(ap, ap->active_tag);
3232 if (qc && (!(qc->tf.ctl & ATA_NIEN)))
3233 handled |= ata_host_intr(ap, qc);
3234 }
3235 }
3236
3237 spin_unlock_irqrestore(&host_set->lock, flags);
3238
3239 return IRQ_RETVAL(handled);
3240}
3241
3242/**
3243 * atapi_packet_task - Write CDB bytes to hardware
3244 * @_data: Port to which ATAPI device is attached.
3245 *
3246 * When device has indicated its readiness to accept
3247 * a CDB, this function is called. Send the CDB.
3248 * If DMA is to be performed, exit immediately.
3249 * Otherwise, we are in polling mode, so poll
3250 * status under operation succeeds or fails.
3251 *
3252 * LOCKING:
3253 * Kernel thread context (may sleep)
3254 */
3255
3256static void atapi_packet_task(void *_data)
3257{
3258 struct ata_port *ap = _data;
3259 struct ata_queued_cmd *qc;
3260 u8 status;
3261
3262 qc = ata_qc_from_tag(ap, ap->active_tag);
3263 assert(qc != NULL);
3264 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3265
3266 /* sleep-wait for BSY to clear */
3267 DPRINTK("busy wait\n");
3268 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB))
3269 goto err_out;
3270
3271 /* make sure DRQ is set */
3272 status = ata_chk_status(ap);
3273 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)
3274 goto err_out;
3275
3276 /* send SCSI cdb */
3277 DPRINTK("send cdb\n");
3278 assert(ap->cdb_len >= 12);
3279 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
3280
3281 /* if we are DMA'ing, irq handler takes over from here */
3282 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3283 ap->ops->bmdma_start(qc); /* initiate bmdma */
3284
3285 /* non-data commands are also handled via irq */
3286 else if (qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3287 /* do nothing */
3288 }
3289
3290 /* PIO commands are handled by polling */
3291 else {
3292 ap->pio_task_state = PIO_ST;
3293 queue_work(ata_wq, &ap->pio_task);
3294 }
3295
3296 return;
3297
3298err_out:
3299 ata_qc_complete(qc, ATA_ERR);
3300}
3301
3302int ata_port_start (struct ata_port *ap)
3303{
3304 struct device *dev = ap->host_set->dev;
3305
3306 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
3307 if (!ap->prd)
3308 return -ENOMEM;
3309
3310 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
3311
3312 return 0;
3313}
3314
3315void ata_port_stop (struct ata_port *ap)
3316{
3317 struct device *dev = ap->host_set->dev;
3318
3319 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
3320}
3321
3322/**
3323 * ata_host_remove - Unregister SCSI host structure with upper layers
3324 * @ap: Port to unregister
3325 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
3326 *
3327 * LOCKING:
3328 */
3329
3330static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
3331{
3332 struct Scsi_Host *sh = ap->host;
3333
3334 DPRINTK("ENTER\n");
3335
3336 if (do_unregister)
3337 scsi_remove_host(sh);
3338
3339 ap->ops->port_stop(ap);
3340}
3341
3342/**
3343 * ata_host_init - Initialize an ata_port structure
3344 * @ap: Structure to initialize
3345 * @host: associated SCSI mid-layer structure
3346 * @host_set: Collection of hosts to which @ap belongs
3347 * @ent: Probe information provided by low-level driver
3348 * @port_no: Port number associated with this ata_port
3349 *
3350 * LOCKING:
3351 *
3352 */
3353
3354static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
3355 struct ata_host_set *host_set,
3356 struct ata_probe_ent *ent, unsigned int port_no)
3357{
3358 unsigned int i;
3359
3360 host->max_id = 16;
3361 host->max_lun = 1;
3362 host->max_channel = 1;
3363 host->unique_id = ata_unique_id++;
3364 host->max_cmd_len = 12;
3365 scsi_set_device(host, ent->dev);
3366 scsi_assign_lock(host, &host_set->lock);
3367
3368 ap->flags = ATA_FLAG_PORT_DISABLED;
3369 ap->id = host->unique_id;
3370 ap->host = host;
3371 ap->ctl = ATA_DEVCTL_OBS;
3372 ap->host_set = host_set;
3373 ap->port_no = port_no;
3374 ap->hard_port_no =
3375 ent->legacy_mode ? ent->hard_port_no : port_no;
3376 ap->pio_mask = ent->pio_mask;
3377 ap->mwdma_mask = ent->mwdma_mask;
3378 ap->udma_mask = ent->udma_mask;
3379 ap->flags |= ent->host_flags;
3380 ap->ops = ent->port_ops;
3381 ap->cbl = ATA_CBL_NONE;
3382 ap->active_tag = ATA_TAG_POISON;
3383 ap->last_ctl = 0xFF;
3384
3385 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
3386 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
3387
3388 for (i = 0; i < ATA_MAX_DEVICES; i++)
3389 ap->device[i].devno = i;
3390
3391#ifdef ATA_IRQ_TRAP
3392 ap->stats.unhandled_irq = 1;
3393 ap->stats.idle_irq = 1;
3394#endif
3395
3396 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
3397}
3398
3399/**
3400 * ata_host_add - Attach low-level ATA driver to system
3401 * @ent: Information provided by low-level driver
3402 * @host_set: Collections of ports to which we add
3403 * @port_no: Port number associated with this host
3404 *
3405 * LOCKING:
3406 *
3407 * RETURNS:
3408 *
3409 */
3410
3411static struct ata_port * ata_host_add(struct ata_probe_ent *ent,
3412 struct ata_host_set *host_set,
3413 unsigned int port_no)
3414{
3415 struct Scsi_Host *host;
3416 struct ata_port *ap;
3417 int rc;
3418
3419 DPRINTK("ENTER\n");
3420 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
3421 if (!host)
3422 return NULL;
3423
3424 ap = (struct ata_port *) &host->hostdata[0];
3425
3426 ata_host_init(ap, host, host_set, ent, port_no);
3427
3428 rc = ap->ops->port_start(ap);
3429 if (rc)
3430 goto err_out;
3431
3432 return ap;
3433
3434err_out:
3435 scsi_host_put(host);
3436 return NULL;
3437}
3438
3439/**
3440 * ata_device_add -
3441 * @ent:
3442 *
3443 * LOCKING:
3444 *
3445 * RETURNS:
3446 *
3447 */
3448
3449int ata_device_add(struct ata_probe_ent *ent)
3450{
3451 unsigned int count = 0, i;
3452 struct device *dev = ent->dev;
3453 struct ata_host_set *host_set;
3454
3455 DPRINTK("ENTER\n");
3456 /* alloc a container for our list of ATA ports (buses) */
3457 host_set = kmalloc(sizeof(struct ata_host_set) +
3458 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
3459 if (!host_set)
3460 return 0;
3461 memset(host_set, 0, sizeof(struct ata_host_set) + (ent->n_ports * sizeof(void *)));
3462 spin_lock_init(&host_set->lock);
3463
3464 host_set->dev = dev;
3465 host_set->n_ports = ent->n_ports;
3466 host_set->irq = ent->irq;
3467 host_set->mmio_base = ent->mmio_base;
3468 host_set->private_data = ent->private_data;
3469 host_set->ops = ent->port_ops;
3470
3471 /* register each port bound to this device */
3472 for (i = 0; i < ent->n_ports; i++) {
3473 struct ata_port *ap;
3474 unsigned long xfer_mode_mask;
3475
3476 ap = ata_host_add(ent, host_set, i);
3477 if (!ap)
3478 goto err_out;
3479
3480 host_set->ports[i] = ap;
3481 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
3482 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
3483 (ap->pio_mask << ATA_SHIFT_PIO);
3484
3485 /* print per-port info to dmesg */
3486 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
3487 "bmdma 0x%lX irq %lu\n",
3488 ap->id,
3489 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
3490 ata_mode_string(xfer_mode_mask),
3491 ap->ioaddr.cmd_addr,
3492 ap->ioaddr.ctl_addr,
3493 ap->ioaddr.bmdma_addr,
3494 ent->irq);
3495
3496 ata_chk_status(ap);
3497 host_set->ops->irq_clear(ap);
3498 count++;
3499 }
3500
3501 if (!count) {
3502 kfree(host_set);
3503 return 0;
3504 }
3505
3506 /* obtain irq, that is shared between channels */
3507 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
3508 DRV_NAME, host_set))
3509 goto err_out;
3510
3511 /* perform each probe synchronously */
3512 DPRINTK("probe begin\n");
3513 for (i = 0; i < count; i++) {
3514 struct ata_port *ap;
3515 int rc;
3516
3517 ap = host_set->ports[i];
3518
3519 DPRINTK("ata%u: probe begin\n", ap->id);
3520 rc = ata_bus_probe(ap);
3521 DPRINTK("ata%u: probe end\n", ap->id);
3522
3523 if (rc) {
3524 /* FIXME: do something useful here?
3525 * Current libata behavior will
3526 * tear down everything when
3527 * the module is removed
3528 * or the h/w is unplugged.
3529 */
3530 }
3531
3532 rc = scsi_add_host(ap->host, dev);
3533 if (rc) {
3534 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
3535 ap->id);
3536 /* FIXME: do something useful here */
3537 /* FIXME: handle unconditional calls to
3538 * scsi_scan_host and ata_host_remove, below,
3539 * at the very least
3540 */
3541 }
3542 }
3543
3544 /* probes are done, now scan each port's disk(s) */
3545 DPRINTK("probe begin\n");
3546 for (i = 0; i < count; i++) {
3547 struct ata_port *ap = host_set->ports[i];
3548
3549 scsi_scan_host(ap->host);
3550 }
3551
3552 dev_set_drvdata(dev, host_set);
3553
3554 VPRINTK("EXIT, returning %u\n", ent->n_ports);
3555 return ent->n_ports; /* success */
3556
3557err_out:
3558 for (i = 0; i < count; i++) {
3559 ata_host_remove(host_set->ports[i], 1);
3560 scsi_host_put(host_set->ports[i]->host);
3561 }
3562 kfree(host_set);
3563 VPRINTK("EXIT, returning 0\n");
3564 return 0;
3565}
3566
3567/**
3568 * ata_scsi_release - SCSI layer callback hook for host unload
3569 * @host: libata host to be unloaded
3570 *
3571 * Performs all duties necessary to shut down a libata port...
3572 * Kill port kthread, disable port, and release resources.
3573 *
3574 * LOCKING:
3575 * Inherited from SCSI layer.
3576 *
3577 * RETURNS:
3578 * One.
3579 */
3580
3581int ata_scsi_release(struct Scsi_Host *host)
3582{
3583 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
3584
3585 DPRINTK("ENTER\n");
3586
3587 ap->ops->port_disable(ap);
3588 ata_host_remove(ap, 0);
3589
3590 DPRINTK("EXIT\n");
3591 return 1;
3592}
3593
3594/**
3595 * ata_std_ports - initialize ioaddr with standard port offsets.
3596 * @ioaddr: IO address structure to be initialized
3597 */
3598void ata_std_ports(struct ata_ioports *ioaddr)
3599{
3600 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
3601 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
3602 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
3603 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
3604 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
3605 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
3606 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
3607 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
3608 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
3609 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
3610}
3611
3612static struct ata_probe_ent *
3613ata_probe_ent_alloc(struct device *dev, struct ata_port_info *port)
3614{
3615 struct ata_probe_ent *probe_ent;
3616
3617 probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);
3618 if (!probe_ent) {
3619 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
3620 kobject_name(&(dev->kobj)));
3621 return NULL;
3622 }
3623
3624 memset(probe_ent, 0, sizeof(*probe_ent));
3625
3626 INIT_LIST_HEAD(&probe_ent->node);
3627 probe_ent->dev = dev;
3628
3629 probe_ent->sht = port->sht;
3630 probe_ent->host_flags = port->host_flags;
3631 probe_ent->pio_mask = port->pio_mask;
3632 probe_ent->mwdma_mask = port->mwdma_mask;
3633 probe_ent->udma_mask = port->udma_mask;
3634 probe_ent->port_ops = port->port_ops;
3635
3636 return probe_ent;
3637}
3638
3639#ifdef CONFIG_PCI
3640struct ata_probe_ent *
3641ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port)
3642{
3643 struct ata_probe_ent *probe_ent =
3644 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
3645 if (!probe_ent)
3646 return NULL;
3647
3648 probe_ent->n_ports = 2;
3649 probe_ent->irq = pdev->irq;
3650 probe_ent->irq_flags = SA_SHIRQ;
3651
3652 probe_ent->port[0].cmd_addr = pci_resource_start(pdev, 0);
3653 probe_ent->port[0].altstatus_addr =
3654 probe_ent->port[0].ctl_addr =
3655 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
3656 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4);
3657
3658 probe_ent->port[1].cmd_addr = pci_resource_start(pdev, 2);
3659 probe_ent->port[1].altstatus_addr =
3660 probe_ent->port[1].ctl_addr =
3661 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
3662 probe_ent->port[1].bmdma_addr = pci_resource_start(pdev, 4) + 8;
3663
3664 ata_std_ports(&probe_ent->port[0]);
3665 ata_std_ports(&probe_ent->port[1]);
3666
3667 return probe_ent;
3668}
3669
3670static struct ata_probe_ent *
3671ata_pci_init_legacy_mode(struct pci_dev *pdev, struct ata_port_info **port,
3672 struct ata_probe_ent **ppe2)
3673{
3674 struct ata_probe_ent *probe_ent, *probe_ent2;
3675
3676 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
3677 if (!probe_ent)
3678 return NULL;
3679 probe_ent2 = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[1]);
3680 if (!probe_ent2) {
3681 kfree(probe_ent);
3682 return NULL;
3683 }
3684
3685 probe_ent->n_ports = 1;
3686 probe_ent->irq = 14;
3687
3688 probe_ent->hard_port_no = 0;
3689 probe_ent->legacy_mode = 1;
3690
3691 probe_ent2->n_ports = 1;
3692 probe_ent2->irq = 15;
3693
3694 probe_ent2->hard_port_no = 1;
3695 probe_ent2->legacy_mode = 1;
3696
3697 probe_ent->port[0].cmd_addr = 0x1f0;
3698 probe_ent->port[0].altstatus_addr =
3699 probe_ent->port[0].ctl_addr = 0x3f6;
3700 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4);
3701
3702 probe_ent2->port[0].cmd_addr = 0x170;
3703 probe_ent2->port[0].altstatus_addr =
3704 probe_ent2->port[0].ctl_addr = 0x376;
3705 probe_ent2->port[0].bmdma_addr = pci_resource_start(pdev, 4)+8;
3706
3707 ata_std_ports(&probe_ent->port[0]);
3708 ata_std_ports(&probe_ent2->port[0]);
3709
3710 *ppe2 = probe_ent2;
3711 return probe_ent;
3712}
3713
3714/**
3715 * ata_pci_init_one - Initialize/register PCI IDE host controller
3716 * @pdev: Controller to be initialized
3717 * @port_info: Information from low-level host driver
3718 * @n_ports: Number of ports attached to host controller
3719 *
3720 * LOCKING:
3721 * Inherited from PCI layer (may sleep).
3722 *
3723 * RETURNS:
3724 *
3725 */
3726
3727int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
3728 unsigned int n_ports)
3729{
3730 struct ata_probe_ent *probe_ent, *probe_ent2 = NULL;
3731 struct ata_port_info *port[2];
3732 u8 tmp8, mask;
3733 unsigned int legacy_mode = 0;
3734 int disable_dev_on_err = 1;
3735 int rc;
3736
3737 DPRINTK("ENTER\n");
3738
3739 port[0] = port_info[0];
3740 if (n_ports > 1)
3741 port[1] = port_info[1];
3742 else
3743 port[1] = port[0];
3744
3745 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
3746 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
3747 /* TODO: support transitioning to native mode? */
3748 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
3749 mask = (1 << 2) | (1 << 0);
3750 if ((tmp8 & mask) != mask)
3751 legacy_mode = (1 << 3);
3752 }
3753
3754 /* FIXME... */
3755 if ((!legacy_mode) && (n_ports > 1)) {
3756 printk(KERN_ERR "ata: BUG: native mode, n_ports > 1\n");
3757 return -EINVAL;
3758 }
3759
3760 rc = pci_enable_device(pdev);
3761 if (rc)
3762 return rc;
3763
3764 rc = pci_request_regions(pdev, DRV_NAME);
3765 if (rc) {
3766 disable_dev_on_err = 0;
3767 goto err_out;
3768 }
3769
3770 if (legacy_mode) {
3771 if (!request_region(0x1f0, 8, "libata")) {
3772 struct resource *conflict, res;
3773 res.start = 0x1f0;
3774 res.end = 0x1f0 + 8 - 1;
3775 conflict = ____request_resource(&ioport_resource, &res);
3776 if (!strcmp(conflict->name, "libata"))
3777 legacy_mode |= (1 << 0);
3778 else {
3779 disable_dev_on_err = 0;
3780 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
3781 }
3782 } else
3783 legacy_mode |= (1 << 0);
3784
3785 if (!request_region(0x170, 8, "libata")) {
3786 struct resource *conflict, res;
3787 res.start = 0x170;
3788 res.end = 0x170 + 8 - 1;
3789 conflict = ____request_resource(&ioport_resource, &res);
3790 if (!strcmp(conflict->name, "libata"))
3791 legacy_mode |= (1 << 1);
3792 else {
3793 disable_dev_on_err = 0;
3794 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
3795 }
3796 } else
3797 legacy_mode |= (1 << 1);
3798 }
3799
3800 /* we have legacy mode, but all ports are unavailable */
3801 if (legacy_mode == (1 << 3)) {
3802 rc = -EBUSY;
3803 goto err_out_regions;
3804 }
3805
3806 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
3807 if (rc)
3808 goto err_out_regions;
3809 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
3810 if (rc)
3811 goto err_out_regions;
3812
3813 if (legacy_mode) {
3814 probe_ent = ata_pci_init_legacy_mode(pdev, port, &probe_ent2);
3815 } else
3816 probe_ent = ata_pci_init_native_mode(pdev, port);
3817 if (!probe_ent) {
3818 rc = -ENOMEM;
3819 goto err_out_regions;
3820 }
3821
3822 pci_set_master(pdev);
3823
3824 /* FIXME: check ata_device_add return */
3825 if (legacy_mode) {
3826 if (legacy_mode & (1 << 0))
3827 ata_device_add(probe_ent);
3828 if (legacy_mode & (1 << 1))
3829 ata_device_add(probe_ent2);
3830 } else
3831 ata_device_add(probe_ent);
3832
3833 kfree(probe_ent);
3834 kfree(probe_ent2);
3835
3836 return 0;
3837
3838err_out_regions:
3839 if (legacy_mode & (1 << 0))
3840 release_region(0x1f0, 8);
3841 if (legacy_mode & (1 << 1))
3842 release_region(0x170, 8);
3843 pci_release_regions(pdev);
3844err_out:
3845 if (disable_dev_on_err)
3846 pci_disable_device(pdev);
3847 return rc;
3848}
3849
3850/**
3851 * ata_pci_remove_one - PCI layer callback for device removal
3852 * @pdev: PCI device that was removed
3853 *
3854 * PCI layer indicates to libata via this hook that
3855 * hot-unplug or module unload event has occured.
3856 * Handle this by unregistering all objects associated
3857 * with this PCI device. Free those objects. Then finally
3858 * release PCI resources and disable device.
3859 *
3860 * LOCKING:
3861 * Inherited from PCI layer (may sleep).
3862 */
3863
3864void ata_pci_remove_one (struct pci_dev *pdev)
3865{
3866 struct device *dev = pci_dev_to_dev(pdev);
3867 struct ata_host_set *host_set = dev_get_drvdata(dev);
3868 struct ata_port *ap;
3869 unsigned int i;
3870
3871 for (i = 0; i < host_set->n_ports; i++) {
3872 ap = host_set->ports[i];
3873
3874 scsi_remove_host(ap->host);
3875 }
3876
3877 free_irq(host_set->irq, host_set);
3878 if (host_set->ops->host_stop)
3879 host_set->ops->host_stop(host_set);
3880 if (host_set->mmio_base)
3881 iounmap(host_set->mmio_base);
3882
3883 for (i = 0; i < host_set->n_ports; i++) {
3884 ap = host_set->ports[i];
3885
3886 ata_scsi_release(ap->host);
3887
3888 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
3889 struct ata_ioports *ioaddr = &ap->ioaddr;
3890
3891 if (ioaddr->cmd_addr == 0x1f0)
3892 release_region(0x1f0, 8);
3893 else if (ioaddr->cmd_addr == 0x170)
3894 release_region(0x170, 8);
3895 }
3896
3897 scsi_host_put(ap->host);
3898 }
3899
3900 kfree(host_set);
3901
3902 pci_release_regions(pdev);
3903 pci_disable_device(pdev);
3904 dev_set_drvdata(dev, NULL);
3905}
3906
3907/* move to PCI subsystem */
3908int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits)
3909{
3910 unsigned long tmp = 0;
3911
3912 switch (bits->width) {
3913 case 1: {
3914 u8 tmp8 = 0;
3915 pci_read_config_byte(pdev, bits->reg, &tmp8);
3916 tmp = tmp8;
3917 break;
3918 }
3919 case 2: {
3920 u16 tmp16 = 0;
3921 pci_read_config_word(pdev, bits->reg, &tmp16);
3922 tmp = tmp16;
3923 break;
3924 }
3925 case 4: {
3926 u32 tmp32 = 0;
3927 pci_read_config_dword(pdev, bits->reg, &tmp32);
3928 tmp = tmp32;
3929 break;
3930 }
3931
3932 default:
3933 return -EINVAL;
3934 }
3935
3936 tmp &= bits->mask;
3937
3938 return (tmp == bits->val) ? 1 : 0;
3939}
3940#endif /* CONFIG_PCI */
3941
3942
3943/**
3944 * ata_init -
3945 *
3946 * LOCKING:
3947 *
3948 * RETURNS:
3949 *
3950 */
3951
3952static int __init ata_init(void)
3953{
3954 ata_wq = create_workqueue("ata");
3955 if (!ata_wq)
3956 return -ENOMEM;
3957
3958 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
3959 return 0;
3960}
3961
3962static void __exit ata_exit(void)
3963{
3964 destroy_workqueue(ata_wq);
3965}
3966
3967module_init(ata_init);
3968module_exit(ata_exit);
3969
3970/*
3971 * libata is essentially a library of internal helper functions for
3972 * low-level ATA host controller drivers. As such, the API/ABI is
3973 * likely to change as new drivers are added and updated.
3974 * Do not depend on ABI/API stability.
3975 */
3976
3977EXPORT_SYMBOL_GPL(ata_std_bios_param);
3978EXPORT_SYMBOL_GPL(ata_std_ports);
3979EXPORT_SYMBOL_GPL(ata_device_add);
3980EXPORT_SYMBOL_GPL(ata_sg_init);
3981EXPORT_SYMBOL_GPL(ata_sg_init_one);
3982EXPORT_SYMBOL_GPL(ata_qc_complete);
3983EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
3984EXPORT_SYMBOL_GPL(ata_eng_timeout);
3985EXPORT_SYMBOL_GPL(ata_tf_load);
3986EXPORT_SYMBOL_GPL(ata_tf_read);
3987EXPORT_SYMBOL_GPL(ata_noop_dev_select);
3988EXPORT_SYMBOL_GPL(ata_std_dev_select);
3989EXPORT_SYMBOL_GPL(ata_tf_to_fis);
3990EXPORT_SYMBOL_GPL(ata_tf_from_fis);
3991EXPORT_SYMBOL_GPL(ata_check_status);
3992EXPORT_SYMBOL_GPL(ata_altstatus);
3993EXPORT_SYMBOL_GPL(ata_chk_err);
3994EXPORT_SYMBOL_GPL(ata_exec_command);
3995EXPORT_SYMBOL_GPL(ata_port_start);
3996EXPORT_SYMBOL_GPL(ata_port_stop);
3997EXPORT_SYMBOL_GPL(ata_interrupt);
3998EXPORT_SYMBOL_GPL(ata_qc_prep);
3999EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4000EXPORT_SYMBOL_GPL(ata_bmdma_start);
4001EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4002EXPORT_SYMBOL_GPL(ata_bmdma_status);
4003EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4004EXPORT_SYMBOL_GPL(ata_port_probe);
4005EXPORT_SYMBOL_GPL(sata_phy_reset);
4006EXPORT_SYMBOL_GPL(__sata_phy_reset);
4007EXPORT_SYMBOL_GPL(ata_bus_reset);
4008EXPORT_SYMBOL_GPL(ata_port_disable);
4009EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4010EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4011EXPORT_SYMBOL_GPL(ata_scsi_error);
4012EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4013EXPORT_SYMBOL_GPL(ata_scsi_release);
4014EXPORT_SYMBOL_GPL(ata_host_intr);
4015EXPORT_SYMBOL_GPL(ata_dev_classify);
4016EXPORT_SYMBOL_GPL(ata_dev_id_string);
4017EXPORT_SYMBOL_GPL(ata_scsi_simulate);
4018
4019#ifdef CONFIG_PCI
4020EXPORT_SYMBOL_GPL(pci_test_config_bits);
4021EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4022EXPORT_SYMBOL_GPL(ata_pci_init_one);
4023EXPORT_SYMBOL_GPL(ata_pci_remove_one);
4024#endif /* CONFIG_PCI */
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-08 11:32:05 -0500