diff options
author | Edmund Nadolski <edmund.nadolski@intel.com> | 2011-06-01 20:10:43 -0400 |
---|---|---|
committer | Dan Williams <dan.j.williams@intel.com> | 2011-07-03 07:04:50 -0400 |
commit | e301370ac553a9a0ac0d1d25e769b86cf60395b3 (patch) | |
tree | 58c00e0aeb21c3101df389d4b5e34f47e4b32119 /drivers/scsi/isci/host.c | |
parent | 8d2c65c09c9e0adc16070562e7944c1c3277f332 (diff) |
isci: state machine cleanup
This cleans up several areas of the state machine mechanism:
o Rename sci_base_state_machine_change_state to sci_change_state
o Remove sci_base_state_machine_get_state function
o Rename 'state_machine' struct member to 'sm' in client structs
o Shorten the name of request states
o Shorten state machine state names as follows:
SCI_BASE_CONTROLLER_STATE_xxx to SCIC_xxx
SCI_BASE_PHY_STATE_xxx to SCI_PHY_xxx
SCIC_SDS_PHY_STARTING_SUBSTATE_xxx to SCI_PHY_SUB_xxx
SCI_BASE_PORT_STATE_xxx to SCI_PORT_xxx and
SCIC_SDS_PORT_READY_SUBSTATE_xxx to SCI_PORT_SUB_xxx
SCI_BASE_REMOTE_DEVICE_STATE_xxx to SCI_DEV_xxx
SCIC_SDS_STP_REMOTE_DEVICE_READY_SUBSTATE_xxx to SCI_STP_DEV_xxx
SCIC_SDS_SMP_REMOTE_DEVICE_READY_SUBSTATE_xxx to SCI_SMP_DEV_xxx
SCIC_SDS_REMOTE_NODE_CONTEXT_xxx_STATE to SCI_RNC_xxx
Signed-off-by: Edmund Nadolski <edmund.nadolski@intel.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/scsi/isci/host.c')
-rw-r--r-- | drivers/scsi/isci/host.c | 201 |
1 files changed, 89 insertions, 112 deletions
diff --git a/drivers/scsi/isci/host.c b/drivers/scsi/isci/host.c index 8801955be213..81ee64c0a4b7 100644 --- a/drivers/scsi/isci/host.c +++ b/drivers/scsi/isci/host.c | |||
@@ -635,8 +635,7 @@ static void scic_sds_controller_error_handler(struct scic_sds_controller *scic) | |||
635 | dev_err(scic_to_dev(scic), "%s: status: %#x\n", __func__, | 635 | dev_err(scic_to_dev(scic), "%s: status: %#x\n", __func__, |
636 | interrupt_status); | 636 | interrupt_status); |
637 | 637 | ||
638 | sci_base_state_machine_change_state(&scic->state_machine, | 638 | sci_change_state(&scic->sm, SCIC_FAILED); |
639 | SCI_BASE_CONTROLLER_STATE_FAILED); | ||
640 | 639 | ||
641 | return; | 640 | return; |
642 | } | 641 | } |
@@ -895,14 +894,12 @@ static void scic_sds_controller_transition_to_ready( | |||
895 | { | 894 | { |
896 | struct isci_host *ihost = scic_to_ihost(scic); | 895 | struct isci_host *ihost = scic_to_ihost(scic); |
897 | 896 | ||
898 | if (scic->state_machine.current_state_id == | 897 | if (scic->sm.current_state_id == SCIC_STARTING) { |
899 | SCI_BASE_CONTROLLER_STATE_STARTING) { | ||
900 | /* | 898 | /* |
901 | * We move into the ready state, because some of the phys/ports | 899 | * We move into the ready state, because some of the phys/ports |
902 | * may be up and operational. | 900 | * may be up and operational. |
903 | */ | 901 | */ |
904 | sci_base_state_machine_change_state(&scic->state_machine, | 902 | sci_change_state(&scic->sm, SCIC_READY); |
905 | SCI_BASE_CONTROLLER_STATE_READY); | ||
906 | 903 | ||
907 | isci_host_start_complete(ihost, status); | 904 | isci_host_start_complete(ihost, status); |
908 | } | 905 | } |
@@ -912,18 +909,18 @@ static bool is_phy_starting(struct scic_sds_phy *sci_phy) | |||
912 | { | 909 | { |
913 | enum scic_sds_phy_states state; | 910 | enum scic_sds_phy_states state; |
914 | 911 | ||
915 | state = sci_phy->state_machine.current_state_id; | 912 | state = sci_phy->sm.current_state_id; |
916 | switch (state) { | 913 | switch (state) { |
917 | case SCI_BASE_PHY_STATE_STARTING: | 914 | case SCI_PHY_STARTING: |
918 | case SCIC_SDS_PHY_STARTING_SUBSTATE_INITIAL: | 915 | case SCI_PHY_SUB_INITIAL: |
919 | case SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SAS_SPEED_EN: | 916 | case SCI_PHY_SUB_AWAIT_SAS_SPEED_EN: |
920 | case SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_IAF_UF: | 917 | case SCI_PHY_SUB_AWAIT_IAF_UF: |
921 | case SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SAS_POWER: | 918 | case SCI_PHY_SUB_AWAIT_SAS_POWER: |
922 | case SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_POWER: | 919 | case SCI_PHY_SUB_AWAIT_SATA_POWER: |
923 | case SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_PHY_EN: | 920 | case SCI_PHY_SUB_AWAIT_SATA_PHY_EN: |
924 | case SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_SPEED_EN: | 921 | case SCI_PHY_SUB_AWAIT_SATA_SPEED_EN: |
925 | case SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SIG_FIS_UF: | 922 | case SCI_PHY_SUB_AWAIT_SIG_FIS_UF: |
926 | case SCIC_SDS_PHY_STARTING_SUBSTATE_FINAL: | 923 | case SCI_PHY_SUB_FINAL: |
927 | return true; | 924 | return true; |
928 | default: | 925 | default: |
929 | return false; | 926 | return false; |
@@ -957,7 +954,7 @@ static enum sci_status scic_sds_controller_start_next_phy(struct scic_sds_contro | |||
957 | 954 | ||
958 | for (index = 0; index < SCI_MAX_PHYS; index++) { | 955 | for (index = 0; index < SCI_MAX_PHYS; index++) { |
959 | sci_phy = &ihost->phys[index].sci; | 956 | sci_phy = &ihost->phys[index].sci; |
960 | state = sci_phy->state_machine.current_state_id; | 957 | state = sci_phy->sm.current_state_id; |
961 | 958 | ||
962 | if (!phy_get_non_dummy_port(sci_phy)) | 959 | if (!phy_get_non_dummy_port(sci_phy)) |
963 | continue; | 960 | continue; |
@@ -968,12 +965,9 @@ static enum sci_status scic_sds_controller_start_next_phy(struct scic_sds_contro | |||
968 | * - have an indication of a connected device and it has | 965 | * - have an indication of a connected device and it has |
969 | * finished the link training process. | 966 | * finished the link training process. |
970 | */ | 967 | */ |
971 | if ((sci_phy->is_in_link_training == false && | 968 | if ((sci_phy->is_in_link_training == false && state == SCI_PHY_INITIAL) || |
972 | state == SCI_BASE_PHY_STATE_INITIAL) || | 969 | (sci_phy->is_in_link_training == false && state == SCI_PHY_STOPPED) || |
973 | (sci_phy->is_in_link_training == false && | 970 | (sci_phy->is_in_link_training == true && is_phy_starting(sci_phy))) { |
974 | state == SCI_BASE_PHY_STATE_STOPPED) || | ||
975 | (sci_phy->is_in_link_training == true && | ||
976 | is_phy_starting(sci_phy))) { | ||
977 | is_controller_start_complete = false; | 971 | is_controller_start_complete = false; |
978 | break; | 972 | break; |
979 | } | 973 | } |
@@ -1059,8 +1053,7 @@ static enum sci_status scic_controller_start(struct scic_sds_controller *scic, | |||
1059 | enum sci_status result; | 1053 | enum sci_status result; |
1060 | u16 index; | 1054 | u16 index; |
1061 | 1055 | ||
1062 | if (scic->state_machine.current_state_id != | 1056 | if (scic->sm.current_state_id != SCIC_INITIALIZED) { |
1063 | SCI_BASE_CONTROLLER_STATE_INITIALIZED) { | ||
1064 | dev_warn(scic_to_dev(scic), | 1057 | dev_warn(scic_to_dev(scic), |
1065 | "SCIC Controller start operation requested in " | 1058 | "SCIC Controller start operation requested in " |
1066 | "invalid state\n"); | 1059 | "invalid state\n"); |
@@ -1108,8 +1101,7 @@ static enum sci_status scic_controller_start(struct scic_sds_controller *scic, | |||
1108 | 1101 | ||
1109 | sci_mod_timer(&scic->timer, timeout); | 1102 | sci_mod_timer(&scic->timer, timeout); |
1110 | 1103 | ||
1111 | sci_base_state_machine_change_state(&scic->state_machine, | 1104 | sci_change_state(&scic->sm, SCIC_STARTING); |
1112 | SCI_BASE_CONTROLLER_STATE_STARTING); | ||
1113 | 1105 | ||
1114 | return SCI_SUCCESS; | 1106 | return SCI_SUCCESS; |
1115 | } | 1107 | } |
@@ -1279,8 +1271,7 @@ static void isci_host_completion_routine(unsigned long data) | |||
1279 | static enum sci_status scic_controller_stop(struct scic_sds_controller *scic, | 1271 | static enum sci_status scic_controller_stop(struct scic_sds_controller *scic, |
1280 | u32 timeout) | 1272 | u32 timeout) |
1281 | { | 1273 | { |
1282 | if (scic->state_machine.current_state_id != | 1274 | if (scic->sm.current_state_id != SCIC_READY) { |
1283 | SCI_BASE_CONTROLLER_STATE_READY) { | ||
1284 | dev_warn(scic_to_dev(scic), | 1275 | dev_warn(scic_to_dev(scic), |
1285 | "SCIC Controller stop operation requested in " | 1276 | "SCIC Controller stop operation requested in " |
1286 | "invalid state\n"); | 1277 | "invalid state\n"); |
@@ -1288,8 +1279,7 @@ static enum sci_status scic_controller_stop(struct scic_sds_controller *scic, | |||
1288 | } | 1279 | } |
1289 | 1280 | ||
1290 | sci_mod_timer(&scic->timer, timeout); | 1281 | sci_mod_timer(&scic->timer, timeout); |
1291 | sci_base_state_machine_change_state(&scic->state_machine, | 1282 | sci_change_state(&scic->sm, SCIC_STOPPING); |
1292 | SCI_BASE_CONTROLLER_STATE_STOPPING); | ||
1293 | return SCI_SUCCESS; | 1283 | return SCI_SUCCESS; |
1294 | } | 1284 | } |
1295 | 1285 | ||
@@ -1307,17 +1297,16 @@ static enum sci_status scic_controller_stop(struct scic_sds_controller *scic, | |||
1307 | */ | 1297 | */ |
1308 | static enum sci_status scic_controller_reset(struct scic_sds_controller *scic) | 1298 | static enum sci_status scic_controller_reset(struct scic_sds_controller *scic) |
1309 | { | 1299 | { |
1310 | switch (scic->state_machine.current_state_id) { | 1300 | switch (scic->sm.current_state_id) { |
1311 | case SCI_BASE_CONTROLLER_STATE_RESET: | 1301 | case SCIC_RESET: |
1312 | case SCI_BASE_CONTROLLER_STATE_READY: | 1302 | case SCIC_READY: |
1313 | case SCI_BASE_CONTROLLER_STATE_STOPPED: | 1303 | case SCIC_STOPPED: |
1314 | case SCI_BASE_CONTROLLER_STATE_FAILED: | 1304 | case SCIC_FAILED: |
1315 | /* | 1305 | /* |
1316 | * The reset operation is not a graceful cleanup, just | 1306 | * The reset operation is not a graceful cleanup, just |
1317 | * perform the state transition. | 1307 | * perform the state transition. |
1318 | */ | 1308 | */ |
1319 | sci_base_state_machine_change_state(&scic->state_machine, | 1309 | sci_change_state(&scic->sm, SCIC_RESETTING); |
1320 | SCI_BASE_CONTROLLER_STATE_RESETTING); | ||
1321 | return SCI_SUCCESS; | 1310 | return SCI_SUCCESS; |
1322 | default: | 1311 | default: |
1323 | dev_warn(scic_to_dev(scic), | 1312 | dev_warn(scic_to_dev(scic), |
@@ -1416,15 +1405,14 @@ static void isci_user_parameters_get( | |||
1416 | 1405 | ||
1417 | static void scic_sds_controller_initial_state_enter(struct sci_base_state_machine *sm) | 1406 | static void scic_sds_controller_initial_state_enter(struct sci_base_state_machine *sm) |
1418 | { | 1407 | { |
1419 | struct scic_sds_controller *scic = container_of(sm, typeof(*scic), state_machine); | 1408 | struct scic_sds_controller *scic = container_of(sm, typeof(*scic), sm); |
1420 | 1409 | ||
1421 | sci_base_state_machine_change_state(&scic->state_machine, | 1410 | sci_change_state(&scic->sm, SCIC_RESET); |
1422 | SCI_BASE_CONTROLLER_STATE_RESET); | ||
1423 | } | 1411 | } |
1424 | 1412 | ||
1425 | static inline void scic_sds_controller_starting_state_exit(struct sci_base_state_machine *sm) | 1413 | static inline void scic_sds_controller_starting_state_exit(struct sci_base_state_machine *sm) |
1426 | { | 1414 | { |
1427 | struct scic_sds_controller *scic = container_of(sm, typeof(*scic), state_machine); | 1415 | struct scic_sds_controller *scic = container_of(sm, typeof(*scic), sm); |
1428 | 1416 | ||
1429 | sci_del_timer(&scic->timer); | 1417 | sci_del_timer(&scic->timer); |
1430 | } | 1418 | } |
@@ -1551,7 +1539,7 @@ static enum sci_status scic_controller_set_interrupt_coalescence( | |||
1551 | 1539 | ||
1552 | static void scic_sds_controller_ready_state_enter(struct sci_base_state_machine *sm) | 1540 | static void scic_sds_controller_ready_state_enter(struct sci_base_state_machine *sm) |
1553 | { | 1541 | { |
1554 | struct scic_sds_controller *scic = container_of(sm, typeof(*scic), state_machine); | 1542 | struct scic_sds_controller *scic = container_of(sm, typeof(*scic), sm); |
1555 | 1543 | ||
1556 | /* set the default interrupt coalescence number and timeout value. */ | 1544 | /* set the default interrupt coalescence number and timeout value. */ |
1557 | scic_controller_set_interrupt_coalescence(scic, 0x10, 250); | 1545 | scic_controller_set_interrupt_coalescence(scic, 0x10, 250); |
@@ -1559,7 +1547,7 @@ static void scic_sds_controller_ready_state_enter(struct sci_base_state_machine | |||
1559 | 1547 | ||
1560 | static void scic_sds_controller_ready_state_exit(struct sci_base_state_machine *sm) | 1548 | static void scic_sds_controller_ready_state_exit(struct sci_base_state_machine *sm) |
1561 | { | 1549 | { |
1562 | struct scic_sds_controller *scic = container_of(sm, typeof(*scic), state_machine); | 1550 | struct scic_sds_controller *scic = container_of(sm, typeof(*scic), sm); |
1563 | 1551 | ||
1564 | /* disable interrupt coalescence. */ | 1552 | /* disable interrupt coalescence. */ |
1565 | scic_controller_set_interrupt_coalescence(scic, 0, 0); | 1553 | scic_controller_set_interrupt_coalescence(scic, 0, 0); |
@@ -1650,7 +1638,7 @@ static enum sci_status scic_sds_controller_stop_devices(struct scic_sds_controll | |||
1650 | 1638 | ||
1651 | static void scic_sds_controller_stopping_state_enter(struct sci_base_state_machine *sm) | 1639 | static void scic_sds_controller_stopping_state_enter(struct sci_base_state_machine *sm) |
1652 | { | 1640 | { |
1653 | struct scic_sds_controller *scic = container_of(sm, typeof(*scic), state_machine); | 1641 | struct scic_sds_controller *scic = container_of(sm, typeof(*scic), sm); |
1654 | 1642 | ||
1655 | /* Stop all of the components for this controller */ | 1643 | /* Stop all of the components for this controller */ |
1656 | scic_sds_controller_stop_phys(scic); | 1644 | scic_sds_controller_stop_phys(scic); |
@@ -1660,7 +1648,7 @@ static void scic_sds_controller_stopping_state_enter(struct sci_base_state_machi | |||
1660 | 1648 | ||
1661 | static void scic_sds_controller_stopping_state_exit(struct sci_base_state_machine *sm) | 1649 | static void scic_sds_controller_stopping_state_exit(struct sci_base_state_machine *sm) |
1662 | { | 1650 | { |
1663 | struct scic_sds_controller *scic = container_of(sm, typeof(*scic), state_machine); | 1651 | struct scic_sds_controller *scic = container_of(sm, typeof(*scic), sm); |
1664 | 1652 | ||
1665 | sci_del_timer(&scic->timer); | 1653 | sci_del_timer(&scic->timer); |
1666 | } | 1654 | } |
@@ -1691,36 +1679,35 @@ static void scic_sds_controller_reset_hardware(struct scic_sds_controller *scic) | |||
1691 | 1679 | ||
1692 | static void scic_sds_controller_resetting_state_enter(struct sci_base_state_machine *sm) | 1680 | static void scic_sds_controller_resetting_state_enter(struct sci_base_state_machine *sm) |
1693 | { | 1681 | { |
1694 | struct scic_sds_controller *scic = container_of(sm, typeof(*scic), state_machine); | 1682 | struct scic_sds_controller *scic = container_of(sm, typeof(*scic), sm); |
1695 | 1683 | ||
1696 | scic_sds_controller_reset_hardware(scic); | 1684 | scic_sds_controller_reset_hardware(scic); |
1697 | sci_base_state_machine_change_state(&scic->state_machine, | 1685 | sci_change_state(&scic->sm, SCIC_RESET); |
1698 | SCI_BASE_CONTROLLER_STATE_RESET); | ||
1699 | } | 1686 | } |
1700 | 1687 | ||
1701 | static const struct sci_base_state scic_sds_controller_state_table[] = { | 1688 | static const struct sci_base_state scic_sds_controller_state_table[] = { |
1702 | [SCI_BASE_CONTROLLER_STATE_INITIAL] = { | 1689 | [SCIC_INITIAL] = { |
1703 | .enter_state = scic_sds_controller_initial_state_enter, | 1690 | .enter_state = scic_sds_controller_initial_state_enter, |
1704 | }, | 1691 | }, |
1705 | [SCI_BASE_CONTROLLER_STATE_RESET] = {}, | 1692 | [SCIC_RESET] = {}, |
1706 | [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {}, | 1693 | [SCIC_INITIALIZING] = {}, |
1707 | [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {}, | 1694 | [SCIC_INITIALIZED] = {}, |
1708 | [SCI_BASE_CONTROLLER_STATE_STARTING] = { | 1695 | [SCIC_STARTING] = { |
1709 | .exit_state = scic_sds_controller_starting_state_exit, | 1696 | .exit_state = scic_sds_controller_starting_state_exit, |
1710 | }, | 1697 | }, |
1711 | [SCI_BASE_CONTROLLER_STATE_READY] = { | 1698 | [SCIC_READY] = { |
1712 | .enter_state = scic_sds_controller_ready_state_enter, | 1699 | .enter_state = scic_sds_controller_ready_state_enter, |
1713 | .exit_state = scic_sds_controller_ready_state_exit, | 1700 | .exit_state = scic_sds_controller_ready_state_exit, |
1714 | }, | 1701 | }, |
1715 | [SCI_BASE_CONTROLLER_STATE_RESETTING] = { | 1702 | [SCIC_RESETTING] = { |
1716 | .enter_state = scic_sds_controller_resetting_state_enter, | 1703 | .enter_state = scic_sds_controller_resetting_state_enter, |
1717 | }, | 1704 | }, |
1718 | [SCI_BASE_CONTROLLER_STATE_STOPPING] = { | 1705 | [SCIC_STOPPING] = { |
1719 | .enter_state = scic_sds_controller_stopping_state_enter, | 1706 | .enter_state = scic_sds_controller_stopping_state_enter, |
1720 | .exit_state = scic_sds_controller_stopping_state_exit, | 1707 | .exit_state = scic_sds_controller_stopping_state_exit, |
1721 | }, | 1708 | }, |
1722 | [SCI_BASE_CONTROLLER_STATE_STOPPED] = {}, | 1709 | [SCIC_STOPPED] = {}, |
1723 | [SCI_BASE_CONTROLLER_STATE_FAILED] = {} | 1710 | [SCIC_FAILED] = {} |
1724 | }; | 1711 | }; |
1725 | 1712 | ||
1726 | static void scic_sds_controller_set_default_config_parameters(struct scic_sds_controller *scic) | 1713 | static void scic_sds_controller_set_default_config_parameters(struct scic_sds_controller *scic) |
@@ -1774,7 +1761,7 @@ static void controller_timeout(unsigned long data) | |||
1774 | struct sci_timer *tmr = (struct sci_timer *)data; | 1761 | struct sci_timer *tmr = (struct sci_timer *)data; |
1775 | struct scic_sds_controller *scic = container_of(tmr, typeof(*scic), timer); | 1762 | struct scic_sds_controller *scic = container_of(tmr, typeof(*scic), timer); |
1776 | struct isci_host *ihost = scic_to_ihost(scic); | 1763 | struct isci_host *ihost = scic_to_ihost(scic); |
1777 | struct sci_base_state_machine *sm = &scic->state_machine; | 1764 | struct sci_base_state_machine *sm = &scic->sm; |
1778 | unsigned long flags; | 1765 | unsigned long flags; |
1779 | 1766 | ||
1780 | spin_lock_irqsave(&ihost->scic_lock, flags); | 1767 | spin_lock_irqsave(&ihost->scic_lock, flags); |
@@ -1782,10 +1769,10 @@ static void controller_timeout(unsigned long data) | |||
1782 | if (tmr->cancel) | 1769 | if (tmr->cancel) |
1783 | goto done; | 1770 | goto done; |
1784 | 1771 | ||
1785 | if (sm->current_state_id == SCI_BASE_CONTROLLER_STATE_STARTING) | 1772 | if (sm->current_state_id == SCIC_STARTING) |
1786 | scic_sds_controller_transition_to_ready(scic, SCI_FAILURE_TIMEOUT); | 1773 | scic_sds_controller_transition_to_ready(scic, SCI_FAILURE_TIMEOUT); |
1787 | else if (sm->current_state_id == SCI_BASE_CONTROLLER_STATE_STOPPING) { | 1774 | else if (sm->current_state_id == SCIC_STOPPING) { |
1788 | sci_base_state_machine_change_state(sm, SCI_BASE_CONTROLLER_STATE_FAILED); | 1775 | sci_change_state(sm, SCIC_FAILED); |
1789 | isci_host_stop_complete(ihost, SCI_FAILURE_TIMEOUT); | 1776 | isci_host_stop_complete(ihost, SCI_FAILURE_TIMEOUT); |
1790 | } else /* / @todo Now what do we want to do in this case? */ | 1777 | } else /* / @todo Now what do we want to do in this case? */ |
1791 | dev_err(scic_to_dev(scic), | 1778 | dev_err(scic_to_dev(scic), |
@@ -1820,11 +1807,11 @@ static enum sci_status scic_controller_construct(struct scic_sds_controller *sci | |||
1820 | struct isci_host *ihost = scic_to_ihost(scic); | 1807 | struct isci_host *ihost = scic_to_ihost(scic); |
1821 | u8 i; | 1808 | u8 i; |
1822 | 1809 | ||
1823 | sci_base_state_machine_construct(&scic->state_machine, | 1810 | sci_base_state_machine_construct(&scic->sm, |
1824 | scic_sds_controller_state_table, | 1811 | scic_sds_controller_state_table, |
1825 | SCI_BASE_CONTROLLER_STATE_INITIAL); | 1812 | SCIC_INITIAL); |
1826 | 1813 | ||
1827 | sci_base_state_machine_start(&scic->state_machine); | 1814 | sci_base_state_machine_start(&scic->sm); |
1828 | 1815 | ||
1829 | scic->scu_registers = scu_base; | 1816 | scic->scu_registers = scu_base; |
1830 | scic->smu_registers = smu_base; | 1817 | scic->smu_registers = smu_base; |
@@ -1899,11 +1886,11 @@ int scic_oem_parameters_validate(struct scic_sds_oem_params *oem) | |||
1899 | static enum sci_status scic_oem_parameters_set(struct scic_sds_controller *scic, | 1886 | static enum sci_status scic_oem_parameters_set(struct scic_sds_controller *scic, |
1900 | union scic_oem_parameters *scic_parms) | 1887 | union scic_oem_parameters *scic_parms) |
1901 | { | 1888 | { |
1902 | u32 state = scic->state_machine.current_state_id; | 1889 | u32 state = scic->sm.current_state_id; |
1903 | 1890 | ||
1904 | if (state == SCI_BASE_CONTROLLER_STATE_RESET || | 1891 | if (state == SCIC_RESET || |
1905 | state == SCI_BASE_CONTROLLER_STATE_INITIALIZING || | 1892 | state == SCIC_INITIALIZING || |
1906 | state == SCI_BASE_CONTROLLER_STATE_INITIALIZED) { | 1893 | state == SCIC_INITIALIZED) { |
1907 | 1894 | ||
1908 | if (scic_oem_parameters_validate(&scic_parms->sds1)) | 1895 | if (scic_oem_parameters_validate(&scic_parms->sds1)) |
1909 | return SCI_FAILURE_INVALID_PARAMETER_VALUE; | 1896 | return SCI_FAILURE_INVALID_PARAMETER_VALUE; |
@@ -2168,10 +2155,8 @@ static enum sci_status scic_controller_set_mode(struct scic_sds_controller *scic | |||
2168 | { | 2155 | { |
2169 | enum sci_status status = SCI_SUCCESS; | 2156 | enum sci_status status = SCI_SUCCESS; |
2170 | 2157 | ||
2171 | if ((scic->state_machine.current_state_id == | 2158 | if ((scic->sm.current_state_id == SCIC_INITIALIZING) || |
2172 | SCI_BASE_CONTROLLER_STATE_INITIALIZING) || | 2159 | (scic->sm.current_state_id == SCIC_INITIALIZED)) { |
2173 | (scic->state_machine.current_state_id == | ||
2174 | SCI_BASE_CONTROLLER_STATE_INITIALIZED)) { | ||
2175 | switch (operating_mode) { | 2160 | switch (operating_mode) { |
2176 | case SCI_MODE_SPEED: | 2161 | case SCI_MODE_SPEED: |
2177 | scic->remote_node_entries = SCI_MAX_REMOTE_DEVICES; | 2162 | scic->remote_node_entries = SCI_MAX_REMOTE_DEVICES; |
@@ -2216,20 +2201,19 @@ static void scic_sds_controller_initialize_power_control(struct scic_sds_control | |||
2216 | 2201 | ||
2217 | static enum sci_status scic_controller_initialize(struct scic_sds_controller *scic) | 2202 | static enum sci_status scic_controller_initialize(struct scic_sds_controller *scic) |
2218 | { | 2203 | { |
2219 | struct sci_base_state_machine *sm = &scic->state_machine; | 2204 | struct sci_base_state_machine *sm = &scic->sm; |
2220 | enum sci_status result = SCI_SUCCESS; | 2205 | enum sci_status result = SCI_SUCCESS; |
2221 | struct isci_host *ihost = scic_to_ihost(scic); | 2206 | struct isci_host *ihost = scic_to_ihost(scic); |
2222 | u32 index, state; | 2207 | u32 index, state; |
2223 | 2208 | ||
2224 | if (scic->state_machine.current_state_id != | 2209 | if (scic->sm.current_state_id != SCIC_RESET) { |
2225 | SCI_BASE_CONTROLLER_STATE_RESET) { | ||
2226 | dev_warn(scic_to_dev(scic), | 2210 | dev_warn(scic_to_dev(scic), |
2227 | "SCIC Controller initialize operation requested " | 2211 | "SCIC Controller initialize operation requested " |
2228 | "in invalid state\n"); | 2212 | "in invalid state\n"); |
2229 | return SCI_FAILURE_INVALID_STATE; | 2213 | return SCI_FAILURE_INVALID_STATE; |
2230 | } | 2214 | } |
2231 | 2215 | ||
2232 | sci_base_state_machine_change_state(sm, SCI_BASE_CONTROLLER_STATE_INITIALIZING); | 2216 | sci_change_state(sm, SCIC_INITIALIZING); |
2233 | 2217 | ||
2234 | sci_init_timer(&scic->phy_timer, phy_startup_timeout); | 2218 | sci_init_timer(&scic->phy_timer, phy_startup_timeout); |
2235 | 2219 | ||
@@ -2374,10 +2358,10 @@ static enum sci_status scic_controller_initialize(struct scic_sds_controller *sc | |||
2374 | 2358 | ||
2375 | /* Advance the controller state machine */ | 2359 | /* Advance the controller state machine */ |
2376 | if (result == SCI_SUCCESS) | 2360 | if (result == SCI_SUCCESS) |
2377 | state = SCI_BASE_CONTROLLER_STATE_INITIALIZED; | 2361 | state = SCIC_INITIALIZED; |
2378 | else | 2362 | else |
2379 | state = SCI_BASE_CONTROLLER_STATE_FAILED; | 2363 | state = SCIC_FAILED; |
2380 | sci_base_state_machine_change_state(sm, state); | 2364 | sci_change_state(sm, state); |
2381 | 2365 | ||
2382 | return result; | 2366 | return result; |
2383 | } | 2367 | } |
@@ -2386,11 +2370,11 @@ static enum sci_status scic_user_parameters_set( | |||
2386 | struct scic_sds_controller *scic, | 2370 | struct scic_sds_controller *scic, |
2387 | union scic_user_parameters *scic_parms) | 2371 | union scic_user_parameters *scic_parms) |
2388 | { | 2372 | { |
2389 | u32 state = scic->state_machine.current_state_id; | 2373 | u32 state = scic->sm.current_state_id; |
2390 | 2374 | ||
2391 | if (state == SCI_BASE_CONTROLLER_STATE_RESET || | 2375 | if (state == SCIC_RESET || |
2392 | state == SCI_BASE_CONTROLLER_STATE_INITIALIZING || | 2376 | state == SCIC_INITIALIZING || |
2393 | state == SCI_BASE_CONTROLLER_STATE_INITIALIZED) { | 2377 | state == SCIC_INITIALIZED) { |
2394 | u16 index; | 2378 | u16 index; |
2395 | 2379 | ||
2396 | /* | 2380 | /* |
@@ -2612,15 +2596,15 @@ int isci_host_init(struct isci_host *isci_host) | |||
2612 | void scic_sds_controller_link_up(struct scic_sds_controller *scic, | 2596 | void scic_sds_controller_link_up(struct scic_sds_controller *scic, |
2613 | struct scic_sds_port *port, struct scic_sds_phy *phy) | 2597 | struct scic_sds_port *port, struct scic_sds_phy *phy) |
2614 | { | 2598 | { |
2615 | switch (scic->state_machine.current_state_id) { | 2599 | switch (scic->sm.current_state_id) { |
2616 | case SCI_BASE_CONTROLLER_STATE_STARTING: | 2600 | case SCIC_STARTING: |
2617 | sci_del_timer(&scic->phy_timer); | 2601 | sci_del_timer(&scic->phy_timer); |
2618 | scic->phy_startup_timer_pending = false; | 2602 | scic->phy_startup_timer_pending = false; |
2619 | scic->port_agent.link_up_handler(scic, &scic->port_agent, | 2603 | scic->port_agent.link_up_handler(scic, &scic->port_agent, |
2620 | port, phy); | 2604 | port, phy); |
2621 | scic_sds_controller_start_next_phy(scic); | 2605 | scic_sds_controller_start_next_phy(scic); |
2622 | break; | 2606 | break; |
2623 | case SCI_BASE_CONTROLLER_STATE_READY: | 2607 | case SCIC_READY: |
2624 | scic->port_agent.link_up_handler(scic, &scic->port_agent, | 2608 | scic->port_agent.link_up_handler(scic, &scic->port_agent, |
2625 | port, phy); | 2609 | port, phy); |
2626 | break; | 2610 | break; |
@@ -2628,16 +2612,16 @@ void scic_sds_controller_link_up(struct scic_sds_controller *scic, | |||
2628 | dev_dbg(scic_to_dev(scic), | 2612 | dev_dbg(scic_to_dev(scic), |
2629 | "%s: SCIC Controller linkup event from phy %d in " | 2613 | "%s: SCIC Controller linkup event from phy %d in " |
2630 | "unexpected state %d\n", __func__, phy->phy_index, | 2614 | "unexpected state %d\n", __func__, phy->phy_index, |
2631 | scic->state_machine.current_state_id); | 2615 | scic->sm.current_state_id); |
2632 | } | 2616 | } |
2633 | } | 2617 | } |
2634 | 2618 | ||
2635 | void scic_sds_controller_link_down(struct scic_sds_controller *scic, | 2619 | void scic_sds_controller_link_down(struct scic_sds_controller *scic, |
2636 | struct scic_sds_port *port, struct scic_sds_phy *phy) | 2620 | struct scic_sds_port *port, struct scic_sds_phy *phy) |
2637 | { | 2621 | { |
2638 | switch (scic->state_machine.current_state_id) { | 2622 | switch (scic->sm.current_state_id) { |
2639 | case SCI_BASE_CONTROLLER_STATE_STARTING: | 2623 | case SCIC_STARTING: |
2640 | case SCI_BASE_CONTROLLER_STATE_READY: | 2624 | case SCIC_READY: |
2641 | scic->port_agent.link_down_handler(scic, &scic->port_agent, | 2625 | scic->port_agent.link_down_handler(scic, &scic->port_agent, |
2642 | port, phy); | 2626 | port, phy); |
2643 | break; | 2627 | break; |
@@ -2647,7 +2631,7 @@ void scic_sds_controller_link_down(struct scic_sds_controller *scic, | |||
2647 | "unexpected state %d\n", | 2631 | "unexpected state %d\n", |
2648 | __func__, | 2632 | __func__, |
2649 | phy->phy_index, | 2633 | phy->phy_index, |
2650 | scic->state_machine.current_state_id); | 2634 | scic->sm.current_state_id); |
2651 | } | 2635 | } |
2652 | } | 2636 | } |
2653 | 2637 | ||
@@ -2663,8 +2647,7 @@ static bool scic_sds_controller_has_remote_devices_stopping( | |||
2663 | 2647 | ||
2664 | for (index = 0; index < controller->remote_node_entries; index++) { | 2648 | for (index = 0; index < controller->remote_node_entries; index++) { |
2665 | if ((controller->device_table[index] != NULL) && | 2649 | if ((controller->device_table[index] != NULL) && |
2666 | (controller->device_table[index]->state_machine.current_state_id | 2650 | (controller->device_table[index]->sm.current_state_id == SCI_DEV_STOPPING)) |
2667 | == SCI_BASE_REMOTE_DEVICE_STATE_STOPPING)) | ||
2668 | return true; | 2651 | return true; |
2669 | } | 2652 | } |
2670 | 2653 | ||
@@ -2678,19 +2661,17 @@ static bool scic_sds_controller_has_remote_devices_stopping( | |||
2678 | void scic_sds_controller_remote_device_stopped(struct scic_sds_controller *scic, | 2661 | void scic_sds_controller_remote_device_stopped(struct scic_sds_controller *scic, |
2679 | struct scic_sds_remote_device *sci_dev) | 2662 | struct scic_sds_remote_device *sci_dev) |
2680 | { | 2663 | { |
2681 | if (scic->state_machine.current_state_id != | 2664 | if (scic->sm.current_state_id != SCIC_STOPPING) { |
2682 | SCI_BASE_CONTROLLER_STATE_STOPPING) { | ||
2683 | dev_dbg(scic_to_dev(scic), | 2665 | dev_dbg(scic_to_dev(scic), |
2684 | "SCIC Controller 0x%p remote device stopped event " | 2666 | "SCIC Controller 0x%p remote device stopped event " |
2685 | "from device 0x%p in unexpected state %d\n", | 2667 | "from device 0x%p in unexpected state %d\n", |
2686 | scic, sci_dev, | 2668 | scic, sci_dev, |
2687 | scic->state_machine.current_state_id); | 2669 | scic->sm.current_state_id); |
2688 | return; | 2670 | return; |
2689 | } | 2671 | } |
2690 | 2672 | ||
2691 | if (!scic_sds_controller_has_remote_devices_stopping(scic)) { | 2673 | if (!scic_sds_controller_has_remote_devices_stopping(scic)) { |
2692 | sci_base_state_machine_change_state(&scic->state_machine, | 2674 | sci_change_state(&scic->sm, SCIC_STOPPED); |
2693 | SCI_BASE_CONTROLLER_STATE_STOPPED); | ||
2694 | } | 2675 | } |
2695 | } | 2676 | } |
2696 | 2677 | ||
@@ -2948,8 +2929,7 @@ enum sci_status scic_controller_start_io( | |||
2948 | { | 2929 | { |
2949 | enum sci_status status; | 2930 | enum sci_status status; |
2950 | 2931 | ||
2951 | if (scic->state_machine.current_state_id != | 2932 | if (scic->sm.current_state_id != SCIC_READY) { |
2952 | SCI_BASE_CONTROLLER_STATE_READY) { | ||
2953 | dev_warn(scic_to_dev(scic), "invalid state to start I/O"); | 2933 | dev_warn(scic_to_dev(scic), "invalid state to start I/O"); |
2954 | return SCI_FAILURE_INVALID_STATE; | 2934 | return SCI_FAILURE_INVALID_STATE; |
2955 | } | 2935 | } |
@@ -2986,8 +2966,7 @@ enum sci_status scic_controller_terminate_request( | |||
2986 | { | 2966 | { |
2987 | enum sci_status status; | 2967 | enum sci_status status; |
2988 | 2968 | ||
2989 | if (scic->state_machine.current_state_id != | 2969 | if (scic->sm.current_state_id != SCIC_READY) { |
2990 | SCI_BASE_CONTROLLER_STATE_READY) { | ||
2991 | dev_warn(scic_to_dev(scic), | 2970 | dev_warn(scic_to_dev(scic), |
2992 | "invalid state to terminate request\n"); | 2971 | "invalid state to terminate request\n"); |
2993 | return SCI_FAILURE_INVALID_STATE; | 2972 | return SCI_FAILURE_INVALID_STATE; |
@@ -3037,11 +3016,11 @@ enum sci_status scic_controller_complete_io( | |||
3037 | enum sci_status status; | 3016 | enum sci_status status; |
3038 | u16 index; | 3017 | u16 index; |
3039 | 3018 | ||
3040 | switch (scic->state_machine.current_state_id) { | 3019 | switch (scic->sm.current_state_id) { |
3041 | case SCI_BASE_CONTROLLER_STATE_STOPPING: | 3020 | case SCIC_STOPPING: |
3042 | /* XXX: Implement this function */ | 3021 | /* XXX: Implement this function */ |
3043 | return SCI_FAILURE; | 3022 | return SCI_FAILURE; |
3044 | case SCI_BASE_CONTROLLER_STATE_READY: | 3023 | case SCIC_READY: |
3045 | status = scic_sds_remote_device_complete_io(scic, rdev, request); | 3024 | status = scic_sds_remote_device_complete_io(scic, rdev, request); |
3046 | if (status != SCI_SUCCESS) | 3025 | if (status != SCI_SUCCESS) |
3047 | return status; | 3026 | return status; |
@@ -3060,8 +3039,7 @@ enum sci_status scic_controller_continue_io(struct scic_sds_request *sci_req) | |||
3060 | { | 3039 | { |
3061 | struct scic_sds_controller *scic = sci_req->owning_controller; | 3040 | struct scic_sds_controller *scic = sci_req->owning_controller; |
3062 | 3041 | ||
3063 | if (scic->state_machine.current_state_id != | 3042 | if (scic->sm.current_state_id != SCIC_READY) { |
3064 | SCI_BASE_CONTROLLER_STATE_READY) { | ||
3065 | dev_warn(scic_to_dev(scic), "invalid state to continue I/O"); | 3043 | dev_warn(scic_to_dev(scic), "invalid state to continue I/O"); |
3066 | return SCI_FAILURE_INVALID_STATE; | 3044 | return SCI_FAILURE_INVALID_STATE; |
3067 | } | 3045 | } |
@@ -3107,8 +3085,7 @@ enum sci_task_status scic_controller_start_task( | |||
3107 | { | 3085 | { |
3108 | enum sci_status status; | 3086 | enum sci_status status; |
3109 | 3087 | ||
3110 | if (scic->state_machine.current_state_id != | 3088 | if (scic->sm.current_state_id != SCIC_READY) { |
3111 | SCI_BASE_CONTROLLER_STATE_READY) { | ||
3112 | dev_warn(scic_to_dev(scic), | 3089 | dev_warn(scic_to_dev(scic), |
3113 | "%s: SCIC Controller starting task from invalid " | 3090 | "%s: SCIC Controller starting task from invalid " |
3114 | "state\n", | 3091 | "state\n", |