diff options
author | Wayne Boyer <wayneb@linux.vnet.ibm.com> | 2010-02-19 16:23:59 -0500 |
---|---|---|
committer | James Bottomley <James.Bottomley@suse.de> | 2010-03-03 05:34:57 -0500 |
commit | 3e7ebdfa58ddaef361f9538219e66a7226fb1e5d (patch) | |
tree | 949b86d83da2dc36bb8b0d8bd01cb4059bf93834 /drivers/scsi/ipr.h | |
parent | a74c16390a47dcb6c96b20b572ffc9936073d4b1 (diff) |
[SCSI] ipr: update the configuration table code for the next generation chip
This patch changes the configuration table structures and related code such
that both 32 bit and 64 bit based adapters can work with the driver.
This patch also implements the code to generate the virtual bus/id/lun values
for devices connected to the new adapters. It also implements support for the
new device resource path.
Signed-off-by: Wayne Boyer <wayneb@linux.vnet.ibm.com>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'drivers/scsi/ipr.h')
-rw-r--r-- | drivers/scsi/ipr.h | 174 |
1 files changed, 122 insertions, 52 deletions
diff --git a/drivers/scsi/ipr.h b/drivers/scsi/ipr.h index 64e41df2a196..f10c57b3d215 100644 --- a/drivers/scsi/ipr.h +++ b/drivers/scsi/ipr.h | |||
@@ -118,6 +118,10 @@ | |||
118 | #define IPR_NUM_LOG_HCAMS 2 | 118 | #define IPR_NUM_LOG_HCAMS 2 |
119 | #define IPR_NUM_CFG_CHG_HCAMS 2 | 119 | #define IPR_NUM_CFG_CHG_HCAMS 2 |
120 | #define IPR_NUM_HCAMS (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS) | 120 | #define IPR_NUM_HCAMS (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS) |
121 | |||
122 | #define IPR_MAX_SIS64_TARGETS_PER_BUS 1024 | ||
123 | #define IPR_MAX_SIS64_LUNS_PER_TARGET 0xffffffff | ||
124 | |||
121 | #define IPR_MAX_NUM_TARGETS_PER_BUS 256 | 125 | #define IPR_MAX_NUM_TARGETS_PER_BUS 256 |
122 | #define IPR_MAX_NUM_LUNS_PER_TARGET 256 | 126 | #define IPR_MAX_NUM_LUNS_PER_TARGET 256 |
123 | #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET 8 | 127 | #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET 8 |
@@ -139,6 +143,8 @@ | |||
139 | IPR_NUM_INTERNAL_CMD_BLKS) | 143 | IPR_NUM_INTERNAL_CMD_BLKS) |
140 | 144 | ||
141 | #define IPR_MAX_PHYSICAL_DEVS 192 | 145 | #define IPR_MAX_PHYSICAL_DEVS 192 |
146 | #define IPR_DEFAULT_SIS64_DEVS 1024 | ||
147 | #define IPR_MAX_SIS64_DEVS 4096 | ||
142 | 148 | ||
143 | #define IPR_MAX_SGLIST 64 | 149 | #define IPR_MAX_SGLIST 64 |
144 | #define IPR_IOA_MAX_SECTORS 32767 | 150 | #define IPR_IOA_MAX_SECTORS 32767 |
@@ -173,6 +179,7 @@ | |||
173 | #define IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE 0x01 | 179 | #define IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE 0x01 |
174 | #define IPR_HCAM_CDB_OP_CODE_LOG_DATA 0x02 | 180 | #define IPR_HCAM_CDB_OP_CODE_LOG_DATA 0x02 |
175 | #define IPR_SET_SUPPORTED_DEVICES 0xFB | 181 | #define IPR_SET_SUPPORTED_DEVICES 0xFB |
182 | #define IPR_SET_ALL_SUPPORTED_DEVICES 0x80 | ||
176 | #define IPR_IOA_SHUTDOWN 0xF7 | 183 | #define IPR_IOA_SHUTDOWN 0xF7 |
177 | #define IPR_WR_BUF_DOWNLOAD_AND_SAVE 0x05 | 184 | #define IPR_WR_BUF_DOWNLOAD_AND_SAVE 0x05 |
178 | 185 | ||
@@ -318,27 +325,27 @@ struct ipr_std_inq_data { | |||
318 | u8 serial_num[IPR_SERIAL_NUM_LEN]; | 325 | u8 serial_num[IPR_SERIAL_NUM_LEN]; |
319 | }__attribute__ ((packed)); | 326 | }__attribute__ ((packed)); |
320 | 327 | ||
328 | #define IPR_RES_TYPE_AF_DASD 0x00 | ||
329 | #define IPR_RES_TYPE_GENERIC_SCSI 0x01 | ||
330 | #define IPR_RES_TYPE_VOLUME_SET 0x02 | ||
331 | #define IPR_RES_TYPE_REMOTE_AF_DASD 0x03 | ||
332 | #define IPR_RES_TYPE_GENERIC_ATA 0x04 | ||
333 | #define IPR_RES_TYPE_ARRAY 0x05 | ||
334 | #define IPR_RES_TYPE_IOAFP 0xff | ||
335 | |||
321 | struct ipr_config_table_entry { | 336 | struct ipr_config_table_entry { |
322 | u8 proto; | 337 | u8 proto; |
323 | #define IPR_PROTO_SATA 0x02 | 338 | #define IPR_PROTO_SATA 0x02 |
324 | #define IPR_PROTO_SATA_ATAPI 0x03 | 339 | #define IPR_PROTO_SATA_ATAPI 0x03 |
325 | #define IPR_PROTO_SAS_STP 0x06 | 340 | #define IPR_PROTO_SAS_STP 0x06 |
326 | #define IPR_PROTO_SAS_STP_ATAPI 0x07 | 341 | #define IPR_PROTO_SAS_STP_ATAPI 0x07 |
327 | u8 array_id; | 342 | u8 array_id; |
328 | u8 flags; | 343 | u8 flags; |
329 | #define IPR_IS_IOA_RESOURCE 0x80 | 344 | #define IPR_IS_IOA_RESOURCE 0x80 |
330 | #define IPR_IS_ARRAY_MEMBER 0x20 | ||
331 | #define IPR_IS_HOT_SPARE 0x10 | ||
332 | |||
333 | u8 rsvd_subtype; | 345 | u8 rsvd_subtype; |
334 | #define IPR_RES_SUBTYPE(res) (((res)->cfgte.rsvd_subtype) & 0x0f) | 346 | |
335 | #define IPR_SUBTYPE_AF_DASD 0 | 347 | #define IPR_QUEUEING_MODEL(res) ((((res)->flags) & 0x70) >> 4) |
336 | #define IPR_SUBTYPE_GENERIC_SCSI 1 | 348 | #define IPR_QUEUE_FROZEN_MODEL 0 |
337 | #define IPR_SUBTYPE_VOLUME_SET 2 | ||
338 | #define IPR_SUBTYPE_GENERIC_ATA 4 | ||
339 | |||
340 | #define IPR_QUEUEING_MODEL(res) ((((res)->cfgte.flags) & 0x70) >> 4) | ||
341 | #define IPR_QUEUE_FROZEN_MODEL 0 | ||
342 | #define IPR_QUEUE_NACA_MODEL 1 | 349 | #define IPR_QUEUE_NACA_MODEL 1 |
343 | 350 | ||
344 | struct ipr_res_addr res_addr; | 351 | struct ipr_res_addr res_addr; |
@@ -347,6 +354,28 @@ struct ipr_config_table_entry { | |||
347 | struct ipr_std_inq_data std_inq_data; | 354 | struct ipr_std_inq_data std_inq_data; |
348 | }__attribute__ ((packed, aligned (4))); | 355 | }__attribute__ ((packed, aligned (4))); |
349 | 356 | ||
357 | struct ipr_config_table_entry64 { | ||
358 | u8 res_type; | ||
359 | u8 proto; | ||
360 | u8 vset_num; | ||
361 | u8 array_id; | ||
362 | __be16 flags; | ||
363 | __be16 res_flags; | ||
364 | #define IPR_QUEUEING_MODEL64(res) ((((res)->res_flags) & 0x7000) >> 12) | ||
365 | __be32 res_handle; | ||
366 | u8 dev_id_type; | ||
367 | u8 reserved[3]; | ||
368 | __be64 dev_id; | ||
369 | __be64 lun; | ||
370 | __be64 lun_wwn[2]; | ||
371 | #define IPR_MAX_RES_PATH_LENGTH 24 | ||
372 | __be64 res_path; | ||
373 | struct ipr_std_inq_data std_inq_data; | ||
374 | u8 reserved2[4]; | ||
375 | __be64 reserved3[2]; // description text | ||
376 | u8 reserved4[8]; | ||
377 | }__attribute__ ((packed, aligned (8))); | ||
378 | |||
350 | struct ipr_config_table_hdr { | 379 | struct ipr_config_table_hdr { |
351 | u8 num_entries; | 380 | u8 num_entries; |
352 | u8 flags; | 381 | u8 flags; |
@@ -354,13 +383,35 @@ struct ipr_config_table_hdr { | |||
354 | __be16 reserved; | 383 | __be16 reserved; |
355 | }__attribute__((packed, aligned (4))); | 384 | }__attribute__((packed, aligned (4))); |
356 | 385 | ||
386 | struct ipr_config_table_hdr64 { | ||
387 | __be16 num_entries; | ||
388 | __be16 reserved; | ||
389 | u8 flags; | ||
390 | u8 reserved2[11]; | ||
391 | }__attribute__((packed, aligned (4))); | ||
392 | |||
357 | struct ipr_config_table { | 393 | struct ipr_config_table { |
358 | struct ipr_config_table_hdr hdr; | 394 | struct ipr_config_table_hdr hdr; |
359 | struct ipr_config_table_entry dev[IPR_MAX_PHYSICAL_DEVS]; | 395 | struct ipr_config_table_entry dev[0]; |
360 | }__attribute__((packed, aligned (4))); | 396 | }__attribute__((packed, aligned (4))); |
361 | 397 | ||
398 | struct ipr_config_table64 { | ||
399 | struct ipr_config_table_hdr64 hdr64; | ||
400 | struct ipr_config_table_entry64 dev[0]; | ||
401 | }__attribute__((packed, aligned (8))); | ||
402 | |||
403 | struct ipr_config_table_entry_wrapper { | ||
404 | union { | ||
405 | struct ipr_config_table_entry *cfgte; | ||
406 | struct ipr_config_table_entry64 *cfgte64; | ||
407 | } u; | ||
408 | }; | ||
409 | |||
362 | struct ipr_hostrcb_cfg_ch_not { | 410 | struct ipr_hostrcb_cfg_ch_not { |
363 | struct ipr_config_table_entry cfgte; | 411 | union { |
412 | struct ipr_config_table_entry cfgte; | ||
413 | struct ipr_config_table_entry64 cfgte64; | ||
414 | } u; | ||
364 | u8 reserved[936]; | 415 | u8 reserved[936]; |
365 | }__attribute__((packed, aligned (4))); | 416 | }__attribute__((packed, aligned (4))); |
366 | 417 | ||
@@ -987,28 +1038,48 @@ struct ipr_sata_port { | |||
987 | }; | 1038 | }; |
988 | 1039 | ||
989 | struct ipr_resource_entry { | 1040 | struct ipr_resource_entry { |
990 | struct ipr_config_table_entry cfgte; | ||
991 | u8 needs_sync_complete:1; | 1041 | u8 needs_sync_complete:1; |
992 | u8 in_erp:1; | 1042 | u8 in_erp:1; |
993 | u8 add_to_ml:1; | 1043 | u8 add_to_ml:1; |
994 | u8 del_from_ml:1; | 1044 | u8 del_from_ml:1; |
995 | u8 resetting_device:1; | 1045 | u8 resetting_device:1; |
996 | 1046 | ||
1047 | u32 bus; /* AKA channel */ | ||
1048 | u32 target; /* AKA id */ | ||
1049 | u32 lun; | ||
1050 | #define IPR_ARRAY_VIRTUAL_BUS 0x1 | ||
1051 | #define IPR_VSET_VIRTUAL_BUS 0x2 | ||
1052 | #define IPR_IOAFP_VIRTUAL_BUS 0x3 | ||
1053 | |||
1054 | #define IPR_GET_RES_PHYS_LOC(res) \ | ||
1055 | (((res)->bus << 24) | ((res)->target << 8) | (res)->lun) | ||
1056 | |||
1057 | u8 ata_class; | ||
1058 | |||
1059 | u8 flags; | ||
1060 | __be16 res_flags; | ||
1061 | |||
1062 | __be32 type; | ||
1063 | |||
1064 | u8 qmodel; | ||
1065 | struct ipr_std_inq_data std_inq_data; | ||
1066 | |||
1067 | __be32 res_handle; | ||
1068 | __be64 dev_id; | ||
1069 | struct scsi_lun dev_lun; | ||
1070 | u8 res_path[8]; | ||
1071 | |||
1072 | struct ipr_ioa_cfg *ioa_cfg; | ||
997 | struct scsi_device *sdev; | 1073 | struct scsi_device *sdev; |
998 | struct ipr_sata_port *sata_port; | 1074 | struct ipr_sata_port *sata_port; |
999 | struct list_head queue; | 1075 | struct list_head queue; |
1000 | }; | 1076 | }; /* struct ipr_resource_entry */ |
1001 | 1077 | ||
1002 | struct ipr_resource_hdr { | 1078 | struct ipr_resource_hdr { |
1003 | u16 num_entries; | 1079 | u16 num_entries; |
1004 | u16 reserved; | 1080 | u16 reserved; |
1005 | }; | 1081 | }; |
1006 | 1082 | ||
1007 | struct ipr_resource_table { | ||
1008 | struct ipr_resource_hdr hdr; | ||
1009 | struct ipr_resource_entry dev[IPR_MAX_PHYSICAL_DEVS]; | ||
1010 | }; | ||
1011 | |||
1012 | struct ipr_misc_cbs { | 1083 | struct ipr_misc_cbs { |
1013 | struct ipr_ioa_vpd ioa_vpd; | 1084 | struct ipr_ioa_vpd ioa_vpd; |
1014 | struct ipr_inquiry_page0 page0_data; | 1085 | struct ipr_inquiry_page0 page0_data; |
@@ -1133,6 +1204,13 @@ struct ipr_ioa_cfg { | |||
1133 | 1204 | ||
1134 | u8 revid; | 1205 | u8 revid; |
1135 | 1206 | ||
1207 | /* | ||
1208 | * Bitmaps for SIS64 generated target values | ||
1209 | */ | ||
1210 | unsigned long *target_ids; | ||
1211 | unsigned long *array_ids; | ||
1212 | unsigned long *vset_ids; | ||
1213 | |||
1136 | enum ipr_cache_state cache_state; | 1214 | enum ipr_cache_state cache_state; |
1137 | u16 type; /* CCIN of the card */ | 1215 | u16 type; /* CCIN of the card */ |
1138 | 1216 | ||
@@ -1164,8 +1242,13 @@ struct ipr_ioa_cfg { | |||
1164 | 1242 | ||
1165 | char cfg_table_start[8]; | 1243 | char cfg_table_start[8]; |
1166 | #define IPR_CFG_TBL_START "cfg" | 1244 | #define IPR_CFG_TBL_START "cfg" |
1167 | struct ipr_config_table *cfg_table; | 1245 | union { |
1246 | struct ipr_config_table *cfg_table; | ||
1247 | struct ipr_config_table64 *cfg_table64; | ||
1248 | } u; | ||
1168 | dma_addr_t cfg_table_dma; | 1249 | dma_addr_t cfg_table_dma; |
1250 | u32 cfg_table_size; | ||
1251 | u32 max_devs_supported; | ||
1169 | 1252 | ||
1170 | char resource_table_label[8]; | 1253 | char resource_table_label[8]; |
1171 | #define IPR_RES_TABLE_LABEL "res_tbl" | 1254 | #define IPR_RES_TABLE_LABEL "res_tbl" |
@@ -1234,7 +1317,7 @@ struct ipr_ioa_cfg { | |||
1234 | #define IPR_CMD_LABEL "ipr_cmd" | 1317 | #define IPR_CMD_LABEL "ipr_cmd" |
1235 | struct ipr_cmnd *ipr_cmnd_list[IPR_NUM_CMD_BLKS]; | 1318 | struct ipr_cmnd *ipr_cmnd_list[IPR_NUM_CMD_BLKS]; |
1236 | dma_addr_t ipr_cmnd_list_dma[IPR_NUM_CMD_BLKS]; | 1319 | dma_addr_t ipr_cmnd_list_dma[IPR_NUM_CMD_BLKS]; |
1237 | }; | 1320 | }; /* struct ipr_ioa_cfg */ |
1238 | 1321 | ||
1239 | struct ipr_cmnd { | 1322 | struct ipr_cmnd { |
1240 | struct ipr_ioarcb ioarcb; | 1323 | struct ipr_ioarcb ioarcb; |
@@ -1412,6 +1495,13 @@ struct ipr_ucode_image_header { | |||
1412 | #define ipr_info(...) printk(KERN_INFO IPR_NAME ": "__VA_ARGS__) | 1495 | #define ipr_info(...) printk(KERN_INFO IPR_NAME ": "__VA_ARGS__) |
1413 | #define ipr_dbg(...) IPR_DBG_CMD(printk(KERN_INFO IPR_NAME ": "__VA_ARGS__)) | 1496 | #define ipr_dbg(...) IPR_DBG_CMD(printk(KERN_INFO IPR_NAME ": "__VA_ARGS__)) |
1414 | 1497 | ||
1498 | #define ipr_res_printk(level, ioa_cfg, bus, target, lun, fmt, ...) \ | ||
1499 | printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, (ioa_cfg)->host->host_no, \ | ||
1500 | bus, target, lun, ##__VA_ARGS__) | ||
1501 | |||
1502 | #define ipr_res_err(ioa_cfg, res, fmt, ...) \ | ||
1503 | ipr_res_printk(KERN_ERR, ioa_cfg, (res)->bus, (res)->target, (res)->lun, fmt, ##__VA_ARGS__) | ||
1504 | |||
1415 | #define ipr_ra_printk(level, ioa_cfg, ra, fmt, ...) \ | 1505 | #define ipr_ra_printk(level, ioa_cfg, ra, fmt, ...) \ |
1416 | printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, (ioa_cfg)->host->host_no, \ | 1506 | printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, (ioa_cfg)->host->host_no, \ |
1417 | (ra).bus, (ra).target, (ra).lun, ##__VA_ARGS__) | 1507 | (ra).bus, (ra).target, (ra).lun, ##__VA_ARGS__) |
@@ -1419,9 +1509,6 @@ struct ipr_ucode_image_header { | |||
1419 | #define ipr_ra_err(ioa_cfg, ra, fmt, ...) \ | 1509 | #define ipr_ra_err(ioa_cfg, ra, fmt, ...) \ |
1420 | ipr_ra_printk(KERN_ERR, ioa_cfg, ra, fmt, ##__VA_ARGS__) | 1510 | ipr_ra_printk(KERN_ERR, ioa_cfg, ra, fmt, ##__VA_ARGS__) |
1421 | 1511 | ||
1422 | #define ipr_res_err(ioa_cfg, res, fmt, ...) \ | ||
1423 | ipr_ra_err(ioa_cfg, (res)->cfgte.res_addr, fmt, ##__VA_ARGS__) | ||
1424 | |||
1425 | #define ipr_phys_res_err(ioa_cfg, res, fmt, ...) \ | 1512 | #define ipr_phys_res_err(ioa_cfg, res, fmt, ...) \ |
1426 | { \ | 1513 | { \ |
1427 | if ((res).bus >= IPR_MAX_NUM_BUSES) { \ | 1514 | if ((res).bus >= IPR_MAX_NUM_BUSES) { \ |
@@ -1467,7 +1554,7 @@ ipr_err("----------------------------------------------------------\n") | |||
1467 | **/ | 1554 | **/ |
1468 | static inline int ipr_is_ioa_resource(struct ipr_resource_entry *res) | 1555 | static inline int ipr_is_ioa_resource(struct ipr_resource_entry *res) |
1469 | { | 1556 | { |
1470 | return (res->cfgte.flags & IPR_IS_IOA_RESOURCE) ? 1 : 0; | 1557 | return res->type == IPR_RES_TYPE_IOAFP; |
1471 | } | 1558 | } |
1472 | 1559 | ||
1473 | /** | 1560 | /** |
@@ -1479,12 +1566,8 @@ static inline int ipr_is_ioa_resource(struct ipr_resource_entry *res) | |||
1479 | **/ | 1566 | **/ |
1480 | static inline int ipr_is_af_dasd_device(struct ipr_resource_entry *res) | 1567 | static inline int ipr_is_af_dasd_device(struct ipr_resource_entry *res) |
1481 | { | 1568 | { |
1482 | if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) && | 1569 | return res->type == IPR_RES_TYPE_AF_DASD || |
1483 | !ipr_is_ioa_resource(res) && | 1570 | res->type == IPR_RES_TYPE_REMOTE_AF_DASD; |
1484 | IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_AF_DASD) | ||
1485 | return 1; | ||
1486 | else | ||
1487 | return 0; | ||
1488 | } | 1571 | } |
1489 | 1572 | ||
1490 | /** | 1573 | /** |
@@ -1496,12 +1579,7 @@ static inline int ipr_is_af_dasd_device(struct ipr_resource_entry *res) | |||
1496 | **/ | 1579 | **/ |
1497 | static inline int ipr_is_vset_device(struct ipr_resource_entry *res) | 1580 | static inline int ipr_is_vset_device(struct ipr_resource_entry *res) |
1498 | { | 1581 | { |
1499 | if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) && | 1582 | return res->type == IPR_RES_TYPE_VOLUME_SET; |
1500 | !ipr_is_ioa_resource(res) && | ||
1501 | IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_VOLUME_SET) | ||
1502 | return 1; | ||
1503 | else | ||
1504 | return 0; | ||
1505 | } | 1583 | } |
1506 | 1584 | ||
1507 | /** | 1585 | /** |
@@ -1513,11 +1591,7 @@ static inline int ipr_is_vset_device(struct ipr_resource_entry *res) | |||
1513 | **/ | 1591 | **/ |
1514 | static inline int ipr_is_gscsi(struct ipr_resource_entry *res) | 1592 | static inline int ipr_is_gscsi(struct ipr_resource_entry *res) |
1515 | { | 1593 | { |
1516 | if (!ipr_is_ioa_resource(res) && | 1594 | return res->type == IPR_RES_TYPE_GENERIC_SCSI; |
1517 | IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_SCSI) | ||
1518 | return 1; | ||
1519 | else | ||
1520 | return 0; | ||
1521 | } | 1595 | } |
1522 | 1596 | ||
1523 | /** | 1597 | /** |
@@ -1530,7 +1604,7 @@ static inline int ipr_is_gscsi(struct ipr_resource_entry *res) | |||
1530 | static inline int ipr_is_scsi_disk(struct ipr_resource_entry *res) | 1604 | static inline int ipr_is_scsi_disk(struct ipr_resource_entry *res) |
1531 | { | 1605 | { |
1532 | if (ipr_is_af_dasd_device(res) || | 1606 | if (ipr_is_af_dasd_device(res) || |
1533 | (ipr_is_gscsi(res) && IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data))) | 1607 | (ipr_is_gscsi(res) && IPR_IS_DASD_DEVICE(res->std_inq_data))) |
1534 | return 1; | 1608 | return 1; |
1535 | else | 1609 | else |
1536 | return 0; | 1610 | return 0; |
@@ -1545,11 +1619,7 @@ static inline int ipr_is_scsi_disk(struct ipr_resource_entry *res) | |||
1545 | **/ | 1619 | **/ |
1546 | static inline int ipr_is_gata(struct ipr_resource_entry *res) | 1620 | static inline int ipr_is_gata(struct ipr_resource_entry *res) |
1547 | { | 1621 | { |
1548 | if (!ipr_is_ioa_resource(res) && | 1622 | return res->type == IPR_RES_TYPE_GENERIC_ATA; |
1549 | IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_ATA) | ||
1550 | return 1; | ||
1551 | else | ||
1552 | return 0; | ||
1553 | } | 1623 | } |
1554 | 1624 | ||
1555 | /** | 1625 | /** |
@@ -1561,7 +1631,7 @@ static inline int ipr_is_gata(struct ipr_resource_entry *res) | |||
1561 | **/ | 1631 | **/ |
1562 | static inline int ipr_is_naca_model(struct ipr_resource_entry *res) | 1632 | static inline int ipr_is_naca_model(struct ipr_resource_entry *res) |
1563 | { | 1633 | { |
1564 | if (ipr_is_gscsi(res) && IPR_QUEUEING_MODEL(res) == IPR_QUEUE_NACA_MODEL) | 1634 | if (ipr_is_gscsi(res) && res->qmodel == IPR_QUEUE_NACA_MODEL) |
1565 | return 1; | 1635 | return 1; |
1566 | return 0; | 1636 | return 0; |
1567 | } | 1637 | } |