[SCSI] ipr: define new offsets to registers for the next generation chip

This patch adds the entry to the ipr_chip_cfg array that defines the register
offsets for the next generation 64 bit IOA PCI interface chip.

Signed-off-by: Wayne Boyer <wayneb@linux.vnet.ibm.com>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>

1 files changed, 15 insertions, 0 deletions

diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index 359882eadc26..e6bab3fb6945 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -128,6 +128,21 @@ static const struct ipr_chip_cfg_t ipr_chip_cfg[] = {
                         .clr_uproc_interrupt_reg = 0x00294
                 }
         },
+        { /* CRoC */
+                .mailbox = 0x00040,
+                .cache_line_size = 0x20,
+                {
+                        .set_interrupt_mask_reg = 0x00010,
+                        .clr_interrupt_mask_reg = 0x00018,
+                        .sense_interrupt_mask_reg = 0x00010,
+                        .clr_interrupt_reg = 0x00008,
+                        .sense_interrupt_reg = 0x00000,
+                        .ioarrin_reg = 0x00070,
+                        .sense_uproc_interrupt_reg = 0x00020,
+                        .set_uproc_interrupt_reg = 0x00020,
+                        .clr_uproc_interrupt_reg = 0x00028
+                }
+        },
 };
 
 static const struct ipr_chip_t ipr_chip[] = {