diff options
author | Matt Gates <matthew.gates@hp.com> | 2014-02-18 14:55:17 -0500 |
---|---|---|
committer | James Bottomley <JBottomley@Parallels.com> | 2014-03-15 13:19:02 -0400 |
commit | e1f7de0cdd68d246d7008241cd9e443a54f880a8 (patch) | |
tree | 060525e7cdc5f2f86f9fcf4bb5ee3a22861c9e8f /drivers/scsi/hpsa_cmd.h | |
parent | e1d9cbfa09cdd39c4821777a6980dd643e5493ad (diff) |
[SCSI] hpsa: add support for 'fastpath' i/o
For certain i/o's to certain devices (unmasked physical disks) we
can bypass the RAID stack firmware and do the i/o to the device
directly and it will be faster.
Signed-off-by: Matt Gates <matthew.gates@hp.com>
Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi/hpsa_cmd.h')
-rw-r--r-- | drivers/scsi/hpsa_cmd.h | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/drivers/scsi/hpsa_cmd.h b/drivers/scsi/hpsa_cmd.h index 22cf799a2a1d..e682d2e6b387 100644 --- a/drivers/scsi/hpsa_cmd.h +++ b/drivers/scsi/hpsa_cmd.h | |||
@@ -129,6 +129,7 @@ | |||
129 | 129 | ||
130 | #define CFGTBL_Trans_Simple 0x00000002l | 130 | #define CFGTBL_Trans_Simple 0x00000002l |
131 | #define CFGTBL_Trans_Performant 0x00000004l | 131 | #define CFGTBL_Trans_Performant 0x00000004l |
132 | #define CFGTBL_Trans_io_accel1 0x00000080l | ||
132 | #define CFGTBL_Trans_use_short_tags 0x20000000l | 133 | #define CFGTBL_Trans_use_short_tags 0x20000000l |
133 | #define CFGTBL_Trans_enable_directed_msix (1 << 30) | 134 | #define CFGTBL_Trans_enable_directed_msix (1 << 30) |
134 | 135 | ||
@@ -285,6 +286,7 @@ struct ErrorInfo { | |||
285 | /* Command types */ | 286 | /* Command types */ |
286 | #define CMD_IOCTL_PEND 0x01 | 287 | #define CMD_IOCTL_PEND 0x01 |
287 | #define CMD_SCSI 0x03 | 288 | #define CMD_SCSI 0x03 |
289 | #define CMD_IOACCEL1 0x04 | ||
288 | 290 | ||
289 | #define DIRECT_LOOKUP_SHIFT 5 | 291 | #define DIRECT_LOOKUP_SHIFT 5 |
290 | #define DIRECT_LOOKUP_BIT 0x10 | 292 | #define DIRECT_LOOKUP_BIT 0x10 |
@@ -335,6 +337,63 @@ struct CommandList { | |||
335 | u8 pad[COMMANDLIST_PAD]; | 337 | u8 pad[COMMANDLIST_PAD]; |
336 | }; | 338 | }; |
337 | 339 | ||
340 | /* Max S/G elements in I/O accelerator command */ | ||
341 | #define IOACCEL1_MAXSGENTRIES 24 | ||
342 | |||
343 | /* | ||
344 | * Structure for I/O accelerator (mode 1) commands. | ||
345 | * Note that this structure must be 128-byte aligned in size. | ||
346 | */ | ||
347 | struct io_accel1_cmd { | ||
348 | u16 dev_handle; /* 0x00 - 0x01 */ | ||
349 | u8 reserved1; /* 0x02 */ | ||
350 | u8 function; /* 0x03 */ | ||
351 | u8 reserved2[8]; /* 0x04 - 0x0B */ | ||
352 | u32 err_info; /* 0x0C - 0x0F */ | ||
353 | u8 reserved3[2]; /* 0x10 - 0x11 */ | ||
354 | u8 err_info_len; /* 0x12 */ | ||
355 | u8 reserved4; /* 0x13 */ | ||
356 | u8 sgl_offset; /* 0x14 */ | ||
357 | u8 reserved5[7]; /* 0x15 - 0x1B */ | ||
358 | u32 transfer_len; /* 0x1C - 0x1F */ | ||
359 | u8 reserved6[4]; /* 0x20 - 0x23 */ | ||
360 | u16 io_flags; /* 0x24 - 0x25 */ | ||
361 | u8 reserved7[14]; /* 0x26 - 0x33 */ | ||
362 | u8 LUN[8]; /* 0x34 - 0x3B */ | ||
363 | u32 control; /* 0x3C - 0x3F */ | ||
364 | u8 CDB[16]; /* 0x40 - 0x4F */ | ||
365 | u8 reserved8[16]; /* 0x50 - 0x5F */ | ||
366 | u16 host_context_flags; /* 0x60 - 0x61 */ | ||
367 | u16 timeout_sec; /* 0x62 - 0x63 */ | ||
368 | u8 ReplyQueue; /* 0x64 */ | ||
369 | u8 reserved9[3]; /* 0x65 - 0x67 */ | ||
370 | struct vals32 Tag; /* 0x68 - 0x6F */ | ||
371 | struct vals32 host_addr; /* 0x70 - 0x77 */ | ||
372 | u8 CISS_LUN[8]; /* 0x78 - 0x7F */ | ||
373 | struct SGDescriptor SG[IOACCEL1_MAXSGENTRIES]; | ||
374 | }; | ||
375 | |||
376 | #define IOACCEL1_FUNCTION_SCSIIO 0x00 | ||
377 | #define IOACCEL1_SGLOFFSET 32 | ||
378 | |||
379 | #define IOACCEL1_IOFLAGS_IO_REQ 0x4000 | ||
380 | #define IOACCEL1_IOFLAGS_CDBLEN_MASK 0x001F | ||
381 | #define IOACCEL1_IOFLAGS_CDBLEN_MAX 16 | ||
382 | |||
383 | #define IOACCEL1_CONTROL_NODATAXFER 0x00000000 | ||
384 | #define IOACCEL1_CONTROL_DATA_OUT 0x01000000 | ||
385 | #define IOACCEL1_CONTROL_DATA_IN 0x02000000 | ||
386 | #define IOACCEL1_CONTROL_TASKPRIO_MASK 0x00007800 | ||
387 | #define IOACCEL1_CONTROL_TASKPRIO_SHIFT 11 | ||
388 | #define IOACCEL1_CONTROL_SIMPLEQUEUE 0x00000000 | ||
389 | #define IOACCEL1_CONTROL_HEADOFQUEUE 0x00000100 | ||
390 | #define IOACCEL1_CONTROL_ORDEREDQUEUE 0x00000200 | ||
391 | #define IOACCEL1_CONTROL_ACA 0x00000400 | ||
392 | |||
393 | #define IOACCEL1_HCFLAGS_CISS_FORMAT 0x0013 | ||
394 | |||
395 | #define IOACCEL1_BUSADDR_CMDTYPE 0x00000060 | ||
396 | |||
338 | /* Configuration Table Structure */ | 397 | /* Configuration Table Structure */ |
339 | struct HostWrite { | 398 | struct HostWrite { |
340 | u32 TransportRequest; | 399 | u32 TransportRequest; |
@@ -346,6 +405,7 @@ struct HostWrite { | |||
346 | #define SIMPLE_MODE 0x02 | 405 | #define SIMPLE_MODE 0x02 |
347 | #define PERFORMANT_MODE 0x04 | 406 | #define PERFORMANT_MODE 0x04 |
348 | #define MEMQ_MODE 0x08 | 407 | #define MEMQ_MODE 0x08 |
408 | #define IOACCEL_MODE_1 0x80 | ||
349 | 409 | ||
350 | struct CfgTable { | 410 | struct CfgTable { |
351 | u8 Signature[4]; | 411 | u8 Signature[4]; |