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authorStephen M. Cameron <scameron@beardog.cce.hp.com>2011-05-03 15:58:55 -0400
committerJames Bottomley <jbottomley@parallels.com>2011-05-17 03:02:56 -0400
commit8cd21da71c952843f9cc215436286cf7f991cc6e (patch)
treef0afc1a52a9d5742bd8d0988408ba7cb0726e554 /drivers/scsi/hpsa.h
parentd0be5ec8693944c2e2fc0de70fda9dbc1b93bd7d (diff)
[SCSI] hpsa: add readl after writel in interrupt mask setting code
This is to ensure the board interrupts are really off when these functions return. Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com> Signed-off-by: James Bottomley <jbottomley@parallels.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'drivers/scsi/hpsa.h')
-rw-r--r--drivers/scsi/hpsa.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/scsi/hpsa.h b/drivers/scsi/hpsa.h
index 98c97ca21223..7eec39716dc7 100644
--- a/drivers/scsi/hpsa.h
+++ b/drivers/scsi/hpsa.h
@@ -228,10 +228,12 @@ static void SA5_intr_mask(struct ctlr_info *h, unsigned long val)
228 if (val) { /* Turn interrupts on */ 228 if (val) { /* Turn interrupts on */
229 h->interrupts_enabled = 1; 229 h->interrupts_enabled = 1;
230 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 230 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
231 (void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
231 } else { /* Turn them off */ 232 } else { /* Turn them off */
232 h->interrupts_enabled = 0; 233 h->interrupts_enabled = 0;
233 writel(SA5_INTR_OFF, 234 writel(SA5_INTR_OFF,
234 h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 235 h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
236 (void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
235 } 237 }
236} 238}
237 239
@@ -240,10 +242,12 @@ static void SA5_performant_intr_mask(struct ctlr_info *h, unsigned long val)
240 if (val) { /* turn on interrupts */ 242 if (val) { /* turn on interrupts */
241 h->interrupts_enabled = 1; 243 h->interrupts_enabled = 1;
242 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 244 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
245 (void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
243 } else { 246 } else {
244 h->interrupts_enabled = 0; 247 h->interrupts_enabled = 0;
245 writel(SA5_PERF_INTR_OFF, 248 writel(SA5_PERF_INTR_OFF,
246 h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 249 h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
250 (void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
247 } 251 }
248} 252}
249 253