diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/scsi/dtc.h |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'drivers/scsi/dtc.h')
-rw-r--r-- | drivers/scsi/dtc.h | 99 |
1 files changed, 99 insertions, 0 deletions
diff --git a/drivers/scsi/dtc.h b/drivers/scsi/dtc.h new file mode 100644 index 000000000000..c4bcdbf338a2 --- /dev/null +++ b/drivers/scsi/dtc.h | |||
@@ -0,0 +1,99 @@ | |||
1 | /* | ||
2 | * DTC controller, taken from T128 driver by... | ||
3 | * Copyright 1993, Drew Eckhardt | ||
4 | * Visionary Computing | ||
5 | * (Unix and Linux consulting and custom programming) | ||
6 | * drew@colorado.edu | ||
7 | * +1 (303) 440-4894 | ||
8 | * | ||
9 | * DISTRIBUTION RELEASE 2. | ||
10 | * | ||
11 | * For more information, please consult | ||
12 | * | ||
13 | * | ||
14 | * | ||
15 | * and | ||
16 | * | ||
17 | * NCR 5380 Family | ||
18 | * SCSI Protocol Controller | ||
19 | * Databook | ||
20 | * | ||
21 | * NCR Microelectronics | ||
22 | * 1635 Aeroplaza Drive | ||
23 | * Colorado Springs, CO 80916 | ||
24 | * 1+ (719) 578-3400 | ||
25 | * 1+ (800) 334-5454 | ||
26 | */ | ||
27 | |||
28 | #ifndef DTC3280_H | ||
29 | #define DTC3280_H | ||
30 | |||
31 | static int dtc_abort(Scsi_Cmnd *); | ||
32 | static int dtc_biosparam(struct scsi_device *, struct block_device *, | ||
33 | sector_t, int*); | ||
34 | static int dtc_detect(Scsi_Host_Template *); | ||
35 | static int dtc_queue_command(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *)); | ||
36 | static int dtc_bus_reset(Scsi_Cmnd *); | ||
37 | static int dtc_device_reset(Scsi_Cmnd *); | ||
38 | static int dtc_host_reset(Scsi_Cmnd *); | ||
39 | |||
40 | #ifndef CMD_PER_LUN | ||
41 | #define CMD_PER_LUN 2 | ||
42 | #endif | ||
43 | |||
44 | #ifndef CAN_QUEUE | ||
45 | #define CAN_QUEUE 32 | ||
46 | #endif | ||
47 | |||
48 | #define NCR5380_implementation_fields \ | ||
49 | void __iomem *base | ||
50 | |||
51 | #define NCR5380_local_declare() \ | ||
52 | void __iomem *base | ||
53 | |||
54 | #define NCR5380_setup(instance) \ | ||
55 | base = ((struct NCR5380_hostdata *)(instance)->hostdata)->base | ||
56 | |||
57 | #define DTC_address(reg) (base + DTC_5380_OFFSET + reg) | ||
58 | |||
59 | #define dbNCR5380_read(reg) \ | ||
60 | (rval=readb(DTC_address(reg)), \ | ||
61 | (((unsigned char) printk("DTC : read register %d at addr %p is: %02x\n"\ | ||
62 | , (reg), DTC_address(reg), rval)), rval ) ) | ||
63 | |||
64 | #define dbNCR5380_write(reg, value) do { \ | ||
65 | printk("DTC : write %02x to register %d at address %p\n", \ | ||
66 | (value), (reg), DTC_address(reg)); \ | ||
67 | writeb(value, DTC_address(reg));} while(0) | ||
68 | |||
69 | |||
70 | #if !(DTCDEBUG & DTCDEBUG_TRANSFER) | ||
71 | #define NCR5380_read(reg) (readb(DTC_address(reg))) | ||
72 | #define NCR5380_write(reg, value) (writeb(value, DTC_address(reg))) | ||
73 | #else | ||
74 | #define NCR5380_read(reg) (readb(DTC_address(reg))) | ||
75 | #define xNCR5380_read(reg) \ | ||
76 | (((unsigned char) printk("DTC : read register %d at address %p\n"\ | ||
77 | , (reg), DTC_address(reg))), readb(DTC_address(reg))) | ||
78 | |||
79 | #define NCR5380_write(reg, value) do { \ | ||
80 | printk("DTC : write %02x to register %d at address %p\n", \ | ||
81 | (value), (reg), DTC_address(reg)); \ | ||
82 | writeb(value, DTC_address(reg));} while(0) | ||
83 | #endif | ||
84 | |||
85 | #define NCR5380_intr dtc_intr | ||
86 | #define NCR5380_queue_command dtc_queue_command | ||
87 | #define NCR5380_abort dtc_abort | ||
88 | #define NCR5380_bus_reset dtc_bus_reset | ||
89 | #define NCR5380_device_reset dtc_device_reset | ||
90 | #define NCR5380_host_reset dtc_host_reset | ||
91 | #define NCR5380_proc_info dtc_proc_info | ||
92 | |||
93 | /* 15 12 11 10 | ||
94 | 1001 1100 0000 0000 */ | ||
95 | |||
96 | #define DTC_IRQS 0x9c00 | ||
97 | |||
98 | |||
99 | #endif /* DTC3280_H */ | ||