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authorMichael Chan <mchan@broadcom.com>2014-03-17 23:19:07 -0400
committerDavid S. Miller <davem@davemloft.net>2014-03-18 16:02:16 -0400
commitbe1fefc21433f6202fcd76bdc7916e557fe80b9a (patch)
tree48f0fcfefc21f1be95c27673435c8c5cf2a5e15c /drivers/scsi/bnx2i
parentf7bd12d09ed6e4093a56dbbfbe8411cc52a738d1 (diff)
cnic,bnx2i,bnx2fc: Fix inconsistent use of page size
The bnx2/bnx2x rings are made up of linked pages. However there is an upper limit on the page size as some the page size settings are 16-bit in the hardware/firmware interface. In the current code, some parts use BNX2_PAGE_SIZE which has a 16K upper limit and some parts use PAGE_SIZE. On archs with >= 64K PAGE_SIZE, it generates some compile warnings. Define a new CNIC_PAGE_SZIE which has an upper limit of 16K and use it consistently in all relevant parts. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: Eddie Wai <eddie.wai@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/scsi/bnx2i')
-rw-r--r--drivers/scsi/bnx2i/bnx2i_hwi.c52
-rw-r--r--drivers/scsi/bnx2i/bnx2i_iscsi.c23
2 files changed, 38 insertions, 37 deletions
diff --git a/drivers/scsi/bnx2i/bnx2i_hwi.c b/drivers/scsi/bnx2i/bnx2i_hwi.c
index e4cf23df4b4f..b87a1933f880 100644
--- a/drivers/scsi/bnx2i/bnx2i_hwi.c
+++ b/drivers/scsi/bnx2i/bnx2i_hwi.c
@@ -61,7 +61,7 @@ static void bnx2i_adjust_qp_size(struct bnx2i_hba *hba)
61 * yield integral num of page buffers 61 * yield integral num of page buffers
62 */ 62 */
63 /* adjust SQ */ 63 /* adjust SQ */
64 num_elements_per_pg = PAGE_SIZE / BNX2I_SQ_WQE_SIZE; 64 num_elements_per_pg = CNIC_PAGE_SIZE / BNX2I_SQ_WQE_SIZE;
65 if (hba->max_sqes < num_elements_per_pg) 65 if (hba->max_sqes < num_elements_per_pg)
66 hba->max_sqes = num_elements_per_pg; 66 hba->max_sqes = num_elements_per_pg;
67 else if (hba->max_sqes % num_elements_per_pg) 67 else if (hba->max_sqes % num_elements_per_pg)
@@ -69,7 +69,7 @@ static void bnx2i_adjust_qp_size(struct bnx2i_hba *hba)
69 ~(num_elements_per_pg - 1); 69 ~(num_elements_per_pg - 1);
70 70
71 /* adjust CQ */ 71 /* adjust CQ */
72 num_elements_per_pg = PAGE_SIZE / BNX2I_CQE_SIZE; 72 num_elements_per_pg = CNIC_PAGE_SIZE / BNX2I_CQE_SIZE;
73 if (hba->max_cqes < num_elements_per_pg) 73 if (hba->max_cqes < num_elements_per_pg)
74 hba->max_cqes = num_elements_per_pg; 74 hba->max_cqes = num_elements_per_pg;
75 else if (hba->max_cqes % num_elements_per_pg) 75 else if (hba->max_cqes % num_elements_per_pg)
@@ -77,7 +77,7 @@ static void bnx2i_adjust_qp_size(struct bnx2i_hba *hba)
77 ~(num_elements_per_pg - 1); 77 ~(num_elements_per_pg - 1);
78 78
79 /* adjust RQ */ 79 /* adjust RQ */
80 num_elements_per_pg = PAGE_SIZE / BNX2I_RQ_WQE_SIZE; 80 num_elements_per_pg = CNIC_PAGE_SIZE / BNX2I_RQ_WQE_SIZE;
81 if (hba->max_rqes < num_elements_per_pg) 81 if (hba->max_rqes < num_elements_per_pg)
82 hba->max_rqes = num_elements_per_pg; 82 hba->max_rqes = num_elements_per_pg;
83 else if (hba->max_rqes % num_elements_per_pg) 83 else if (hba->max_rqes % num_elements_per_pg)
@@ -959,7 +959,7 @@ static void setup_qp_page_tables(struct bnx2i_endpoint *ep)
959 959
960 /* SQ page table */ 960 /* SQ page table */
961 memset(ep->qp.sq_pgtbl_virt, 0, ep->qp.sq_pgtbl_size); 961 memset(ep->qp.sq_pgtbl_virt, 0, ep->qp.sq_pgtbl_size);
962 num_pages = ep->qp.sq_mem_size / PAGE_SIZE; 962 num_pages = ep->qp.sq_mem_size / CNIC_PAGE_SIZE;
963 page = ep->qp.sq_phys; 963 page = ep->qp.sq_phys;
964 964
965 if (cnic_dev_10g) 965 if (cnic_dev_10g)
@@ -973,7 +973,7 @@ static void setup_qp_page_tables(struct bnx2i_endpoint *ep)
973 ptbl++; 973 ptbl++;
974 *ptbl = (u32) ((u64) page >> 32); 974 *ptbl = (u32) ((u64) page >> 32);
975 ptbl++; 975 ptbl++;
976 page += PAGE_SIZE; 976 page += CNIC_PAGE_SIZE;
977 } else { 977 } else {
978 /* PTE is written in big endian format for 978 /* PTE is written in big endian format for
979 * 5706/5708/5709 devices */ 979 * 5706/5708/5709 devices */
@@ -981,13 +981,13 @@ static void setup_qp_page_tables(struct bnx2i_endpoint *ep)
981 ptbl++; 981 ptbl++;
982 *ptbl = (u32) page; 982 *ptbl = (u32) page;
983 ptbl++; 983 ptbl++;
984 page += PAGE_SIZE; 984 page += CNIC_PAGE_SIZE;
985 } 985 }
986 } 986 }
987 987
988 /* RQ page table */ 988 /* RQ page table */
989 memset(ep->qp.rq_pgtbl_virt, 0, ep->qp.rq_pgtbl_size); 989 memset(ep->qp.rq_pgtbl_virt, 0, ep->qp.rq_pgtbl_size);
990 num_pages = ep->qp.rq_mem_size / PAGE_SIZE; 990 num_pages = ep->qp.rq_mem_size / CNIC_PAGE_SIZE;
991 page = ep->qp.rq_phys; 991 page = ep->qp.rq_phys;
992 992
993 if (cnic_dev_10g) 993 if (cnic_dev_10g)
@@ -1001,7 +1001,7 @@ static void setup_qp_page_tables(struct bnx2i_endpoint *ep)
1001 ptbl++; 1001 ptbl++;
1002 *ptbl = (u32) ((u64) page >> 32); 1002 *ptbl = (u32) ((u64) page >> 32);
1003 ptbl++; 1003 ptbl++;
1004 page += PAGE_SIZE; 1004 page += CNIC_PAGE_SIZE;
1005 } else { 1005 } else {
1006 /* PTE is written in big endian format for 1006 /* PTE is written in big endian format for
1007 * 5706/5708/5709 devices */ 1007 * 5706/5708/5709 devices */
@@ -1009,13 +1009,13 @@ static void setup_qp_page_tables(struct bnx2i_endpoint *ep)
1009 ptbl++; 1009 ptbl++;
1010 *ptbl = (u32) page; 1010 *ptbl = (u32) page;
1011 ptbl++; 1011 ptbl++;
1012 page += PAGE_SIZE; 1012 page += CNIC_PAGE_SIZE;
1013 } 1013 }
1014 } 1014 }
1015 1015
1016 /* CQ page table */ 1016 /* CQ page table */
1017 memset(ep->qp.cq_pgtbl_virt, 0, ep->qp.cq_pgtbl_size); 1017 memset(ep->qp.cq_pgtbl_virt, 0, ep->qp.cq_pgtbl_size);
1018 num_pages = ep->qp.cq_mem_size / PAGE_SIZE; 1018 num_pages = ep->qp.cq_mem_size / CNIC_PAGE_SIZE;
1019 page = ep->qp.cq_phys; 1019 page = ep->qp.cq_phys;
1020 1020
1021 if (cnic_dev_10g) 1021 if (cnic_dev_10g)
@@ -1029,7 +1029,7 @@ static void setup_qp_page_tables(struct bnx2i_endpoint *ep)
1029 ptbl++; 1029 ptbl++;
1030 *ptbl = (u32) ((u64) page >> 32); 1030 *ptbl = (u32) ((u64) page >> 32);
1031 ptbl++; 1031 ptbl++;
1032 page += PAGE_SIZE; 1032 page += CNIC_PAGE_SIZE;
1033 } else { 1033 } else {
1034 /* PTE is written in big endian format for 1034 /* PTE is written in big endian format for
1035 * 5706/5708/5709 devices */ 1035 * 5706/5708/5709 devices */
@@ -1037,7 +1037,7 @@ static void setup_qp_page_tables(struct bnx2i_endpoint *ep)
1037 ptbl++; 1037 ptbl++;
1038 *ptbl = (u32) page; 1038 *ptbl = (u32) page;
1039 ptbl++; 1039 ptbl++;
1040 page += PAGE_SIZE; 1040 page += CNIC_PAGE_SIZE;
1041 } 1041 }
1042 } 1042 }
1043} 1043}
@@ -1064,11 +1064,11 @@ int bnx2i_alloc_qp_resc(struct bnx2i_hba *hba, struct bnx2i_endpoint *ep)
1064 /* Allocate page table memory for SQ which is page aligned */ 1064 /* Allocate page table memory for SQ which is page aligned */
1065 ep->qp.sq_mem_size = hba->max_sqes * BNX2I_SQ_WQE_SIZE; 1065 ep->qp.sq_mem_size = hba->max_sqes * BNX2I_SQ_WQE_SIZE;
1066 ep->qp.sq_mem_size = 1066 ep->qp.sq_mem_size =
1067 (ep->qp.sq_mem_size + (PAGE_SIZE - 1)) & PAGE_MASK; 1067 (ep->qp.sq_mem_size + (CNIC_PAGE_SIZE - 1)) & CNIC_PAGE_MASK;
1068 ep->qp.sq_pgtbl_size = 1068 ep->qp.sq_pgtbl_size =
1069 (ep->qp.sq_mem_size / PAGE_SIZE) * sizeof(void *); 1069 (ep->qp.sq_mem_size / CNIC_PAGE_SIZE) * sizeof(void *);
1070 ep->qp.sq_pgtbl_size = 1070 ep->qp.sq_pgtbl_size =
1071 (ep->qp.sq_pgtbl_size + (PAGE_SIZE - 1)) & PAGE_MASK; 1071 (ep->qp.sq_pgtbl_size + (CNIC_PAGE_SIZE - 1)) & CNIC_PAGE_MASK;
1072 1072
1073 ep->qp.sq_pgtbl_virt = 1073 ep->qp.sq_pgtbl_virt =
1074 dma_alloc_coherent(&hba->pcidev->dev, ep->qp.sq_pgtbl_size, 1074 dma_alloc_coherent(&hba->pcidev->dev, ep->qp.sq_pgtbl_size,
@@ -1101,11 +1101,11 @@ int bnx2i_alloc_qp_resc(struct bnx2i_hba *hba, struct bnx2i_endpoint *ep)
1101 /* Allocate page table memory for CQ which is page aligned */ 1101 /* Allocate page table memory for CQ which is page aligned */
1102 ep->qp.cq_mem_size = hba->max_cqes * BNX2I_CQE_SIZE; 1102 ep->qp.cq_mem_size = hba->max_cqes * BNX2I_CQE_SIZE;
1103 ep->qp.cq_mem_size = 1103 ep->qp.cq_mem_size =
1104 (ep->qp.cq_mem_size + (PAGE_SIZE - 1)) & PAGE_MASK; 1104 (ep->qp.cq_mem_size + (CNIC_PAGE_SIZE - 1)) & CNIC_PAGE_MASK;
1105 ep->qp.cq_pgtbl_size = 1105 ep->qp.cq_pgtbl_size =
1106 (ep->qp.cq_mem_size / PAGE_SIZE) * sizeof(void *); 1106 (ep->qp.cq_mem_size / CNIC_PAGE_SIZE) * sizeof(void *);
1107 ep->qp.cq_pgtbl_size = 1107 ep->qp.cq_pgtbl_size =
1108 (ep->qp.cq_pgtbl_size + (PAGE_SIZE - 1)) & PAGE_MASK; 1108 (ep->qp.cq_pgtbl_size + (CNIC_PAGE_SIZE - 1)) & CNIC_PAGE_MASK;
1109 1109
1110 ep->qp.cq_pgtbl_virt = 1110 ep->qp.cq_pgtbl_virt =
1111 dma_alloc_coherent(&hba->pcidev->dev, ep->qp.cq_pgtbl_size, 1111 dma_alloc_coherent(&hba->pcidev->dev, ep->qp.cq_pgtbl_size,
@@ -1144,11 +1144,11 @@ int bnx2i_alloc_qp_resc(struct bnx2i_hba *hba, struct bnx2i_endpoint *ep)
1144 /* Allocate page table memory for RQ which is page aligned */ 1144 /* Allocate page table memory for RQ which is page aligned */
1145 ep->qp.rq_mem_size = hba->max_rqes * BNX2I_RQ_WQE_SIZE; 1145 ep->qp.rq_mem_size = hba->max_rqes * BNX2I_RQ_WQE_SIZE;
1146 ep->qp.rq_mem_size = 1146 ep->qp.rq_mem_size =
1147 (ep->qp.rq_mem_size + (PAGE_SIZE - 1)) & PAGE_MASK; 1147 (ep->qp.rq_mem_size + (CNIC_PAGE_SIZE - 1)) & CNIC_PAGE_MASK;
1148 ep->qp.rq_pgtbl_size = 1148 ep->qp.rq_pgtbl_size =
1149 (ep->qp.rq_mem_size / PAGE_SIZE) * sizeof(void *); 1149 (ep->qp.rq_mem_size / CNIC_PAGE_SIZE) * sizeof(void *);
1150 ep->qp.rq_pgtbl_size = 1150 ep->qp.rq_pgtbl_size =
1151 (ep->qp.rq_pgtbl_size + (PAGE_SIZE - 1)) & PAGE_MASK; 1151 (ep->qp.rq_pgtbl_size + (CNIC_PAGE_SIZE - 1)) & CNIC_PAGE_MASK;
1152 1152
1153 ep->qp.rq_pgtbl_virt = 1153 ep->qp.rq_pgtbl_virt =
1154 dma_alloc_coherent(&hba->pcidev->dev, ep->qp.rq_pgtbl_size, 1154 dma_alloc_coherent(&hba->pcidev->dev, ep->qp.rq_pgtbl_size,
@@ -1270,7 +1270,7 @@ int bnx2i_send_fw_iscsi_init_msg(struct bnx2i_hba *hba)
1270 bnx2i_adjust_qp_size(hba); 1270 bnx2i_adjust_qp_size(hba);
1271 1271
1272 iscsi_init.flags = 1272 iscsi_init.flags =
1273 ISCSI_PAGE_SIZE_4K << ISCSI_KWQE_INIT1_PAGE_SIZE_SHIFT; 1273 (CNIC_PAGE_BITS - 8) << ISCSI_KWQE_INIT1_PAGE_SIZE_SHIFT;
1274 if (en_tcp_dack) 1274 if (en_tcp_dack)
1275 iscsi_init.flags |= ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE; 1275 iscsi_init.flags |= ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE;
1276 iscsi_init.reserved0 = 0; 1276 iscsi_init.reserved0 = 0;
@@ -1288,15 +1288,15 @@ int bnx2i_send_fw_iscsi_init_msg(struct bnx2i_hba *hba)
1288 ((hba->num_ccell & 0xFFFF) | (hba->max_sqes << 16)); 1288 ((hba->num_ccell & 0xFFFF) | (hba->max_sqes << 16));
1289 iscsi_init.num_ccells_per_conn = hba->num_ccell; 1289 iscsi_init.num_ccells_per_conn = hba->num_ccell;
1290 iscsi_init.num_tasks_per_conn = hba->max_sqes; 1290 iscsi_init.num_tasks_per_conn = hba->max_sqes;
1291 iscsi_init.sq_wqes_per_page = PAGE_SIZE / BNX2I_SQ_WQE_SIZE; 1291 iscsi_init.sq_wqes_per_page = CNIC_PAGE_SIZE / BNX2I_SQ_WQE_SIZE;
1292 iscsi_init.sq_num_wqes = hba->max_sqes; 1292 iscsi_init.sq_num_wqes = hba->max_sqes;
1293 iscsi_init.cq_log_wqes_per_page = 1293 iscsi_init.cq_log_wqes_per_page =
1294 (u8) bnx2i_power_of2(PAGE_SIZE / BNX2I_CQE_SIZE); 1294 (u8) bnx2i_power_of2(CNIC_PAGE_SIZE / BNX2I_CQE_SIZE);
1295 iscsi_init.cq_num_wqes = hba->max_cqes; 1295 iscsi_init.cq_num_wqes = hba->max_cqes;
1296 iscsi_init.cq_num_pages = (hba->max_cqes * BNX2I_CQE_SIZE + 1296 iscsi_init.cq_num_pages = (hba->max_cqes * BNX2I_CQE_SIZE +
1297 (PAGE_SIZE - 1)) / PAGE_SIZE; 1297 (CNIC_PAGE_SIZE - 1)) / CNIC_PAGE_SIZE;
1298 iscsi_init.sq_num_pages = (hba->max_sqes * BNX2I_SQ_WQE_SIZE + 1298 iscsi_init.sq_num_pages = (hba->max_sqes * BNX2I_SQ_WQE_SIZE +
1299 (PAGE_SIZE - 1)) / PAGE_SIZE; 1299 (CNIC_PAGE_SIZE - 1)) / CNIC_PAGE_SIZE;
1300 iscsi_init.rq_buffer_size = BNX2I_RQ_WQE_SIZE; 1300 iscsi_init.rq_buffer_size = BNX2I_RQ_WQE_SIZE;
1301 iscsi_init.rq_num_wqes = hba->max_rqes; 1301 iscsi_init.rq_num_wqes = hba->max_rqes;
1302 1302
diff --git a/drivers/scsi/bnx2i/bnx2i_iscsi.c b/drivers/scsi/bnx2i/bnx2i_iscsi.c
index 854dad7d5b03..c8b0aff5bbd4 100644
--- a/drivers/scsi/bnx2i/bnx2i_iscsi.c
+++ b/drivers/scsi/bnx2i/bnx2i_iscsi.c
@@ -525,7 +525,7 @@ static int bnx2i_setup_mp_bdt(struct bnx2i_hba *hba)
525 struct iscsi_bd *mp_bdt; 525 struct iscsi_bd *mp_bdt;
526 u64 addr; 526 u64 addr;
527 527
528 hba->mp_bd_tbl = dma_alloc_coherent(&hba->pcidev->dev, PAGE_SIZE, 528 hba->mp_bd_tbl = dma_alloc_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE,
529 &hba->mp_bd_dma, GFP_KERNEL); 529 &hba->mp_bd_dma, GFP_KERNEL);
530 if (!hba->mp_bd_tbl) { 530 if (!hba->mp_bd_tbl) {
531 printk(KERN_ERR "unable to allocate Middle Path BDT\n"); 531 printk(KERN_ERR "unable to allocate Middle Path BDT\n");
@@ -533,11 +533,12 @@ static int bnx2i_setup_mp_bdt(struct bnx2i_hba *hba)
533 goto out; 533 goto out;
534 } 534 }
535 535
536 hba->dummy_buffer = dma_alloc_coherent(&hba->pcidev->dev, PAGE_SIZE, 536 hba->dummy_buffer = dma_alloc_coherent(&hba->pcidev->dev,
537 CNIC_PAGE_SIZE,
537 &hba->dummy_buf_dma, GFP_KERNEL); 538 &hba->dummy_buf_dma, GFP_KERNEL);
538 if (!hba->dummy_buffer) { 539 if (!hba->dummy_buffer) {
539 printk(KERN_ERR "unable to alloc Middle Path Dummy Buffer\n"); 540 printk(KERN_ERR "unable to alloc Middle Path Dummy Buffer\n");
540 dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE, 541 dma_free_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE,
541 hba->mp_bd_tbl, hba->mp_bd_dma); 542 hba->mp_bd_tbl, hba->mp_bd_dma);
542 hba->mp_bd_tbl = NULL; 543 hba->mp_bd_tbl = NULL;
543 rc = -1; 544 rc = -1;
@@ -548,7 +549,7 @@ static int bnx2i_setup_mp_bdt(struct bnx2i_hba *hba)
548 addr = (unsigned long) hba->dummy_buf_dma; 549 addr = (unsigned long) hba->dummy_buf_dma;
549 mp_bdt->buffer_addr_lo = addr & 0xffffffff; 550 mp_bdt->buffer_addr_lo = addr & 0xffffffff;
550 mp_bdt->buffer_addr_hi = addr >> 32; 551 mp_bdt->buffer_addr_hi = addr >> 32;
551 mp_bdt->buffer_length = PAGE_SIZE; 552 mp_bdt->buffer_length = CNIC_PAGE_SIZE;
552 mp_bdt->flags = ISCSI_BD_LAST_IN_BD_CHAIN | 553 mp_bdt->flags = ISCSI_BD_LAST_IN_BD_CHAIN |
553 ISCSI_BD_FIRST_IN_BD_CHAIN; 554 ISCSI_BD_FIRST_IN_BD_CHAIN;
554out: 555out:
@@ -565,12 +566,12 @@ out:
565static void bnx2i_free_mp_bdt(struct bnx2i_hba *hba) 566static void bnx2i_free_mp_bdt(struct bnx2i_hba *hba)
566{ 567{
567 if (hba->mp_bd_tbl) { 568 if (hba->mp_bd_tbl) {
568 dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE, 569 dma_free_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE,
569 hba->mp_bd_tbl, hba->mp_bd_dma); 570 hba->mp_bd_tbl, hba->mp_bd_dma);
570 hba->mp_bd_tbl = NULL; 571 hba->mp_bd_tbl = NULL;
571 } 572 }
572 if (hba->dummy_buffer) { 573 if (hba->dummy_buffer) {
573 dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE, 574 dma_free_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE,
574 hba->dummy_buffer, hba->dummy_buf_dma); 575 hba->dummy_buffer, hba->dummy_buf_dma);
575 hba->dummy_buffer = NULL; 576 hba->dummy_buffer = NULL;
576 } 577 }
@@ -934,14 +935,14 @@ static void bnx2i_conn_free_login_resources(struct bnx2i_hba *hba,
934 struct bnx2i_conn *bnx2i_conn) 935 struct bnx2i_conn *bnx2i_conn)
935{ 936{
936 if (bnx2i_conn->gen_pdu.resp_bd_tbl) { 937 if (bnx2i_conn->gen_pdu.resp_bd_tbl) {
937 dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE, 938 dma_free_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE,
938 bnx2i_conn->gen_pdu.resp_bd_tbl, 939 bnx2i_conn->gen_pdu.resp_bd_tbl,
939 bnx2i_conn->gen_pdu.resp_bd_dma); 940 bnx2i_conn->gen_pdu.resp_bd_dma);
940 bnx2i_conn->gen_pdu.resp_bd_tbl = NULL; 941 bnx2i_conn->gen_pdu.resp_bd_tbl = NULL;
941 } 942 }
942 943
943 if (bnx2i_conn->gen_pdu.req_bd_tbl) { 944 if (bnx2i_conn->gen_pdu.req_bd_tbl) {
944 dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE, 945 dma_free_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE,
945 bnx2i_conn->gen_pdu.req_bd_tbl, 946 bnx2i_conn->gen_pdu.req_bd_tbl,
946 bnx2i_conn->gen_pdu.req_bd_dma); 947 bnx2i_conn->gen_pdu.req_bd_dma);
947 bnx2i_conn->gen_pdu.req_bd_tbl = NULL; 948 bnx2i_conn->gen_pdu.req_bd_tbl = NULL;
@@ -998,13 +999,13 @@ static int bnx2i_conn_alloc_login_resources(struct bnx2i_hba *hba,
998 bnx2i_conn->gen_pdu.resp_wr_ptr = bnx2i_conn->gen_pdu.resp_buf; 999 bnx2i_conn->gen_pdu.resp_wr_ptr = bnx2i_conn->gen_pdu.resp_buf;
999 1000
1000 bnx2i_conn->gen_pdu.req_bd_tbl = 1001 bnx2i_conn->gen_pdu.req_bd_tbl =
1001 dma_alloc_coherent(&hba->pcidev->dev, PAGE_SIZE, 1002 dma_alloc_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE,
1002 &bnx2i_conn->gen_pdu.req_bd_dma, GFP_KERNEL); 1003 &bnx2i_conn->gen_pdu.req_bd_dma, GFP_KERNEL);
1003 if (bnx2i_conn->gen_pdu.req_bd_tbl == NULL) 1004 if (bnx2i_conn->gen_pdu.req_bd_tbl == NULL)
1004 goto login_req_bd_tbl_failure; 1005 goto login_req_bd_tbl_failure;
1005 1006
1006 bnx2i_conn->gen_pdu.resp_bd_tbl = 1007 bnx2i_conn->gen_pdu.resp_bd_tbl =
1007 dma_alloc_coherent(&hba->pcidev->dev, PAGE_SIZE, 1008 dma_alloc_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE,
1008 &bnx2i_conn->gen_pdu.resp_bd_dma, 1009 &bnx2i_conn->gen_pdu.resp_bd_dma,
1009 GFP_KERNEL); 1010 GFP_KERNEL);
1010 if (bnx2i_conn->gen_pdu.resp_bd_tbl == NULL) 1011 if (bnx2i_conn->gen_pdu.resp_bd_tbl == NULL)
@@ -1013,7 +1014,7 @@ static int bnx2i_conn_alloc_login_resources(struct bnx2i_hba *hba,
1013 return 0; 1014 return 0;
1014 1015
1015login_resp_bd_tbl_failure: 1016login_resp_bd_tbl_failure:
1016 dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE, 1017 dma_free_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE,
1017 bnx2i_conn->gen_pdu.req_bd_tbl, 1018 bnx2i_conn->gen_pdu.req_bd_tbl,
1018 bnx2i_conn->gen_pdu.req_bd_dma); 1019 bnx2i_conn->gen_pdu.req_bd_dma);
1019 bnx2i_conn->gen_pdu.req_bd_tbl = NULL; 1020 bnx2i_conn->gen_pdu.req_bd_tbl = NULL;