diff options
author | Jayamohan Kallickal <jayamohank@gmail.com> | 2013-04-05 23:38:22 -0400 |
---|---|---|
committer | James Bottomley <JBottomley@Parallels.com> | 2013-05-02 11:07:55 -0400 |
commit | a8081e346ad3f8bc2449052908095c2675a9996f (patch) | |
tree | 25e8a2afa808c5ddc762ff7e2b6cd33dc83e8e2e /drivers/scsi/be2iscsi | |
parent | 0283fbb18c873993c606a6c9660d6ac78493b37a (diff) |
[SCSI] be2iscsi: Fix returning Failure when MBX fails with Insufficient buffer error
When MBX command fails with insufficent buffer, check for the
response lenght returned. Return success if response length
is non-zero value which indicates valid data.
Signed-off-by: Minh Tran <minhduc.tran@emulex.com>
Signed-off-by: John Soni Jose <sony.john-n@emulex.com>
Signed-off-by: Jayamohan Kallickal <jayamohan.kallickal@emulex.com>
Reviewed-by: Mike Christie <michaelc@cs.wisc.edu>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi/be2iscsi')
-rw-r--r-- | drivers/scsi/be2iscsi/be_cmds.c | 13 | ||||
-rw-r--r-- | drivers/scsi/be2iscsi/be_cmds.h | 4 |
2 files changed, 17 insertions, 0 deletions
diff --git a/drivers/scsi/be2iscsi/be_cmds.c b/drivers/scsi/be2iscsi/be_cmds.c index 0b44cc9bd966..3ad95c7041a9 100644 --- a/drivers/scsi/be2iscsi/be_cmds.c +++ b/drivers/scsi/be2iscsi/be_cmds.c | |||
@@ -155,6 +155,7 @@ int beiscsi_mccq_compl(struct beiscsi_hba *phba, | |||
155 | uint16_t status = 0, addl_status = 0, wrb_num = 0; | 155 | uint16_t status = 0, addl_status = 0, wrb_num = 0; |
156 | struct be_mcc_wrb *temp_wrb; | 156 | struct be_mcc_wrb *temp_wrb; |
157 | struct be_cmd_req_hdr *ioctl_hdr; | 157 | struct be_cmd_req_hdr *ioctl_hdr; |
158 | struct be_cmd_resp_hdr *ioctl_resp_hdr; | ||
158 | struct be_queue_info *mccq = &phba->ctrl.mcc_obj.q; | 159 | struct be_queue_info *mccq = &phba->ctrl.mcc_obj.q; |
159 | 160 | ||
160 | if (beiscsi_error(phba)) | 161 | if (beiscsi_error(phba)) |
@@ -204,6 +205,12 @@ int beiscsi_mccq_compl(struct beiscsi_hba *phba, | |||
204 | ioctl_hdr->subsystem, | 205 | ioctl_hdr->subsystem, |
205 | ioctl_hdr->opcode, | 206 | ioctl_hdr->opcode, |
206 | status, addl_status); | 207 | status, addl_status); |
208 | |||
209 | if (status == MCC_STATUS_INSUFFICIENT_BUFFER) { | ||
210 | ioctl_resp_hdr = (struct be_cmd_resp_hdr *) ioctl_hdr; | ||
211 | if (ioctl_resp_hdr->response_length) | ||
212 | goto release_mcc_tag; | ||
213 | } | ||
207 | rc = -EAGAIN; | 214 | rc = -EAGAIN; |
208 | } | 215 | } |
209 | 216 | ||
@@ -267,6 +274,7 @@ static int be_mcc_compl_process(struct be_ctrl_info *ctrl, | |||
267 | struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem); | 274 | struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem); |
268 | struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev); | 275 | struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev); |
269 | struct be_cmd_req_hdr *hdr = embedded_payload(wrb); | 276 | struct be_cmd_req_hdr *hdr = embedded_payload(wrb); |
277 | struct be_cmd_resp_hdr *resp_hdr; | ||
270 | 278 | ||
271 | be_dws_le_to_cpu(compl, 4); | 279 | be_dws_le_to_cpu(compl, 4); |
272 | 280 | ||
@@ -284,6 +292,11 @@ static int be_mcc_compl_process(struct be_ctrl_info *ctrl, | |||
284 | hdr->subsystem, hdr->opcode, | 292 | hdr->subsystem, hdr->opcode, |
285 | compl_status, extd_status); | 293 | compl_status, extd_status); |
286 | 294 | ||
295 | if (compl_status == MCC_STATUS_INSUFFICIENT_BUFFER) { | ||
296 | resp_hdr = (struct be_cmd_resp_hdr *) hdr; | ||
297 | if (resp_hdr->response_length) | ||
298 | return 0; | ||
299 | } | ||
287 | return -EBUSY; | 300 | return -EBUSY; |
288 | } | 301 | } |
289 | return 0; | 302 | return 0; |
diff --git a/drivers/scsi/be2iscsi/be_cmds.h b/drivers/scsi/be2iscsi/be_cmds.h index 0f8c920b88c4..a338625868e5 100644 --- a/drivers/scsi/be2iscsi/be_cmds.h +++ b/drivers/scsi/be2iscsi/be_cmds.h | |||
@@ -52,6 +52,10 @@ struct be_mcc_wrb { | |||
52 | 52 | ||
53 | /* Completion Status */ | 53 | /* Completion Status */ |
54 | #define MCC_STATUS_SUCCESS 0x0 | 54 | #define MCC_STATUS_SUCCESS 0x0 |
55 | #define MCC_STATUS_FAILED 0x1 | ||
56 | #define MCC_STATUS_ILLEGAL_REQUEST 0x2 | ||
57 | #define MCC_STATUS_ILLEGAL_FIELD 0x3 | ||
58 | #define MCC_STATUS_INSUFFICIENT_BUFFER 0x4 | ||
55 | 59 | ||
56 | #define CQE_STATUS_COMPL_MASK 0xFFFF | 60 | #define CQE_STATUS_COMPL_MASK 0xFFFF |
57 | #define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */ | 61 | #define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */ |