diff options
author | Jayamohan Kallickal <jayamohank@gmail.com> | 2013-09-28 18:35:45 -0400 |
---|---|---|
committer | James Bottomley <JBottomley@Parallels.com> | 2013-10-25 04:58:06 -0400 |
commit | 8a86e8336f37fde1d62bd731e82ca5b22a678926 (patch) | |
tree | 7f28ff5d4062ee7953c6f5a9b3ead9d2444f84a4 /drivers/scsi/be2iscsi/be_main.c | |
parent | 843ae752eea769899d3c2008d7f2b2e094ddb6cc (diff) |
[SCSI] be2iscsi: Fix changes in ASYNC Path for SKH-R adapter
DEF_Q[HDR/DATA] is created on the chute on which iSCSI Protocol is loaded.
When a connection is offloaded, the DEF_Q HDR/Data ID needs to be passed.
FW posts ASYNC message received from target on the passed DEF_Q. Connection
can be offloaded on any of the chute so DEF_Q is created on each Chute.
Change in the ASYNC path initialization based on the configuration parameters
returned for each chute.
For BE-X family iSCSI protocol is loaded only on single chute.
Signed-off-by: John Soni Jose <sony.john-n@emulex.com>
Signed-off-by: Jayamohan Kallickal <jayamohan.kallickal@emulex.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi/be2iscsi/be_main.c')
-rw-r--r-- | drivers/scsi/be2iscsi/be_main.c | 686 |
1 files changed, 422 insertions, 264 deletions
diff --git a/drivers/scsi/be2iscsi/be_main.c b/drivers/scsi/be2iscsi/be_main.c index 2bea0762c14f..779be2b3ede8 100644 --- a/drivers/scsi/be2iscsi/be_main.c +++ b/drivers/scsi/be2iscsi/be_main.c | |||
@@ -1621,8 +1621,8 @@ hwi_get_async_handle(struct beiscsi_hba *phba, | |||
1621 | 1621 | ||
1622 | WARN_ON(!pasync_handle); | 1622 | WARN_ON(!pasync_handle); |
1623 | 1623 | ||
1624 | pasync_handle->cri = | 1624 | pasync_handle->cri = BE_GET_ASYNC_CRI_FROM_CID( |
1625 | BE_GET_CRI_FROM_CID(beiscsi_conn->beiscsi_conn_cid); | 1625 | beiscsi_conn->beiscsi_conn_cid); |
1626 | pasync_handle->is_header = is_header; | 1626 | pasync_handle->is_header = is_header; |
1627 | pasync_handle->buffer_len = dpl; | 1627 | pasync_handle->buffer_len = dpl; |
1628 | *pcq_index = index; | 1628 | *pcq_index = index; |
@@ -1682,18 +1682,13 @@ hwi_update_async_writables(struct beiscsi_hba *phba, | |||
1682 | } | 1682 | } |
1683 | 1683 | ||
1684 | static void hwi_free_async_msg(struct beiscsi_hba *phba, | 1684 | static void hwi_free_async_msg(struct beiscsi_hba *phba, |
1685 | unsigned int cri) | 1685 | struct hwi_async_pdu_context *pasync_ctx, |
1686 | unsigned int cri) | ||
1686 | { | 1687 | { |
1687 | struct hwi_controller *phwi_ctrlr; | ||
1688 | struct hwi_async_pdu_context *pasync_ctx; | ||
1689 | struct async_pdu_handle *pasync_handle, *tmp_handle; | 1688 | struct async_pdu_handle *pasync_handle, *tmp_handle; |
1690 | struct list_head *plist; | 1689 | struct list_head *plist; |
1691 | 1690 | ||
1692 | phwi_ctrlr = phba->phwi_ctrlr; | ||
1693 | pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr); | ||
1694 | |||
1695 | plist = &pasync_ctx->async_entry[cri].wait_queue.list; | 1691 | plist = &pasync_ctx->async_entry[cri].wait_queue.list; |
1696 | |||
1697 | list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link) { | 1692 | list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link) { |
1698 | list_del(&pasync_handle->link); | 1693 | list_del(&pasync_handle->link); |
1699 | 1694 | ||
@@ -1728,7 +1723,7 @@ hwi_get_ring_address(struct hwi_async_pdu_context *pasync_ctx, | |||
1728 | } | 1723 | } |
1729 | 1724 | ||
1730 | static void hwi_post_async_buffers(struct beiscsi_hba *phba, | 1725 | static void hwi_post_async_buffers(struct beiscsi_hba *phba, |
1731 | unsigned int is_header) | 1726 | unsigned int is_header, uint8_t ulp_num) |
1732 | { | 1727 | { |
1733 | struct hwi_controller *phwi_ctrlr; | 1728 | struct hwi_controller *phwi_ctrlr; |
1734 | struct hwi_async_pdu_context *pasync_ctx; | 1729 | struct hwi_async_pdu_context *pasync_ctx; |
@@ -1736,13 +1731,13 @@ static void hwi_post_async_buffers(struct beiscsi_hba *phba, | |||
1736 | struct list_head *pfree_link, *pbusy_list; | 1731 | struct list_head *pfree_link, *pbusy_list; |
1737 | struct phys_addr *pasync_sge; | 1732 | struct phys_addr *pasync_sge; |
1738 | unsigned int ring_id, num_entries; | 1733 | unsigned int ring_id, num_entries; |
1739 | unsigned int host_write_num; | 1734 | unsigned int host_write_num, doorbell_offset; |
1740 | unsigned int writables; | 1735 | unsigned int writables; |
1741 | unsigned int i = 0; | 1736 | unsigned int i = 0; |
1742 | u32 doorbell = 0; | 1737 | u32 doorbell = 0; |
1743 | 1738 | ||
1744 | phwi_ctrlr = phba->phwi_ctrlr; | 1739 | phwi_ctrlr = phba->phwi_ctrlr; |
1745 | pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr); | 1740 | pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num); |
1746 | num_entries = pasync_ctx->num_entries; | 1741 | num_entries = pasync_ctx->num_entries; |
1747 | 1742 | ||
1748 | if (is_header) { | 1743 | if (is_header) { |
@@ -1750,13 +1745,17 @@ static void hwi_post_async_buffers(struct beiscsi_hba *phba, | |||
1750 | pasync_ctx->async_header.free_entries); | 1745 | pasync_ctx->async_header.free_entries); |
1751 | pfree_link = pasync_ctx->async_header.free_list.next; | 1746 | pfree_link = pasync_ctx->async_header.free_list.next; |
1752 | host_write_num = pasync_ctx->async_header.host_write_ptr; | 1747 | host_write_num = pasync_ctx->async_header.host_write_ptr; |
1753 | ring_id = phwi_ctrlr->default_pdu_hdr.id; | 1748 | ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id; |
1749 | doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num]. | ||
1750 | doorbell_offset; | ||
1754 | } else { | 1751 | } else { |
1755 | writables = min(pasync_ctx->async_data.writables, | 1752 | writables = min(pasync_ctx->async_data.writables, |
1756 | pasync_ctx->async_data.free_entries); | 1753 | pasync_ctx->async_data.free_entries); |
1757 | pfree_link = pasync_ctx->async_data.free_list.next; | 1754 | pfree_link = pasync_ctx->async_data.free_list.next; |
1758 | host_write_num = pasync_ctx->async_data.host_write_ptr; | 1755 | host_write_num = pasync_ctx->async_data.host_write_ptr; |
1759 | ring_id = phwi_ctrlr->default_pdu_data.id; | 1756 | ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id; |
1757 | doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num]. | ||
1758 | doorbell_offset; | ||
1760 | } | 1759 | } |
1761 | 1760 | ||
1762 | writables = (writables / 8) * 8; | 1761 | writables = (writables / 8) * 8; |
@@ -1804,7 +1803,7 @@ static void hwi_post_async_buffers(struct beiscsi_hba *phba, | |||
1804 | doorbell |= (writables & DB_DEF_PDU_CQPROC_MASK) | 1803 | doorbell |= (writables & DB_DEF_PDU_CQPROC_MASK) |
1805 | << DB_DEF_PDU_CQPROC_SHIFT; | 1804 | << DB_DEF_PDU_CQPROC_SHIFT; |
1806 | 1805 | ||
1807 | iowrite32(doorbell, phba->db_va + DB_RXULP0_OFFSET); | 1806 | iowrite32(doorbell, phba->db_va + doorbell_offset); |
1808 | } | 1807 | } |
1809 | } | 1808 | } |
1810 | 1809 | ||
@@ -1816,9 +1815,13 @@ static void hwi_flush_default_pdu_buffer(struct beiscsi_hba *phba, | |||
1816 | struct hwi_async_pdu_context *pasync_ctx; | 1815 | struct hwi_async_pdu_context *pasync_ctx; |
1817 | struct async_pdu_handle *pasync_handle = NULL; | 1816 | struct async_pdu_handle *pasync_handle = NULL; |
1818 | unsigned int cq_index = -1; | 1817 | unsigned int cq_index = -1; |
1818 | uint16_t cri_index = BE_GET_CRI_FROM_CID( | ||
1819 | beiscsi_conn->beiscsi_conn_cid); | ||
1819 | 1820 | ||
1820 | phwi_ctrlr = phba->phwi_ctrlr; | 1821 | phwi_ctrlr = phba->phwi_ctrlr; |
1821 | pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr); | 1822 | pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, |
1823 | BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr, | ||
1824 | cri_index)); | ||
1822 | 1825 | ||
1823 | pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx, | 1826 | pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx, |
1824 | pdpdu_cqe, &cq_index); | 1827 | pdpdu_cqe, &cq_index); |
@@ -1827,8 +1830,10 @@ static void hwi_flush_default_pdu_buffer(struct beiscsi_hba *phba, | |||
1827 | hwi_update_async_writables(phba, pasync_ctx, | 1830 | hwi_update_async_writables(phba, pasync_ctx, |
1828 | pasync_handle->is_header, cq_index); | 1831 | pasync_handle->is_header, cq_index); |
1829 | 1832 | ||
1830 | hwi_free_async_msg(phba, pasync_handle->cri); | 1833 | hwi_free_async_msg(phba, pasync_ctx, pasync_handle->cri); |
1831 | hwi_post_async_buffers(phba, pasync_handle->is_header); | 1834 | hwi_post_async_buffers(phba, pasync_handle->is_header, |
1835 | BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr, | ||
1836 | cri_index)); | ||
1832 | } | 1837 | } |
1833 | 1838 | ||
1834 | static unsigned int | 1839 | static unsigned int |
@@ -1867,7 +1872,7 @@ hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn, | |||
1867 | phdr, hdr_len, pfirst_buffer, | 1872 | phdr, hdr_len, pfirst_buffer, |
1868 | offset); | 1873 | offset); |
1869 | 1874 | ||
1870 | hwi_free_async_msg(phba, cri); | 1875 | hwi_free_async_msg(phba, pasync_ctx, cri); |
1871 | return 0; | 1876 | return 0; |
1872 | } | 1877 | } |
1873 | 1878 | ||
@@ -1883,13 +1888,16 @@ hwi_gather_async_pdu(struct beiscsi_conn *beiscsi_conn, | |||
1883 | struct pdu_base *ppdu; | 1888 | struct pdu_base *ppdu; |
1884 | 1889 | ||
1885 | phwi_ctrlr = phba->phwi_ctrlr; | 1890 | phwi_ctrlr = phba->phwi_ctrlr; |
1886 | pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr); | 1891 | pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, |
1892 | BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr, | ||
1893 | BE_GET_CRI_FROM_CID(beiscsi_conn-> | ||
1894 | beiscsi_conn_cid))); | ||
1887 | 1895 | ||
1888 | list_del(&pasync_handle->link); | 1896 | list_del(&pasync_handle->link); |
1889 | if (pasync_handle->is_header) { | 1897 | if (pasync_handle->is_header) { |
1890 | pasync_ctx->async_header.busy_entries--; | 1898 | pasync_ctx->async_header.busy_entries--; |
1891 | if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) { | 1899 | if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) { |
1892 | hwi_free_async_msg(phba, cri); | 1900 | hwi_free_async_msg(phba, pasync_ctx, cri); |
1893 | BUG(); | 1901 | BUG(); |
1894 | } | 1902 | } |
1895 | 1903 | ||
@@ -1944,9 +1952,14 @@ static void hwi_process_default_pdu_ring(struct beiscsi_conn *beiscsi_conn, | |||
1944 | struct hwi_async_pdu_context *pasync_ctx; | 1952 | struct hwi_async_pdu_context *pasync_ctx; |
1945 | struct async_pdu_handle *pasync_handle = NULL; | 1953 | struct async_pdu_handle *pasync_handle = NULL; |
1946 | unsigned int cq_index = -1; | 1954 | unsigned int cq_index = -1; |
1955 | uint16_t cri_index = BE_GET_CRI_FROM_CID( | ||
1956 | beiscsi_conn->beiscsi_conn_cid); | ||
1947 | 1957 | ||
1948 | phwi_ctrlr = phba->phwi_ctrlr; | 1958 | phwi_ctrlr = phba->phwi_ctrlr; |
1949 | pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr); | 1959 | pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, |
1960 | BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr, | ||
1961 | cri_index)); | ||
1962 | |||
1950 | pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx, | 1963 | pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx, |
1951 | pdpdu_cqe, &cq_index); | 1964 | pdpdu_cqe, &cq_index); |
1952 | 1965 | ||
@@ -1955,7 +1968,9 @@ static void hwi_process_default_pdu_ring(struct beiscsi_conn *beiscsi_conn, | |||
1955 | pasync_handle->is_header, cq_index); | 1968 | pasync_handle->is_header, cq_index); |
1956 | 1969 | ||
1957 | hwi_gather_async_pdu(beiscsi_conn, phba, pasync_handle); | 1970 | hwi_gather_async_pdu(beiscsi_conn, phba, pasync_handle); |
1958 | hwi_post_async_buffers(phba, pasync_handle->is_header); | 1971 | hwi_post_async_buffers(phba, pasync_handle->is_header, |
1972 | BEISCSI_GET_ULP_FROM_CRI( | ||
1973 | phwi_ctrlr, cri_index)); | ||
1959 | } | 1974 | } |
1960 | 1975 | ||
1961 | static void beiscsi_process_mcc_isr(struct beiscsi_hba *phba) | 1976 | static void beiscsi_process_mcc_isr(struct beiscsi_hba *phba) |
@@ -2496,24 +2511,13 @@ static void hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task) | |||
2496 | **/ | 2511 | **/ |
2497 | static void beiscsi_find_mem_req(struct beiscsi_hba *phba) | 2512 | static void beiscsi_find_mem_req(struct beiscsi_hba *phba) |
2498 | { | 2513 | { |
2514 | uint8_t mem_descr_index, ulp_num; | ||
2499 | unsigned int num_cq_pages, num_async_pdu_buf_pages; | 2515 | unsigned int num_cq_pages, num_async_pdu_buf_pages; |
2500 | unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn; | 2516 | unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn; |
2501 | unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages; | 2517 | unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages; |
2502 | 2518 | ||
2503 | num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \ | 2519 | num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \ |
2504 | sizeof(struct sol_cqe)); | 2520 | sizeof(struct sol_cqe)); |
2505 | num_async_pdu_buf_pages = | ||
2506 | PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \ | ||
2507 | phba->params.defpdu_hdr_sz); | ||
2508 | num_async_pdu_buf_sgl_pages = | ||
2509 | PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \ | ||
2510 | sizeof(struct phys_addr)); | ||
2511 | num_async_pdu_data_pages = | ||
2512 | PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \ | ||
2513 | phba->params.defpdu_data_sz); | ||
2514 | num_async_pdu_data_sgl_pages = | ||
2515 | PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \ | ||
2516 | sizeof(struct phys_addr)); | ||
2517 | 2521 | ||
2518 | phba->params.hwi_ws_sz = sizeof(struct hwi_controller); | 2522 | phba->params.hwi_ws_sz = sizeof(struct hwi_controller); |
2519 | 2523 | ||
@@ -2537,24 +2541,73 @@ static void beiscsi_find_mem_req(struct beiscsi_hba *phba) | |||
2537 | phba->params.num_sge_per_io * phba->params.icds_per_ctrl; | 2541 | phba->params.num_sge_per_io * phba->params.icds_per_ctrl; |
2538 | phba->mem_req[HWI_MEM_TEMPLATE_HDR] = phba->params.cxns_per_ctrl * | 2542 | phba->mem_req[HWI_MEM_TEMPLATE_HDR] = phba->params.cxns_per_ctrl * |
2539 | BEISCSI_TEMPLATE_HDR_PER_CXN_SIZE; | 2543 | BEISCSI_TEMPLATE_HDR_PER_CXN_SIZE; |
2544 | for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) { | ||
2545 | if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) { | ||
2540 | 2546 | ||
2541 | phba->mem_req[HWI_MEM_ASYNC_HEADER_BUF] = | 2547 | num_async_pdu_buf_sgl_pages = |
2542 | num_async_pdu_buf_pages * PAGE_SIZE; | 2548 | PAGES_REQUIRED(BEISCSI_GET_CID_COUNT( |
2543 | phba->mem_req[HWI_MEM_ASYNC_DATA_BUF] = | 2549 | phba, ulp_num) * |
2544 | num_async_pdu_data_pages * PAGE_SIZE; | 2550 | sizeof(struct phys_addr)); |
2545 | phba->mem_req[HWI_MEM_ASYNC_HEADER_RING] = | 2551 | |
2546 | num_async_pdu_buf_sgl_pages * PAGE_SIZE; | 2552 | num_async_pdu_buf_pages = |
2547 | phba->mem_req[HWI_MEM_ASYNC_DATA_RING] = | 2553 | PAGES_REQUIRED(BEISCSI_GET_CID_COUNT( |
2548 | num_async_pdu_data_sgl_pages * PAGE_SIZE; | 2554 | phba, ulp_num) * |
2549 | phba->mem_req[HWI_MEM_ASYNC_HEADER_HANDLE] = | 2555 | phba->params.defpdu_hdr_sz); |
2550 | phba->params.asyncpdus_per_ctrl * | 2556 | |
2551 | sizeof(struct async_pdu_handle); | 2557 | num_async_pdu_data_pages = |
2552 | phba->mem_req[HWI_MEM_ASYNC_DATA_HANDLE] = | 2558 | PAGES_REQUIRED(BEISCSI_GET_CID_COUNT( |
2553 | phba->params.asyncpdus_per_ctrl * | 2559 | phba, ulp_num) * |
2554 | sizeof(struct async_pdu_handle); | 2560 | phba->params.defpdu_data_sz); |
2555 | phba->mem_req[HWI_MEM_ASYNC_PDU_CONTEXT] = | 2561 | |
2556 | sizeof(struct hwi_async_pdu_context) + | 2562 | num_async_pdu_data_sgl_pages = |
2557 | (phba->params.cxns_per_ctrl * sizeof(struct hwi_async_entry)); | 2563 | PAGES_REQUIRED(BEISCSI_GET_CID_COUNT( |
2564 | phba, ulp_num) * | ||
2565 | sizeof(struct phys_addr)); | ||
2566 | |||
2567 | mem_descr_index = (HWI_MEM_ASYNC_HEADER_BUF_ULP0 + | ||
2568 | (ulp_num * MEM_DESCR_OFFSET)); | ||
2569 | phba->mem_req[mem_descr_index] = | ||
2570 | num_async_pdu_buf_pages * | ||
2571 | PAGE_SIZE; | ||
2572 | |||
2573 | mem_descr_index = (HWI_MEM_ASYNC_DATA_BUF_ULP0 + | ||
2574 | (ulp_num * MEM_DESCR_OFFSET)); | ||
2575 | phba->mem_req[mem_descr_index] = | ||
2576 | num_async_pdu_data_pages * | ||
2577 | PAGE_SIZE; | ||
2578 | |||
2579 | mem_descr_index = (HWI_MEM_ASYNC_HEADER_RING_ULP0 + | ||
2580 | (ulp_num * MEM_DESCR_OFFSET)); | ||
2581 | phba->mem_req[mem_descr_index] = | ||
2582 | num_async_pdu_buf_sgl_pages * | ||
2583 | PAGE_SIZE; | ||
2584 | |||
2585 | mem_descr_index = (HWI_MEM_ASYNC_DATA_RING_ULP0 + | ||
2586 | (ulp_num * MEM_DESCR_OFFSET)); | ||
2587 | phba->mem_req[mem_descr_index] = | ||
2588 | num_async_pdu_data_sgl_pages * | ||
2589 | PAGE_SIZE; | ||
2590 | |||
2591 | mem_descr_index = (HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 + | ||
2592 | (ulp_num * MEM_DESCR_OFFSET)); | ||
2593 | phba->mem_req[mem_descr_index] = | ||
2594 | BEISCSI_GET_CID_COUNT(phba, ulp_num) * | ||
2595 | sizeof(struct async_pdu_handle); | ||
2596 | |||
2597 | mem_descr_index = (HWI_MEM_ASYNC_DATA_HANDLE_ULP0 + | ||
2598 | (ulp_num * MEM_DESCR_OFFSET)); | ||
2599 | phba->mem_req[mem_descr_index] = | ||
2600 | BEISCSI_GET_CID_COUNT(phba, ulp_num) * | ||
2601 | sizeof(struct async_pdu_handle); | ||
2602 | |||
2603 | mem_descr_index = (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 + | ||
2604 | (ulp_num * MEM_DESCR_OFFSET)); | ||
2605 | phba->mem_req[mem_descr_index] = | ||
2606 | sizeof(struct hwi_async_pdu_context) + | ||
2607 | (BEISCSI_GET_CID_COUNT(phba, ulp_num) * | ||
2608 | sizeof(struct hwi_async_entry)); | ||
2609 | } | ||
2610 | } | ||
2558 | } | 2611 | } |
2559 | 2612 | ||
2560 | static int beiscsi_alloc_mem(struct beiscsi_hba *phba) | 2613 | static int beiscsi_alloc_mem(struct beiscsi_hba *phba) |
@@ -2596,6 +2649,12 @@ static int beiscsi_alloc_mem(struct beiscsi_hba *phba) | |||
2596 | 2649 | ||
2597 | mem_descr = phba->init_mem; | 2650 | mem_descr = phba->init_mem; |
2598 | for (i = 0; i < SE_MEM_MAX; i++) { | 2651 | for (i = 0; i < SE_MEM_MAX; i++) { |
2652 | if (!phba->mem_req[i]) { | ||
2653 | mem_descr->mem_array = NULL; | ||
2654 | mem_descr++; | ||
2655 | continue; | ||
2656 | } | ||
2657 | |||
2599 | j = 0; | 2658 | j = 0; |
2600 | mem_arr = mem_arr_orig; | 2659 | mem_arr = mem_arr_orig; |
2601 | alloc_size = phba->mem_req[i]; | 2660 | alloc_size = phba->mem_req[i]; |
@@ -2799,6 +2858,7 @@ init_wrb_hndl_failed: | |||
2799 | 2858 | ||
2800 | static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba) | 2859 | static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba) |
2801 | { | 2860 | { |
2861 | uint8_t ulp_num; | ||
2802 | struct hwi_controller *phwi_ctrlr; | 2862 | struct hwi_controller *phwi_ctrlr; |
2803 | struct hba_parameters *p = &phba->params; | 2863 | struct hba_parameters *p = &phba->params; |
2804 | struct hwi_async_pdu_context *pasync_ctx; | 2864 | struct hwi_async_pdu_context *pasync_ctx; |
@@ -2806,155 +2866,150 @@ static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba) | |||
2806 | unsigned int index, idx, num_per_mem, num_async_data; | 2866 | unsigned int index, idx, num_per_mem, num_async_data; |
2807 | struct be_mem_descriptor *mem_descr; | 2867 | struct be_mem_descriptor *mem_descr; |
2808 | 2868 | ||
2809 | mem_descr = (struct be_mem_descriptor *)phba->init_mem; | 2869 | for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) { |
2810 | mem_descr += HWI_MEM_ASYNC_PDU_CONTEXT; | 2870 | if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) { |
2811 | 2871 | ||
2812 | phwi_ctrlr = phba->phwi_ctrlr; | 2872 | mem_descr = (struct be_mem_descriptor *)phba->init_mem; |
2813 | phwi_ctrlr->phwi_ctxt->pasync_ctx = (struct hwi_async_pdu_context *) | 2873 | mem_descr += (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 + |
2874 | (ulp_num * MEM_DESCR_OFFSET)); | ||
2875 | |||
2876 | phwi_ctrlr = phba->phwi_ctrlr; | ||
2877 | phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num] = | ||
2878 | (struct hwi_async_pdu_context *) | ||
2879 | mem_descr->mem_array[0].virtual_address; | ||
2880 | |||
2881 | pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num]; | ||
2882 | memset(pasync_ctx, 0, sizeof(*pasync_ctx)); | ||
2883 | |||
2884 | pasync_ctx->async_entry = | ||
2885 | (struct hwi_async_entry *) | ||
2886 | ((long unsigned int)pasync_ctx + | ||
2887 | sizeof(struct hwi_async_pdu_context)); | ||
2888 | |||
2889 | pasync_ctx->num_entries = BEISCSI_GET_CID_COUNT(phba, | ||
2890 | ulp_num); | ||
2891 | pasync_ctx->buffer_size = p->defpdu_hdr_sz; | ||
2892 | |||
2893 | mem_descr = (struct be_mem_descriptor *)phba->init_mem; | ||
2894 | mem_descr += HWI_MEM_ASYNC_HEADER_BUF_ULP0 + | ||
2895 | (ulp_num * MEM_DESCR_OFFSET); | ||
2896 | if (mem_descr->mem_array[0].virtual_address) { | ||
2897 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, | ||
2898 | "BM_%d : hwi_init_async_pdu_ctx" | ||
2899 | " HWI_MEM_ASYNC_HEADER_BUF_ULP%d va=%p\n", | ||
2900 | ulp_num, | ||
2901 | mem_descr->mem_array[0]. | ||
2902 | virtual_address); | ||
2903 | } else | ||
2904 | beiscsi_log(phba, KERN_WARNING, | ||
2905 | BEISCSI_LOG_INIT, | ||
2906 | "BM_%d : No Virtual address for ULP : %d\n", | ||
2907 | ulp_num); | ||
2908 | |||
2909 | pasync_ctx->async_header.va_base = | ||
2814 | mem_descr->mem_array[0].virtual_address; | 2910 | mem_descr->mem_array[0].virtual_address; |
2815 | pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx; | ||
2816 | memset(pasync_ctx, 0, sizeof(*pasync_ctx)); | ||
2817 | |||
2818 | pasync_ctx->async_entry = kzalloc(sizeof(struct hwi_async_entry) * | ||
2819 | phba->params.cxns_per_ctrl, | ||
2820 | GFP_KERNEL); | ||
2821 | if (!pasync_ctx->async_entry) { | ||
2822 | beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, | ||
2823 | "BM_%d : hwi_init_async_pdu_ctx Mem Alloc Failed\n"); | ||
2824 | return -ENOMEM; | ||
2825 | } | ||
2826 | |||
2827 | pasync_ctx->num_entries = p->asyncpdus_per_ctrl; | ||
2828 | pasync_ctx->buffer_size = p->defpdu_hdr_sz; | ||
2829 | 2911 | ||
2830 | mem_descr = (struct be_mem_descriptor *)phba->init_mem; | 2912 | pasync_ctx->async_header.pa_base.u.a64.address = |
2831 | mem_descr += HWI_MEM_ASYNC_HEADER_BUF; | 2913 | mem_descr->mem_array[0]. |
2832 | if (mem_descr->mem_array[0].virtual_address) { | 2914 | bus_address.u.a64.address; |
2833 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, | ||
2834 | "BM_%d : hwi_init_async_pdu_ctx" | ||
2835 | " HWI_MEM_ASYNC_HEADER_BUF va=%p\n", | ||
2836 | mem_descr->mem_array[0].virtual_address); | ||
2837 | } else | ||
2838 | beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT, | ||
2839 | "BM_%d : No Virtual address\n"); | ||
2840 | |||
2841 | pasync_ctx->async_header.va_base = | ||
2842 | mem_descr->mem_array[0].virtual_address; | ||
2843 | |||
2844 | pasync_ctx->async_header.pa_base.u.a64.address = | ||
2845 | mem_descr->mem_array[0].bus_address.u.a64.address; | ||
2846 | |||
2847 | mem_descr = (struct be_mem_descriptor *)phba->init_mem; | ||
2848 | mem_descr += HWI_MEM_ASYNC_HEADER_RING; | ||
2849 | if (mem_descr->mem_array[0].virtual_address) { | ||
2850 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, | ||
2851 | "BM_%d : hwi_init_async_pdu_ctx" | ||
2852 | " HWI_MEM_ASYNC_HEADER_RING va=%p\n", | ||
2853 | mem_descr->mem_array[0].virtual_address); | ||
2854 | } else | ||
2855 | beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT, | ||
2856 | "BM_%d : No Virtual address\n"); | ||
2857 | |||
2858 | pasync_ctx->async_header.ring_base = | ||
2859 | mem_descr->mem_array[0].virtual_address; | ||
2860 | |||
2861 | mem_descr = (struct be_mem_descriptor *)phba->init_mem; | ||
2862 | mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE; | ||
2863 | if (mem_descr->mem_array[0].virtual_address) { | ||
2864 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, | ||
2865 | "BM_%d : hwi_init_async_pdu_ctx" | ||
2866 | " HWI_MEM_ASYNC_HEADER_HANDLE va=%p\n", | ||
2867 | mem_descr->mem_array[0].virtual_address); | ||
2868 | } else | ||
2869 | beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT, | ||
2870 | "BM_%d : No Virtual address\n"); | ||
2871 | |||
2872 | pasync_ctx->async_header.handle_base = | ||
2873 | mem_descr->mem_array[0].virtual_address; | ||
2874 | pasync_ctx->async_header.writables = 0; | ||
2875 | INIT_LIST_HEAD(&pasync_ctx->async_header.free_list); | ||
2876 | |||
2877 | |||
2878 | mem_descr = (struct be_mem_descriptor *)phba->init_mem; | ||
2879 | mem_descr += HWI_MEM_ASYNC_DATA_RING; | ||
2880 | if (mem_descr->mem_array[0].virtual_address) { | ||
2881 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, | ||
2882 | "BM_%d : hwi_init_async_pdu_ctx" | ||
2883 | " HWI_MEM_ASYNC_DATA_RING va=%p\n", | ||
2884 | mem_descr->mem_array[0].virtual_address); | ||
2885 | } else | ||
2886 | beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT, | ||
2887 | "BM_%d : No Virtual address\n"); | ||
2888 | |||
2889 | pasync_ctx->async_data.ring_base = | ||
2890 | mem_descr->mem_array[0].virtual_address; | ||
2891 | |||
2892 | mem_descr = (struct be_mem_descriptor *)phba->init_mem; | ||
2893 | mem_descr += HWI_MEM_ASYNC_DATA_HANDLE; | ||
2894 | if (!mem_descr->mem_array[0].virtual_address) | ||
2895 | beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT, | ||
2896 | "BM_%d : No Virtual address\n"); | ||
2897 | 2915 | ||
2898 | pasync_ctx->async_data.handle_base = | 2916 | mem_descr = (struct be_mem_descriptor *)phba->init_mem; |
2899 | mem_descr->mem_array[0].virtual_address; | 2917 | mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 + |
2900 | pasync_ctx->async_data.writables = 0; | 2918 | (ulp_num * MEM_DESCR_OFFSET); |
2901 | INIT_LIST_HEAD(&pasync_ctx->async_data.free_list); | 2919 | if (mem_descr->mem_array[0].virtual_address) { |
2920 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, | ||
2921 | "BM_%d : hwi_init_async_pdu_ctx" | ||
2922 | " HWI_MEM_ASYNC_HEADER_RING_ULP%d va=%p\n", | ||
2923 | ulp_num, | ||
2924 | mem_descr->mem_array[0]. | ||
2925 | virtual_address); | ||
2926 | } else | ||
2927 | beiscsi_log(phba, KERN_WARNING, | ||
2928 | BEISCSI_LOG_INIT, | ||
2929 | "BM_%d : No Virtual address for ULP : %d\n", | ||
2930 | ulp_num); | ||
2931 | |||
2932 | pasync_ctx->async_header.ring_base = | ||
2933 | mem_descr->mem_array[0].virtual_address; | ||
2902 | 2934 | ||
2903 | pasync_header_h = | 2935 | mem_descr = (struct be_mem_descriptor *)phba->init_mem; |
2904 | (struct async_pdu_handle *)pasync_ctx->async_header.handle_base; | 2936 | mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 + |
2905 | pasync_data_h = | 2937 | (ulp_num * MEM_DESCR_OFFSET); |
2906 | (struct async_pdu_handle *)pasync_ctx->async_data.handle_base; | 2938 | if (mem_descr->mem_array[0].virtual_address) { |
2939 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, | ||
2940 | "BM_%d : hwi_init_async_pdu_ctx" | ||
2941 | " HWI_MEM_ASYNC_HEADER_HANDLE_ULP%d va=%p\n", | ||
2942 | ulp_num, | ||
2943 | mem_descr->mem_array[0]. | ||
2944 | virtual_address); | ||
2945 | } else | ||
2946 | beiscsi_log(phba, KERN_WARNING, | ||
2947 | BEISCSI_LOG_INIT, | ||
2948 | "BM_%d : No Virtual address for ULP : %d\n", | ||
2949 | ulp_num); | ||
2950 | |||
2951 | pasync_ctx->async_header.handle_base = | ||
2952 | mem_descr->mem_array[0].virtual_address; | ||
2953 | pasync_ctx->async_header.writables = 0; | ||
2954 | INIT_LIST_HEAD(&pasync_ctx->async_header.free_list); | ||
2955 | |||
2956 | mem_descr = (struct be_mem_descriptor *)phba->init_mem; | ||
2957 | mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 + | ||
2958 | (ulp_num * MEM_DESCR_OFFSET); | ||
2959 | if (mem_descr->mem_array[0].virtual_address) { | ||
2960 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, | ||
2961 | "BM_%d : hwi_init_async_pdu_ctx" | ||
2962 | " HWI_MEM_ASYNC_DATA_RING_ULP%d va=%p\n", | ||
2963 | ulp_num, | ||
2964 | mem_descr->mem_array[0]. | ||
2965 | virtual_address); | ||
2966 | } else | ||
2967 | beiscsi_log(phba, KERN_WARNING, | ||
2968 | BEISCSI_LOG_INIT, | ||
2969 | "BM_%d : No Virtual address for ULP : %d\n", | ||
2970 | ulp_num); | ||
2971 | |||
2972 | pasync_ctx->async_data.ring_base = | ||
2973 | mem_descr->mem_array[0].virtual_address; | ||
2907 | 2974 | ||
2908 | mem_descr = (struct be_mem_descriptor *)phba->init_mem; | 2975 | mem_descr = (struct be_mem_descriptor *)phba->init_mem; |
2909 | mem_descr += HWI_MEM_ASYNC_DATA_BUF; | 2976 | mem_descr += HWI_MEM_ASYNC_DATA_HANDLE_ULP0 + |
2910 | if (mem_descr->mem_array[0].virtual_address) { | 2977 | (ulp_num * MEM_DESCR_OFFSET); |
2911 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, | 2978 | if (!mem_descr->mem_array[0].virtual_address) |
2912 | "BM_%d : hwi_init_async_pdu_ctx" | 2979 | beiscsi_log(phba, KERN_WARNING, |
2913 | " HWI_MEM_ASYNC_DATA_BUF va=%p\n", | 2980 | BEISCSI_LOG_INIT, |
2914 | mem_descr->mem_array[0].virtual_address); | 2981 | "BM_%d : No Virtual address for ULP : %d\n", |
2915 | } else | 2982 | ulp_num); |
2916 | beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT, | ||
2917 | "BM_%d : No Virtual address\n"); | ||
2918 | 2983 | ||
2919 | idx = 0; | 2984 | pasync_ctx->async_data.handle_base = |
2920 | pasync_ctx->async_data.va_base = | 2985 | mem_descr->mem_array[0].virtual_address; |
2921 | mem_descr->mem_array[idx].virtual_address; | 2986 | pasync_ctx->async_data.writables = 0; |
2922 | pasync_ctx->async_data.pa_base.u.a64.address = | 2987 | INIT_LIST_HEAD(&pasync_ctx->async_data.free_list); |
2923 | mem_descr->mem_array[idx].bus_address.u.a64.address; | 2988 | |
2924 | 2989 | pasync_header_h = | |
2925 | num_async_data = ((mem_descr->mem_array[idx].size) / | 2990 | (struct async_pdu_handle *) |
2926 | phba->params.defpdu_data_sz); | 2991 | pasync_ctx->async_header.handle_base; |
2927 | num_per_mem = 0; | 2992 | pasync_data_h = |
2928 | 2993 | (struct async_pdu_handle *) | |
2929 | for (index = 0; index < p->asyncpdus_per_ctrl; index++) { | 2994 | pasync_ctx->async_data.handle_base; |
2930 | pasync_header_h->cri = -1; | 2995 | |
2931 | pasync_header_h->index = (char)index; | 2996 | mem_descr = (struct be_mem_descriptor *)phba->init_mem; |
2932 | INIT_LIST_HEAD(&pasync_header_h->link); | 2997 | mem_descr += HWI_MEM_ASYNC_DATA_BUF_ULP0 + |
2933 | pasync_header_h->pbuffer = | 2998 | (ulp_num * MEM_DESCR_OFFSET); |
2934 | (void *)((unsigned long) | 2999 | if (mem_descr->mem_array[0].virtual_address) { |
2935 | (pasync_ctx->async_header.va_base) + | 3000 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, |
2936 | (p->defpdu_hdr_sz * index)); | 3001 | "BM_%d : hwi_init_async_pdu_ctx" |
2937 | 3002 | " HWI_MEM_ASYNC_DATA_BUF_ULP%d va=%p\n", | |
2938 | pasync_header_h->pa.u.a64.address = | 3003 | ulp_num, |
2939 | pasync_ctx->async_header.pa_base.u.a64.address + | 3004 | mem_descr->mem_array[0]. |
2940 | (p->defpdu_hdr_sz * index); | 3005 | virtual_address); |
2941 | 3006 | } else | |
2942 | list_add_tail(&pasync_header_h->link, | 3007 | beiscsi_log(phba, KERN_WARNING, |
2943 | &pasync_ctx->async_header.free_list); | 3008 | BEISCSI_LOG_INIT, |
2944 | pasync_header_h++; | 3009 | "BM_%d : No Virtual address for ULP : %d\n", |
2945 | pasync_ctx->async_header.free_entries++; | 3010 | ulp_num); |
2946 | pasync_ctx->async_header.writables++; | 3011 | |
2947 | 3012 | idx = 0; | |
2948 | INIT_LIST_HEAD(&pasync_ctx->async_entry[index].wait_queue.list); | ||
2949 | INIT_LIST_HEAD(&pasync_ctx->async_entry[index]. | ||
2950 | header_busy_list); | ||
2951 | pasync_data_h->cri = -1; | ||
2952 | pasync_data_h->index = (char)index; | ||
2953 | INIT_LIST_HEAD(&pasync_data_h->link); | ||
2954 | |||
2955 | if (!num_async_data) { | ||
2956 | num_per_mem = 0; | ||
2957 | idx++; | ||
2958 | pasync_ctx->async_data.va_base = | 3013 | pasync_ctx->async_data.va_base = |
2959 | mem_descr->mem_array[idx].virtual_address; | 3014 | mem_descr->mem_array[idx].virtual_address; |
2960 | pasync_ctx->async_data.pa_base.u.a64.address = | 3015 | pasync_ctx->async_data.pa_base.u.a64.address = |
@@ -2963,32 +3018,83 @@ static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba) | |||
2963 | 3018 | ||
2964 | num_async_data = ((mem_descr->mem_array[idx].size) / | 3019 | num_async_data = ((mem_descr->mem_array[idx].size) / |
2965 | phba->params.defpdu_data_sz); | 3020 | phba->params.defpdu_data_sz); |
2966 | } | 3021 | num_per_mem = 0; |
2967 | pasync_data_h->pbuffer = | ||
2968 | (void *)((unsigned long) | ||
2969 | (pasync_ctx->async_data.va_base) + | ||
2970 | (p->defpdu_data_sz * num_per_mem)); | ||
2971 | |||
2972 | pasync_data_h->pa.u.a64.address = | ||
2973 | pasync_ctx->async_data.pa_base.u.a64.address + | ||
2974 | (p->defpdu_data_sz * num_per_mem); | ||
2975 | num_per_mem++; | ||
2976 | num_async_data--; | ||
2977 | 3022 | ||
2978 | list_add_tail(&pasync_data_h->link, | 3023 | for (index = 0; index < BEISCSI_GET_CID_COUNT |
2979 | &pasync_ctx->async_data.free_list); | 3024 | (phba, ulp_num); index++) { |
2980 | pasync_data_h++; | 3025 | pasync_header_h->cri = -1; |
2981 | pasync_ctx->async_data.free_entries++; | 3026 | pasync_header_h->index = (char)index; |
2982 | pasync_ctx->async_data.writables++; | 3027 | INIT_LIST_HEAD(&pasync_header_h->link); |
3028 | pasync_header_h->pbuffer = | ||
3029 | (void *)((unsigned long) | ||
3030 | (pasync_ctx-> | ||
3031 | async_header.va_base) + | ||
3032 | (p->defpdu_hdr_sz * index)); | ||
3033 | |||
3034 | pasync_header_h->pa.u.a64.address = | ||
3035 | pasync_ctx->async_header.pa_base.u.a64. | ||
3036 | address + (p->defpdu_hdr_sz * index); | ||
3037 | |||
3038 | list_add_tail(&pasync_header_h->link, | ||
3039 | &pasync_ctx->async_header. | ||
3040 | free_list); | ||
3041 | pasync_header_h++; | ||
3042 | pasync_ctx->async_header.free_entries++; | ||
3043 | pasync_ctx->async_header.writables++; | ||
3044 | |||
3045 | INIT_LIST_HEAD(&pasync_ctx->async_entry[index]. | ||
3046 | wait_queue.list); | ||
3047 | INIT_LIST_HEAD(&pasync_ctx->async_entry[index]. | ||
3048 | header_busy_list); | ||
3049 | pasync_data_h->cri = -1; | ||
3050 | pasync_data_h->index = (char)index; | ||
3051 | INIT_LIST_HEAD(&pasync_data_h->link); | ||
3052 | |||
3053 | if (!num_async_data) { | ||
3054 | num_per_mem = 0; | ||
3055 | idx++; | ||
3056 | pasync_ctx->async_data.va_base = | ||
3057 | mem_descr->mem_array[idx]. | ||
3058 | virtual_address; | ||
3059 | pasync_ctx->async_data.pa_base.u. | ||
3060 | a64.address = | ||
3061 | mem_descr->mem_array[idx]. | ||
3062 | bus_address.u.a64.address; | ||
3063 | num_async_data = | ||
3064 | ((mem_descr->mem_array[idx]. | ||
3065 | size) / | ||
3066 | phba->params.defpdu_data_sz); | ||
3067 | } | ||
3068 | pasync_data_h->pbuffer = | ||
3069 | (void *)((unsigned long) | ||
3070 | (pasync_ctx->async_data.va_base) + | ||
3071 | (p->defpdu_data_sz * num_per_mem)); | ||
3072 | |||
3073 | pasync_data_h->pa.u.a64.address = | ||
3074 | pasync_ctx->async_data.pa_base.u.a64. | ||
3075 | address + (p->defpdu_data_sz * | ||
3076 | num_per_mem); | ||
3077 | num_per_mem++; | ||
3078 | num_async_data--; | ||
3079 | |||
3080 | list_add_tail(&pasync_data_h->link, | ||
3081 | &pasync_ctx->async_data. | ||
3082 | free_list); | ||
3083 | pasync_data_h++; | ||
3084 | pasync_ctx->async_data.free_entries++; | ||
3085 | pasync_ctx->async_data.writables++; | ||
3086 | |||
3087 | INIT_LIST_HEAD(&pasync_ctx->async_entry[index]. | ||
3088 | data_busy_list); | ||
3089 | } | ||
2983 | 3090 | ||
2984 | INIT_LIST_HEAD(&pasync_ctx->async_entry[index].data_busy_list); | 3091 | pasync_ctx->async_header.host_write_ptr = 0; |
3092 | pasync_ctx->async_header.ep_read_ptr = -1; | ||
3093 | pasync_ctx->async_data.host_write_ptr = 0; | ||
3094 | pasync_ctx->async_data.ep_read_ptr = -1; | ||
3095 | } | ||
2985 | } | 3096 | } |
2986 | 3097 | ||
2987 | pasync_ctx->async_header.host_write_ptr = 0; | ||
2988 | pasync_ctx->async_header.ep_read_ptr = -1; | ||
2989 | pasync_ctx->async_data.host_write_ptr = 0; | ||
2990 | pasync_ctx->async_data.ep_read_ptr = -1; | ||
2991 | |||
2992 | return 0; | 3098 | return 0; |
2993 | } | 3099 | } |
2994 | 3100 | ||
@@ -3184,7 +3290,7 @@ static int | |||
3184 | beiscsi_create_def_hdr(struct beiscsi_hba *phba, | 3290 | beiscsi_create_def_hdr(struct beiscsi_hba *phba, |
3185 | struct hwi_context_memory *phwi_context, | 3291 | struct hwi_context_memory *phwi_context, |
3186 | struct hwi_controller *phwi_ctrlr, | 3292 | struct hwi_controller *phwi_ctrlr, |
3187 | unsigned int def_pdu_ring_sz) | 3293 | unsigned int def_pdu_ring_sz, uint8_t ulp_num) |
3188 | { | 3294 | { |
3189 | unsigned int idx; | 3295 | unsigned int idx; |
3190 | int ret; | 3296 | int ret; |
@@ -3194,36 +3300,42 @@ beiscsi_create_def_hdr(struct beiscsi_hba *phba, | |||
3194 | void *dq_vaddress; | 3300 | void *dq_vaddress; |
3195 | 3301 | ||
3196 | idx = 0; | 3302 | idx = 0; |
3197 | dq = &phwi_context->be_def_hdrq; | 3303 | dq = &phwi_context->be_def_hdrq[ulp_num]; |
3198 | cq = &phwi_context->be_cq[0]; | 3304 | cq = &phwi_context->be_cq[0]; |
3199 | mem = &dq->dma_mem; | 3305 | mem = &dq->dma_mem; |
3200 | mem_descr = phba->init_mem; | 3306 | mem_descr = phba->init_mem; |
3201 | mem_descr += HWI_MEM_ASYNC_HEADER_RING; | 3307 | mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 + |
3308 | (ulp_num * MEM_DESCR_OFFSET); | ||
3202 | dq_vaddress = mem_descr->mem_array[idx].virtual_address; | 3309 | dq_vaddress = mem_descr->mem_array[idx].virtual_address; |
3203 | ret = be_fill_queue(dq, mem_descr->mem_array[0].size / | 3310 | ret = be_fill_queue(dq, mem_descr->mem_array[0].size / |
3204 | sizeof(struct phys_addr), | 3311 | sizeof(struct phys_addr), |
3205 | sizeof(struct phys_addr), dq_vaddress); | 3312 | sizeof(struct phys_addr), dq_vaddress); |
3206 | if (ret) { | 3313 | if (ret) { |
3207 | beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, | 3314 | beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, |
3208 | "BM_%d : be_fill_queue Failed for DEF PDU HDR\n"); | 3315 | "BM_%d : be_fill_queue Failed for DEF PDU HDR on ULP : %d\n", |
3316 | ulp_num); | ||
3317 | |||
3209 | return ret; | 3318 | return ret; |
3210 | } | 3319 | } |
3211 | mem->dma = (unsigned long)mem_descr->mem_array[idx]. | 3320 | mem->dma = (unsigned long)mem_descr->mem_array[idx]. |
3212 | bus_address.u.a64.address; | 3321 | bus_address.u.a64.address; |
3213 | ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq, | 3322 | ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq, |
3214 | def_pdu_ring_sz, | 3323 | def_pdu_ring_sz, |
3215 | phba->params.defpdu_hdr_sz); | 3324 | phba->params.defpdu_hdr_sz, |
3325 | BEISCSI_DEFQ_HDR, ulp_num); | ||
3216 | if (ret) { | 3326 | if (ret) { |
3217 | beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, | 3327 | beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, |
3218 | "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR\n"); | 3328 | "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR on ULP : %d\n", |
3329 | ulp_num); | ||
3330 | |||
3219 | return ret; | 3331 | return ret; |
3220 | } | 3332 | } |
3221 | phwi_ctrlr->default_pdu_hdr.id = phwi_context->be_def_hdrq.id; | ||
3222 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, | ||
3223 | "BM_%d : iscsi def pdu id is %d\n", | ||
3224 | phwi_context->be_def_hdrq.id); | ||
3225 | 3333 | ||
3226 | hwi_post_async_buffers(phba, 1); | 3334 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, |
3335 | "BM_%d : iscsi hdr def pdu id for ULP : %d is %d\n", | ||
3336 | ulp_num, | ||
3337 | phwi_context->be_def_hdrq[ulp_num].id); | ||
3338 | hwi_post_async_buffers(phba, BEISCSI_DEFQ_HDR, ulp_num); | ||
3227 | return 0; | 3339 | return 0; |
3228 | } | 3340 | } |
3229 | 3341 | ||
@@ -3231,7 +3343,7 @@ static int | |||
3231 | beiscsi_create_def_data(struct beiscsi_hba *phba, | 3343 | beiscsi_create_def_data(struct beiscsi_hba *phba, |
3232 | struct hwi_context_memory *phwi_context, | 3344 | struct hwi_context_memory *phwi_context, |
3233 | struct hwi_controller *phwi_ctrlr, | 3345 | struct hwi_controller *phwi_ctrlr, |
3234 | unsigned int def_pdu_ring_sz) | 3346 | unsigned int def_pdu_ring_sz, uint8_t ulp_num) |
3235 | { | 3347 | { |
3236 | unsigned int idx; | 3348 | unsigned int idx; |
3237 | int ret; | 3349 | int ret; |
@@ -3241,39 +3353,47 @@ beiscsi_create_def_data(struct beiscsi_hba *phba, | |||
3241 | void *dq_vaddress; | 3353 | void *dq_vaddress; |
3242 | 3354 | ||
3243 | idx = 0; | 3355 | idx = 0; |
3244 | dataq = &phwi_context->be_def_dataq; | 3356 | dataq = &phwi_context->be_def_dataq[ulp_num]; |
3245 | cq = &phwi_context->be_cq[0]; | 3357 | cq = &phwi_context->be_cq[0]; |
3246 | mem = &dataq->dma_mem; | 3358 | mem = &dataq->dma_mem; |
3247 | mem_descr = phba->init_mem; | 3359 | mem_descr = phba->init_mem; |
3248 | mem_descr += HWI_MEM_ASYNC_DATA_RING; | 3360 | mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 + |
3361 | (ulp_num * MEM_DESCR_OFFSET); | ||
3249 | dq_vaddress = mem_descr->mem_array[idx].virtual_address; | 3362 | dq_vaddress = mem_descr->mem_array[idx].virtual_address; |
3250 | ret = be_fill_queue(dataq, mem_descr->mem_array[0].size / | 3363 | ret = be_fill_queue(dataq, mem_descr->mem_array[0].size / |
3251 | sizeof(struct phys_addr), | 3364 | sizeof(struct phys_addr), |
3252 | sizeof(struct phys_addr), dq_vaddress); | 3365 | sizeof(struct phys_addr), dq_vaddress); |
3253 | if (ret) { | 3366 | if (ret) { |
3254 | beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, | 3367 | beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, |
3255 | "BM_%d : be_fill_queue Failed for DEF PDU DATA\n"); | 3368 | "BM_%d : be_fill_queue Failed for DEF PDU " |
3369 | "DATA on ULP : %d\n", | ||
3370 | ulp_num); | ||
3371 | |||
3256 | return ret; | 3372 | return ret; |
3257 | } | 3373 | } |
3258 | mem->dma = (unsigned long)mem_descr->mem_array[idx]. | 3374 | mem->dma = (unsigned long)mem_descr->mem_array[idx]. |
3259 | bus_address.u.a64.address; | 3375 | bus_address.u.a64.address; |
3260 | ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq, | 3376 | ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq, |
3261 | def_pdu_ring_sz, | 3377 | def_pdu_ring_sz, |
3262 | phba->params.defpdu_data_sz); | 3378 | phba->params.defpdu_data_sz, |
3379 | BEISCSI_DEFQ_DATA, ulp_num); | ||
3263 | if (ret) { | 3380 | if (ret) { |
3264 | beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, | 3381 | beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, |
3265 | "BM_%d be_cmd_create_default_pdu_queue" | 3382 | "BM_%d be_cmd_create_default_pdu_queue" |
3266 | " Failed for DEF PDU DATA\n"); | 3383 | " Failed for DEF PDU DATA on ULP : %d\n", |
3384 | ulp_num); | ||
3267 | return ret; | 3385 | return ret; |
3268 | } | 3386 | } |
3269 | phwi_ctrlr->default_pdu_data.id = phwi_context->be_def_dataq.id; | 3387 | |
3270 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, | 3388 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, |
3271 | "BM_%d : iscsi def data id is %d\n", | 3389 | "BM_%d : iscsi def data id on ULP : %d is %d\n", |
3272 | phwi_context->be_def_dataq.id); | 3390 | ulp_num, |
3391 | phwi_context->be_def_dataq[ulp_num].id); | ||
3273 | 3392 | ||
3274 | hwi_post_async_buffers(phba, 0); | 3393 | hwi_post_async_buffers(phba, BEISCSI_DEFQ_DATA, ulp_num); |
3275 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, | 3394 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, |
3276 | "BM_%d : DEFAULT PDU DATA RING CREATED\n"); | 3395 | "BM_%d : DEFAULT PDU DATA RING CREATED" |
3396 | "on ULP : %d\n", ulp_num); | ||
3277 | 3397 | ||
3278 | return 0; | 3398 | return 0; |
3279 | } | 3399 | } |
@@ -3483,7 +3603,7 @@ static void hwi_cleanup(struct beiscsi_hba *phba) | |||
3483 | struct hwi_controller *phwi_ctrlr; | 3603 | struct hwi_controller *phwi_ctrlr; |
3484 | struct hwi_context_memory *phwi_context; | 3604 | struct hwi_context_memory *phwi_context; |
3485 | struct hwi_async_pdu_context *pasync_ctx; | 3605 | struct hwi_async_pdu_context *pasync_ctx; |
3486 | int i, eq_num; | 3606 | int i, eq_num, ulp_num; |
3487 | 3607 | ||
3488 | phwi_ctrlr = phba->phwi_ctrlr; | 3608 | phwi_ctrlr = phba->phwi_ctrlr; |
3489 | phwi_context = phwi_ctrlr->phwi_ctxt; | 3609 | phwi_context = phwi_ctrlr->phwi_ctxt; |
@@ -3498,13 +3618,20 @@ static void hwi_cleanup(struct beiscsi_hba *phba) | |||
3498 | kfree(phwi_context->be_wrbq); | 3618 | kfree(phwi_context->be_wrbq); |
3499 | free_wrb_handles(phba); | 3619 | free_wrb_handles(phba); |
3500 | 3620 | ||
3501 | q = &phwi_context->be_def_hdrq; | 3621 | for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) { |
3502 | if (q->created) | 3622 | if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) { |
3503 | beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ); | ||
3504 | 3623 | ||
3505 | q = &phwi_context->be_def_dataq; | 3624 | q = &phwi_context->be_def_hdrq[ulp_num]; |
3506 | if (q->created) | 3625 | if (q->created) |
3507 | beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ); | 3626 | beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ); |
3627 | |||
3628 | q = &phwi_context->be_def_dataq[ulp_num]; | ||
3629 | if (q->created) | ||
3630 | beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ); | ||
3631 | |||
3632 | pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num]; | ||
3633 | } | ||
3634 | } | ||
3508 | 3635 | ||
3509 | beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL); | 3636 | beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL); |
3510 | 3637 | ||
@@ -3523,9 +3650,6 @@ static void hwi_cleanup(struct beiscsi_hba *phba) | |||
3523 | beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ); | 3650 | beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ); |
3524 | } | 3651 | } |
3525 | be_mcc_queues_destroy(phba); | 3652 | be_mcc_queues_destroy(phba); |
3526 | |||
3527 | pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx; | ||
3528 | kfree(pasync_ctx->async_entry); | ||
3529 | be_cmd_fw_uninit(ctrl); | 3653 | be_cmd_fw_uninit(ctrl); |
3530 | } | 3654 | } |
3531 | 3655 | ||
@@ -3605,10 +3729,8 @@ static int hwi_init_port(struct beiscsi_hba *phba) | |||
3605 | struct hwi_context_memory *phwi_context; | 3729 | struct hwi_context_memory *phwi_context; |
3606 | unsigned int def_pdu_ring_sz; | 3730 | unsigned int def_pdu_ring_sz; |
3607 | struct be_ctrl_info *ctrl = &phba->ctrl; | 3731 | struct be_ctrl_info *ctrl = &phba->ctrl; |
3608 | int status; | 3732 | int status, ulp_num; |
3609 | 3733 | ||
3610 | def_pdu_ring_sz = | ||
3611 | phba->params.asyncpdus_per_ctrl * sizeof(struct phys_addr); | ||
3612 | phwi_ctrlr = phba->phwi_ctrlr; | 3734 | phwi_ctrlr = phba->phwi_ctrlr; |
3613 | phwi_context = phwi_ctrlr->phwi_ctxt; | 3735 | phwi_context = phwi_ctrlr->phwi_ctxt; |
3614 | phwi_context->max_eqd = 0; | 3736 | phwi_context->max_eqd = 0; |
@@ -3641,20 +3763,35 @@ static int hwi_init_port(struct beiscsi_hba *phba) | |||
3641 | goto error; | 3763 | goto error; |
3642 | } | 3764 | } |
3643 | 3765 | ||
3644 | status = beiscsi_create_def_hdr(phba, phwi_context, phwi_ctrlr, | 3766 | for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) { |
3645 | def_pdu_ring_sz); | 3767 | if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) { |
3646 | if (status != 0) { | ||
3647 | beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, | ||
3648 | "BM_%d : Default Header not created\n"); | ||
3649 | goto error; | ||
3650 | } | ||
3651 | 3768 | ||
3652 | status = beiscsi_create_def_data(phba, phwi_context, | 3769 | def_pdu_ring_sz = |
3653 | phwi_ctrlr, def_pdu_ring_sz); | 3770 | BEISCSI_GET_CID_COUNT(phba, ulp_num) * |
3654 | if (status != 0) { | 3771 | sizeof(struct phys_addr); |
3655 | beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, | 3772 | |
3656 | "BM_%d : Default Data not created\n"); | 3773 | status = beiscsi_create_def_hdr(phba, phwi_context, |
3657 | goto error; | 3774 | phwi_ctrlr, |
3775 | def_pdu_ring_sz, | ||
3776 | ulp_num); | ||
3777 | if (status != 0) { | ||
3778 | beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, | ||
3779 | "BM_%d : Default Header not created for ULP : %d\n", | ||
3780 | ulp_num); | ||
3781 | goto error; | ||
3782 | } | ||
3783 | |||
3784 | status = beiscsi_create_def_data(phba, phwi_context, | ||
3785 | phwi_ctrlr, | ||
3786 | def_pdu_ring_sz, | ||
3787 | ulp_num); | ||
3788 | if (status != 0) { | ||
3789 | beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, | ||
3790 | "BM_%d : Default Data not created for ULP : %d\n", | ||
3791 | ulp_num); | ||
3792 | goto error; | ||
3793 | } | ||
3794 | } | ||
3658 | } | 3795 | } |
3659 | 3796 | ||
3660 | status = beiscsi_post_pages(phba); | 3797 | status = beiscsi_post_pages(phba); |
@@ -3677,6 +3814,26 @@ static int hwi_init_port(struct beiscsi_hba *phba) | |||
3677 | goto error; | 3814 | goto error; |
3678 | } | 3815 | } |
3679 | 3816 | ||
3817 | for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) { | ||
3818 | uint16_t async_arr_idx = 0; | ||
3819 | |||
3820 | if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) { | ||
3821 | uint16_t cri = 0; | ||
3822 | struct hwi_async_pdu_context *pasync_ctx; | ||
3823 | |||
3824 | pasync_ctx = HWI_GET_ASYNC_PDU_CTX( | ||
3825 | phwi_ctrlr, ulp_num); | ||
3826 | for (cri = 0; cri < | ||
3827 | phba->params.cxns_per_ctrl; cri++) { | ||
3828 | if (ulp_num == BEISCSI_GET_ULP_FROM_CRI | ||
3829 | (phwi_ctrlr, cri)) | ||
3830 | pasync_ctx->cid_to_async_cri_map[ | ||
3831 | phwi_ctrlr->wrb_context[cri].cid] = | ||
3832 | async_arr_idx++; | ||
3833 | } | ||
3834 | } | ||
3835 | } | ||
3836 | |||
3680 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, | 3837 | beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT, |
3681 | "BM_%d : hwi_init_port success\n"); | 3838 | "BM_%d : hwi_init_port success\n"); |
3682 | return 0; | 3839 | return 0; |
@@ -3741,6 +3898,7 @@ static void beiscsi_free_mem(struct beiscsi_hba *phba) | |||
3741 | (unsigned long)mem_descr->mem_array[j - 1]. | 3898 | (unsigned long)mem_descr->mem_array[j - 1]. |
3742 | bus_address.u.a64.address); | 3899 | bus_address.u.a64.address); |
3743 | } | 3900 | } |
3901 | |||
3744 | kfree(mem_descr->mem_array); | 3902 | kfree(mem_descr->mem_array); |
3745 | mem_descr++; | 3903 | mem_descr++; |
3746 | } | 3904 | } |