diff options
author | Jayamohan Kallickal <jayamohank@serverengines.com> | 2010-07-21 18:54:53 -0400 |
---|---|---|
committer | James Bottomley <James.Bottomley@suse.de> | 2010-07-28 10:05:34 -0400 |
commit | e9b911935033ea9e28a2f7a274c9a81db1f8d91a (patch) | |
tree | e7e050c9e3ed9b4368305624834f930c29550c8a /drivers/scsi/be2iscsi/be_cmds.c | |
parent | 5db3f33d687c5a4ba589bf3af98c786399c6e213 (diff) |
[SCSI] be2iscsi: Adding crashdump support
These changes allow the driver to support crashdump. We need to reset the
chip incase of a crashdump
Signed-off-by: Jayamohan Kallickal <jayamohank@serverengines.com>
Reviewed-by: Mike Christie <michaelc@cs.wisc.edu>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'drivers/scsi/be2iscsi/be_cmds.c')
-rw-r--r-- | drivers/scsi/be2iscsi/be_cmds.c | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/drivers/scsi/be2iscsi/be_cmds.c b/drivers/scsi/be2iscsi/be_cmds.c index 9cc1f5573150..7c7537335c88 100644 --- a/drivers/scsi/be2iscsi/be_cmds.c +++ b/drivers/scsi/be2iscsi/be_cmds.c | |||
@@ -19,6 +19,86 @@ | |||
19 | #include "be_mgmt.h" | 19 | #include "be_mgmt.h" |
20 | #include "be_main.h" | 20 | #include "be_main.h" |
21 | 21 | ||
22 | int beiscsi_pci_soft_reset(struct beiscsi_hba *phba) | ||
23 | { | ||
24 | u32 sreset; | ||
25 | u8 *pci_reset_offset = 0; | ||
26 | u8 *pci_online0_offset = 0; | ||
27 | u8 *pci_online1_offset = 0; | ||
28 | u32 pconline0 = 0; | ||
29 | u32 pconline1 = 0; | ||
30 | u32 i; | ||
31 | |||
32 | pci_reset_offset = (u8 *)phba->pci_va + BE2_SOFT_RESET; | ||
33 | pci_online0_offset = (u8 *)phba->pci_va + BE2_PCI_ONLINE0; | ||
34 | pci_online1_offset = (u8 *)phba->pci_va + BE2_PCI_ONLINE1; | ||
35 | sreset = readl((void *)pci_reset_offset); | ||
36 | sreset |= BE2_SET_RESET; | ||
37 | writel(sreset, (void *)pci_reset_offset); | ||
38 | |||
39 | i = 0; | ||
40 | while (sreset & BE2_SET_RESET) { | ||
41 | if (i > 64) | ||
42 | break; | ||
43 | msleep(100); | ||
44 | sreset = readl((void *)pci_reset_offset); | ||
45 | i++; | ||
46 | } | ||
47 | |||
48 | if (sreset & BE2_SET_RESET) { | ||
49 | printk(KERN_ERR "Soft Reset did not deassert\n"); | ||
50 | return -EIO; | ||
51 | } | ||
52 | pconline1 = BE2_MPU_IRAM_ONLINE; | ||
53 | writel(pconline0, (void *)pci_online0_offset); | ||
54 | writel(pconline1, (void *)pci_online1_offset); | ||
55 | |||
56 | sreset = BE2_SET_RESET; | ||
57 | writel(sreset, (void *)pci_reset_offset); | ||
58 | |||
59 | i = 0; | ||
60 | while (sreset & BE2_SET_RESET) { | ||
61 | if (i > 64) | ||
62 | break; | ||
63 | msleep(1); | ||
64 | sreset = readl((void *)pci_reset_offset); | ||
65 | i++; | ||
66 | } | ||
67 | if (sreset & BE2_SET_RESET) { | ||
68 | printk(KERN_ERR "MPU Online Soft Reset did not deassert\n"); | ||
69 | return -EIO; | ||
70 | } | ||
71 | return 0; | ||
72 | } | ||
73 | |||
74 | int be_chk_reset_complete(struct beiscsi_hba *phba) | ||
75 | { | ||
76 | unsigned int num_loop; | ||
77 | u8 *mpu_sem = 0; | ||
78 | u32 status; | ||
79 | |||
80 | num_loop = 1000; | ||
81 | mpu_sem = (u8 *)phba->csr_va + MPU_EP_SEMAPHORE; | ||
82 | msleep(5000); | ||
83 | |||
84 | while (num_loop) { | ||
85 | status = readl((void *)mpu_sem); | ||
86 | |||
87 | if ((status & 0x80000000) || (status & 0x0000FFFF) == 0xC000) | ||
88 | break; | ||
89 | msleep(60); | ||
90 | num_loop--; | ||
91 | } | ||
92 | |||
93 | if ((status & 0x80000000) || (!num_loop)) { | ||
94 | printk(KERN_ERR "Failed in be_chk_reset_complete" | ||
95 | "status = 0x%x\n", status); | ||
96 | return -EIO; | ||
97 | } | ||
98 | |||
99 | return 0; | ||
100 | } | ||
101 | |||
22 | void be_mcc_notify(struct beiscsi_hba *phba) | 102 | void be_mcc_notify(struct beiscsi_hba *phba) |
23 | { | 103 | { |
24 | struct be_queue_info *mccq = &phba->ctrl.mcc_obj.q; | 104 | struct be_queue_info *mccq = &phba->ctrl.mcc_obj.q; |