diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-04-19 09:26:18 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-07-03 09:25:57 -0400 |
commit | ffd7858dd8ebb93fad700b830b3b9f6d024c9eac (patch) | |
tree | 0f8416eacc68fd86d56637505f6974cc47ff857c /drivers/scsi/arm | |
parent | 324b9337f246e5f00aad10220d8d4bc13f1922ed (diff) |
[ARM] rpc: acornscsi: convert hardware accessors to take 'AS_Host *'
Acked-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/scsi/arm')
-rw-r--r-- | drivers/scsi/arm/acornscsi.c | 243 |
1 files changed, 120 insertions, 123 deletions
diff --git a/drivers/scsi/arm/acornscsi.c b/drivers/scsi/arm/acornscsi.c index fa58d02ad0b8..157ac1bf16fc 100644 --- a/drivers/scsi/arm/acornscsi.c +++ b/drivers/scsi/arm/acornscsi.c | |||
@@ -203,44 +203,41 @@ static void acornscsi_abortcmd(AS_Host *host, unsigned char tag); | |||
203 | * Miscellaneous | 203 | * Miscellaneous |
204 | */ | 204 | */ |
205 | 205 | ||
206 | static inline void | 206 | static inline void sbic_arm_write(AS_Host *host, unsigned int reg, unsigned int value) |
207 | sbic_arm_write(unsigned int io_port, int reg, int value) | ||
208 | { | 207 | { |
209 | __raw_writeb(reg, io_port); | 208 | __raw_writeb(reg, host->scsi.io_port); |
210 | __raw_writeb(value, io_port + 4); | 209 | __raw_writeb(value, host->scsi.io_port + 4); |
211 | } | 210 | } |
212 | 211 | ||
213 | #define sbic_arm_writenext(io,val) \ | 212 | #define sbic_arm_writenext(host,val) \ |
214 | __raw_writeb((val), (io) + 4) | 213 | __raw_writeb((val), (host)->scsi.io_port + 4) |
215 | 214 | ||
216 | static inline | 215 | static inline int sbic_arm_read(AS_Host *host, unsigned int reg) |
217 | int sbic_arm_read(unsigned int io_port, int reg) | ||
218 | { | 216 | { |
219 | if(reg == SBIC_ASR) | 217 | if(reg == SBIC_ASR) |
220 | return __raw_readl(io_port) & 255; | 218 | return __raw_readl(host->scsi.io_port) & 255; |
221 | __raw_writeb(reg, io_port); | 219 | __raw_writeb(reg, host->scsi.io_port); |
222 | return __raw_readl(io_port + 4) & 255; | 220 | return __raw_readl(host->scsi.io_port + 4) & 255; |
223 | } | 221 | } |
224 | 222 | ||
225 | #define sbic_arm_readnext(io) \ | 223 | #define sbic_arm_readnext(host) \ |
226 | __raw_readb((io) + 4) | 224 | __raw_readb((host)->scsi.io_port + 4) |
227 | 225 | ||
228 | #ifdef USE_DMAC | 226 | #ifdef USE_DMAC |
229 | #define dmac_read(io_port,reg) \ | 227 | #define dmac_read(host,reg) \ |
230 | inb((io_port) + (reg)) | 228 | inb((host)->dma.io_port + (reg)) |
231 | 229 | ||
232 | #define dmac_write(io_port,reg,value) \ | 230 | #define dmac_write(host,reg,value) \ |
233 | ({ outb((value), (io_port) + (reg)); }) | 231 | ({ outb((value), (host)->dma.io_port + (reg)); }) |
234 | 232 | ||
235 | #define dmac_clearintr(io_port) \ | 233 | #define dmac_clearintr(host) \ |
236 | ({ outb(0, (io_port)); }) | 234 | ({ outb(0, (host)->dma.io_intr_clear); }) |
237 | 235 | ||
238 | static inline | 236 | static inline unsigned int dmac_address(AS_Host *host) |
239 | unsigned int dmac_address(unsigned int io_port) | ||
240 | { | 237 | { |
241 | return dmac_read(io_port, DMAC_TXADRHI) << 16 | | 238 | return dmac_read(host, DMAC_TXADRHI) << 16 | |
242 | dmac_read(io_port, DMAC_TXADRMD) << 8 | | 239 | dmac_read(host, DMAC_TXADRMD) << 8 | |
243 | dmac_read(io_port, DMAC_TXADRLO); | 240 | dmac_read(host, DMAC_TXADRLO); |
244 | } | 241 | } |
245 | 242 | ||
246 | static | 243 | static |
@@ -248,15 +245,15 @@ void acornscsi_dumpdma(AS_Host *host, char *where) | |||
248 | { | 245 | { |
249 | unsigned int mode, addr, len; | 246 | unsigned int mode, addr, len; |
250 | 247 | ||
251 | mode = dmac_read(host->dma.io_port, DMAC_MODECON); | 248 | mode = dmac_read(host, DMAC_MODECON); |
252 | addr = dmac_address(host->dma.io_port); | 249 | addr = dmac_address(host); |
253 | len = dmac_read(host->dma.io_port, DMAC_TXCNTHI) << 8 | | 250 | len = dmac_read(host, DMAC_TXCNTHI) << 8 | |
254 | dmac_read(host->dma.io_port, DMAC_TXCNTLO); | 251 | dmac_read(host, DMAC_TXCNTLO); |
255 | 252 | ||
256 | printk("scsi%d: %s: DMAC %02x @%06x+%04x msk %02x, ", | 253 | printk("scsi%d: %s: DMAC %02x @%06x+%04x msk %02x, ", |
257 | host->host->host_no, where, | 254 | host->host->host_no, where, |
258 | mode, addr, (len + 1) & 0xffff, | 255 | mode, addr, (len + 1) & 0xffff, |
259 | dmac_read(host->dma.io_port, DMAC_MASKREG)); | 256 | dmac_read(host, DMAC_MASKREG)); |
260 | 257 | ||
261 | printk("DMA @%06x, ", host->dma.start_addr); | 258 | printk("DMA @%06x, ", host->dma.start_addr); |
262 | printk("BH @%p +%04x, ", host->scsi.SCp.ptr, | 259 | printk("BH @%p +%04x, ", host->scsi.SCp.ptr, |
@@ -272,9 +269,9 @@ unsigned long acornscsi_sbic_xfcount(AS_Host *host) | |||
272 | { | 269 | { |
273 | unsigned long length; | 270 | unsigned long length; |
274 | 271 | ||
275 | length = sbic_arm_read(host->scsi.io_port, SBIC_TRANSCNTH) << 16; | 272 | length = sbic_arm_read(host, SBIC_TRANSCNTH) << 16; |
276 | length |= sbic_arm_readnext(host->scsi.io_port) << 8; | 273 | length |= sbic_arm_readnext(host) << 8; |
277 | length |= sbic_arm_readnext(host->scsi.io_port); | 274 | length |= sbic_arm_readnext(host); |
278 | 275 | ||
279 | return length; | 276 | return length; |
280 | } | 277 | } |
@@ -285,7 +282,7 @@ acornscsi_sbic_wait(AS_Host *host, int stat_mask, int stat, int timeout, char *m | |||
285 | int asr; | 282 | int asr; |
286 | 283 | ||
287 | do { | 284 | do { |
288 | asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR); | 285 | asr = sbic_arm_read(host, SBIC_ASR); |
289 | 286 | ||
290 | if ((asr & stat_mask) == stat) | 287 | if ((asr & stat_mask) == stat) |
291 | return 0; | 288 | return 0; |
@@ -304,7 +301,7 @@ int acornscsi_sbic_issuecmd(AS_Host *host, int command) | |||
304 | if (acornscsi_sbic_wait(host, ASR_CIP, 0, 1000, "issuing command")) | 301 | if (acornscsi_sbic_wait(host, ASR_CIP, 0, 1000, "issuing command")) |
305 | return -1; | 302 | return -1; |
306 | 303 | ||
307 | sbic_arm_write(host->scsi.io_port, SBIC_CMND, command); | 304 | sbic_arm_write(host, SBIC_CMND, command); |
308 | 305 | ||
309 | return 0; | 306 | return 0; |
310 | } | 307 | } |
@@ -353,12 +350,12 @@ void acornscsi_resetcard(AS_Host *host) | |||
353 | printk("scsi%d: timeout while resetting card\n", | 350 | printk("scsi%d: timeout while resetting card\n", |
354 | host->host->host_no); | 351 | host->host->host_no); |
355 | 352 | ||
356 | sbic_arm_read(host->scsi.io_port, SBIC_ASR); | 353 | sbic_arm_read(host, SBIC_ASR); |
357 | sbic_arm_read(host->scsi.io_port, SBIC_SSR); | 354 | sbic_arm_read(host, SBIC_SSR); |
358 | 355 | ||
359 | /* setup sbic - WD33C93A */ | 356 | /* setup sbic - WD33C93A */ |
360 | sbic_arm_write(host->scsi.io_port, SBIC_OWNID, OWNID_EAF | host->host->this_id); | 357 | sbic_arm_write(host, SBIC_OWNID, OWNID_EAF | host->host->this_id); |
361 | sbic_arm_write(host->scsi.io_port, SBIC_CMND, CMND_RESET); | 358 | sbic_arm_write(host, SBIC_CMND, CMND_RESET); |
362 | 359 | ||
363 | /* | 360 | /* |
364 | * Command should cause a reset interrupt | 361 | * Command should cause a reset interrupt |
@@ -374,26 +371,26 @@ void acornscsi_resetcard(AS_Host *host) | |||
374 | printk("scsi%d: timeout while resetting card\n", | 371 | printk("scsi%d: timeout while resetting card\n", |
375 | host->host->host_no); | 372 | host->host->host_no); |
376 | 373 | ||
377 | sbic_arm_read(host->scsi.io_port, SBIC_ASR); | 374 | sbic_arm_read(host, SBIC_ASR); |
378 | if (sbic_arm_read(host->scsi.io_port, SBIC_SSR) != 0x01) | 375 | if (sbic_arm_read(host, SBIC_SSR) != 0x01) |
379 | printk(KERN_CRIT "scsi%d: WD33C93A didn't give enhanced reset interrupt\n", | 376 | printk(KERN_CRIT "scsi%d: WD33C93A didn't give enhanced reset interrupt\n", |
380 | host->host->host_no); | 377 | host->host->host_no); |
381 | 378 | ||
382 | sbic_arm_write(host->scsi.io_port, SBIC_CTRL, INIT_SBICDMA | CTRL_IDI); | 379 | sbic_arm_write(host, SBIC_CTRL, INIT_SBICDMA | CTRL_IDI); |
383 | sbic_arm_write(host->scsi.io_port, SBIC_TIMEOUT, TIMEOUT_TIME); | 380 | sbic_arm_write(host, SBIC_TIMEOUT, TIMEOUT_TIME); |
384 | sbic_arm_write(host->scsi.io_port, SBIC_SYNCHTRANSFER, SYNCHTRANSFER_2DBA); | 381 | sbic_arm_write(host, SBIC_SYNCHTRANSFER, SYNCHTRANSFER_2DBA); |
385 | sbic_arm_write(host->scsi.io_port, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP); | 382 | sbic_arm_write(host, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP); |
386 | 383 | ||
387 | host->card.page_reg = 0x40; | 384 | host->card.page_reg = 0x40; |
388 | outb(host->card.page_reg, host->card.io_page); | 385 | outb(host->card.page_reg, host->card.io_page); |
389 | 386 | ||
390 | /* setup dmac - uPC71071 */ | 387 | /* setup dmac - uPC71071 */ |
391 | dmac_write(host->dma.io_port, DMAC_INIT, 0); | 388 | dmac_write(host, DMAC_INIT, 0); |
392 | #ifdef USE_DMAC | 389 | #ifdef USE_DMAC |
393 | dmac_write(host->dma.io_port, DMAC_INIT, INIT_8BIT); | 390 | dmac_write(host, DMAC_INIT, INIT_8BIT); |
394 | dmac_write(host->dma.io_port, DMAC_CHANNEL, CHANNEL_0); | 391 | dmac_write(host, DMAC_CHANNEL, CHANNEL_0); |
395 | dmac_write(host->dma.io_port, DMAC_DEVCON0, INIT_DEVCON0); | 392 | dmac_write(host, DMAC_DEVCON0, INIT_DEVCON0); |
396 | dmac_write(host->dma.io_port, DMAC_DEVCON1, INIT_DEVCON1); | 393 | dmac_write(host, DMAC_DEVCON1, INIT_DEVCON1); |
397 | #endif | 394 | #endif |
398 | 395 | ||
399 | host->SCpnt = NULL; | 396 | host->SCpnt = NULL; |
@@ -741,9 +738,9 @@ intr_ret_t acornscsi_kick(AS_Host *host) | |||
741 | * If we have an interrupt pending, then we may have been reselected. | 738 | * If we have an interrupt pending, then we may have been reselected. |
742 | * In this case, we don't want to write to the registers | 739 | * In this case, we don't want to write to the registers |
743 | */ | 740 | */ |
744 | if (!(sbic_arm_read(host->scsi.io_port, SBIC_ASR) & (ASR_INT|ASR_BSY|ASR_CIP))) { | 741 | if (!(sbic_arm_read(host, SBIC_ASR) & (ASR_INT|ASR_BSY|ASR_CIP))) { |
745 | sbic_arm_write(host->scsi.io_port, SBIC_DESTID, SCpnt->device->id); | 742 | sbic_arm_write(host, SBIC_DESTID, SCpnt->device->id); |
746 | sbic_arm_write(host->scsi.io_port, SBIC_CMND, CMND_SELWITHATN); | 743 | sbic_arm_write(host, SBIC_CMND, CMND_SELWITHATN); |
747 | } | 744 | } |
748 | 745 | ||
749 | /* | 746 | /* |
@@ -807,7 +804,7 @@ static void acornscsi_done(AS_Host *host, struct scsi_cmnd **SCpntp, | |||
807 | struct scsi_cmnd *SCpnt = *SCpntp; | 804 | struct scsi_cmnd *SCpnt = *SCpntp; |
808 | 805 | ||
809 | /* clean up */ | 806 | /* clean up */ |
810 | sbic_arm_write(host->scsi.io_port, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP); | 807 | sbic_arm_write(host, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP); |
811 | 808 | ||
812 | host->stats.fins += 1; | 809 | host->stats.fins += 1; |
813 | 810 | ||
@@ -1008,8 +1005,8 @@ void acornscsi_data_write(AS_Host *host, char *ptr, | |||
1008 | static inline | 1005 | static inline |
1009 | void acornscsi_dma_stop(AS_Host *host) | 1006 | void acornscsi_dma_stop(AS_Host *host) |
1010 | { | 1007 | { |
1011 | dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_ON); | 1008 | dmac_write(host, DMAC_MASKREG, MASK_ON); |
1012 | dmac_clearintr(host->dma.io_intr_clear); | 1009 | dmac_clearintr(host); |
1013 | 1010 | ||
1014 | #if (DEBUG & DEBUG_DMA) | 1011 | #if (DEBUG & DEBUG_DMA) |
1015 | DBG(host->SCpnt, acornscsi_dumpdma(host, "stop")); | 1012 | DBG(host->SCpnt, acornscsi_dumpdma(host, "stop")); |
@@ -1031,7 +1028,7 @@ void acornscsi_dma_setup(AS_Host *host, dmadir_t direction) | |||
1031 | 1028 | ||
1032 | host->dma.direction = direction; | 1029 | host->dma.direction = direction; |
1033 | 1030 | ||
1034 | dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_ON); | 1031 | dmac_write(host, DMAC_MASKREG, MASK_ON); |
1035 | 1032 | ||
1036 | if (direction == DMA_OUT) { | 1033 | if (direction == DMA_OUT) { |
1037 | #if (DEBUG & DEBUG_NO_WRITE) | 1034 | #if (DEBUG & DEBUG_NO_WRITE) |
@@ -1062,13 +1059,13 @@ void acornscsi_dma_setup(AS_Host *host, dmadir_t direction) | |||
1062 | length); | 1059 | length); |
1063 | 1060 | ||
1064 | length -= 1; | 1061 | length -= 1; |
1065 | dmac_write(host->dma.io_port, DMAC_TXCNTLO, length); | 1062 | dmac_write(host, DMAC_TXCNTLO, length); |
1066 | dmac_write(host->dma.io_port, DMAC_TXCNTHI, length >> 8); | 1063 | dmac_write(host, DMAC_TXCNTHI, length >> 8); |
1067 | dmac_write(host->dma.io_port, DMAC_TXADRLO, address); | 1064 | dmac_write(host, DMAC_TXADRLO, address); |
1068 | dmac_write(host->dma.io_port, DMAC_TXADRMD, address >> 8); | 1065 | dmac_write(host, DMAC_TXADRMD, address >> 8); |
1069 | dmac_write(host->dma.io_port, DMAC_TXADRHI, 0); | 1066 | dmac_write(host, DMAC_TXADRHI, 0); |
1070 | dmac_write(host->dma.io_port, DMAC_MODECON, mode); | 1067 | dmac_write(host, DMAC_MODECON, mode); |
1071 | dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_OFF); | 1068 | dmac_write(host, DMAC_MASKREG, MASK_OFF); |
1072 | 1069 | ||
1073 | #if (DEBUG & DEBUG_DMA) | 1070 | #if (DEBUG & DEBUG_DMA) |
1074 | DBG(host->SCpnt, acornscsi_dumpdma(host, "strt")); | 1071 | DBG(host->SCpnt, acornscsi_dumpdma(host, "strt")); |
@@ -1088,8 +1085,8 @@ void acornscsi_dma_setup(AS_Host *host, dmadir_t direction) | |||
1088 | static | 1085 | static |
1089 | void acornscsi_dma_cleanup(AS_Host *host) | 1086 | void acornscsi_dma_cleanup(AS_Host *host) |
1090 | { | 1087 | { |
1091 | dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_ON); | 1088 | dmac_write(host, DMAC_MASKREG, MASK_ON); |
1092 | dmac_clearintr(host->dma.io_intr_clear); | 1089 | dmac_clearintr(host); |
1093 | 1090 | ||
1094 | /* | 1091 | /* |
1095 | * Check for a pending transfer | 1092 | * Check for a pending transfer |
@@ -1116,7 +1113,7 @@ void acornscsi_dma_cleanup(AS_Host *host) | |||
1116 | /* | 1113 | /* |
1117 | * Calculate number of bytes transferred from DMA. | 1114 | * Calculate number of bytes transferred from DMA. |
1118 | */ | 1115 | */ |
1119 | transferred = dmac_address(host->dma.io_port) - host->dma.start_addr; | 1116 | transferred = dmac_address(host) - host->dma.start_addr; |
1120 | host->dma.transferred += transferred; | 1117 | host->dma.transferred += transferred; |
1121 | 1118 | ||
1122 | if (host->dma.direction == DMA_IN) | 1119 | if (host->dma.direction == DMA_IN) |
@@ -1152,13 +1149,13 @@ void acornscsi_dma_intr(AS_Host *host) | |||
1152 | DBG(host->SCpnt, acornscsi_dumpdma(host, "inti")); | 1149 | DBG(host->SCpnt, acornscsi_dumpdma(host, "inti")); |
1153 | #endif | 1150 | #endif |
1154 | 1151 | ||
1155 | dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_ON); | 1152 | dmac_write(host, DMAC_MASKREG, MASK_ON); |
1156 | dmac_clearintr(host->dma.io_intr_clear); | 1153 | dmac_clearintr(host); |
1157 | 1154 | ||
1158 | /* | 1155 | /* |
1159 | * Calculate amount transferred via DMA | 1156 | * Calculate amount transferred via DMA |
1160 | */ | 1157 | */ |
1161 | transferred = dmac_address(host->dma.io_port) - host->dma.start_addr; | 1158 | transferred = dmac_address(host) - host->dma.start_addr; |
1162 | host->dma.transferred += transferred; | 1159 | host->dma.transferred += transferred; |
1163 | 1160 | ||
1164 | /* | 1161 | /* |
@@ -1190,12 +1187,12 @@ void acornscsi_dma_intr(AS_Host *host) | |||
1190 | length); | 1187 | length); |
1191 | 1188 | ||
1192 | length -= 1; | 1189 | length -= 1; |
1193 | dmac_write(host->dma.io_port, DMAC_TXCNTLO, length); | 1190 | dmac_write(host, DMAC_TXCNTLO, length); |
1194 | dmac_write(host->dma.io_port, DMAC_TXCNTHI, length >> 8); | 1191 | dmac_write(host, DMAC_TXCNTHI, length >> 8); |
1195 | dmac_write(host->dma.io_port, DMAC_TXADRLO, address); | 1192 | dmac_write(host, DMAC_TXADRLO, address); |
1196 | dmac_write(host->dma.io_port, DMAC_TXADRMD, address >> 8); | 1193 | dmac_write(host, DMAC_TXADRMD, address >> 8); |
1197 | dmac_write(host->dma.io_port, DMAC_TXADRHI, 0); | 1194 | dmac_write(host, DMAC_TXADRHI, 0); |
1198 | dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_OFF); | 1195 | dmac_write(host, DMAC_MASKREG, MASK_OFF); |
1199 | 1196 | ||
1200 | #if (DEBUG & DEBUG_DMA) | 1197 | #if (DEBUG & DEBUG_DMA) |
1201 | DBG(host->SCpnt, acornscsi_dumpdma(host, "into")); | 1198 | DBG(host->SCpnt, acornscsi_dumpdma(host, "into")); |
@@ -1209,15 +1206,15 @@ void acornscsi_dma_intr(AS_Host *host) | |||
1209 | * attention condition. We continue giving one byte until | 1206 | * attention condition. We continue giving one byte until |
1210 | * the device recognises the attention. | 1207 | * the device recognises the attention. |
1211 | */ | 1208 | */ |
1212 | if (dmac_read(host->dma.io_port, DMAC_STATUS) & STATUS_RQ0) { | 1209 | if (dmac_read(host, DMAC_STATUS) & STATUS_RQ0) { |
1213 | acornscsi_abortcmd(host, host->SCpnt->tag); | 1210 | acornscsi_abortcmd(host, host->SCpnt->tag); |
1214 | 1211 | ||
1215 | dmac_write(host->dma.io_port, DMAC_TXCNTLO, 0); | 1212 | dmac_write(host, DMAC_TXCNTLO, 0); |
1216 | dmac_write(host->dma.io_port, DMAC_TXCNTHI, 0); | 1213 | dmac_write(host, DMAC_TXCNTHI, 0); |
1217 | dmac_write(host->dma.io_port, DMAC_TXADRLO, 0); | 1214 | dmac_write(host, DMAC_TXADRLO, 0); |
1218 | dmac_write(host->dma.io_port, DMAC_TXADRMD, 0); | 1215 | dmac_write(host, DMAC_TXADRMD, 0); |
1219 | dmac_write(host->dma.io_port, DMAC_TXADRHI, 0); | 1216 | dmac_write(host, DMAC_TXADRHI, 0); |
1220 | dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_OFF); | 1217 | dmac_write(host, DMAC_MASKREG, MASK_OFF); |
1221 | } | 1218 | } |
1222 | #endif | 1219 | #endif |
1223 | } | 1220 | } |
@@ -1271,9 +1268,9 @@ void acornscsi_dma_adjust(AS_Host *host) | |||
1271 | host->dma.xfer_setup = 0; | 1268 | host->dma.xfer_setup = 0; |
1272 | else { | 1269 | else { |
1273 | transferred += host->dma.start_addr; | 1270 | transferred += host->dma.start_addr; |
1274 | dmac_write(host->dma.io_port, DMAC_TXADRLO, transferred); | 1271 | dmac_write(host, DMAC_TXADRLO, transferred); |
1275 | dmac_write(host->dma.io_port, DMAC_TXADRMD, transferred >> 8); | 1272 | dmac_write(host, DMAC_TXADRMD, transferred >> 8); |
1276 | dmac_write(host->dma.io_port, DMAC_TXADRHI, transferred >> 16); | 1273 | dmac_write(host, DMAC_TXADRHI, transferred >> 16); |
1277 | #if (DEBUG & (DEBUG_DMA|DEBUG_WRITE)) | 1274 | #if (DEBUG & (DEBUG_DMA|DEBUG_WRITE)) |
1278 | DBG(host->SCpnt, acornscsi_dumpdma(host, "adjo")); | 1275 | DBG(host->SCpnt, acornscsi_dumpdma(host, "adjo")); |
1279 | #endif | 1276 | #endif |
@@ -1292,12 +1289,12 @@ acornscsi_write_pio(AS_Host *host, char *bytes, int *ptr, int len, unsigned int | |||
1292 | int my_ptr = *ptr; | 1289 | int my_ptr = *ptr; |
1293 | 1290 | ||
1294 | while (my_ptr < len) { | 1291 | while (my_ptr < len) { |
1295 | asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR); | 1292 | asr = sbic_arm_read(host, SBIC_ASR); |
1296 | 1293 | ||
1297 | if (asr & ASR_DBR) { | 1294 | if (asr & ASR_DBR) { |
1298 | timeout = max_timeout; | 1295 | timeout = max_timeout; |
1299 | 1296 | ||
1300 | sbic_arm_write(host->scsi.io_port, SBIC_DATA, bytes[my_ptr++]); | 1297 | sbic_arm_write(host, SBIC_DATA, bytes[my_ptr++]); |
1301 | } else if (asr & ASR_INT) | 1298 | } else if (asr & ASR_INT) |
1302 | break; | 1299 | break; |
1303 | else if (--timeout == 0) | 1300 | else if (--timeout == 0) |
@@ -1320,9 +1317,9 @@ acornscsi_sendcommand(AS_Host *host) | |||
1320 | { | 1317 | { |
1321 | struct scsi_cmnd *SCpnt = host->SCpnt; | 1318 | struct scsi_cmnd *SCpnt = host->SCpnt; |
1322 | 1319 | ||
1323 | sbic_arm_write(host->scsi.io_port, SBIC_TRANSCNTH, 0); | 1320 | sbic_arm_write(host, SBIC_TRANSCNTH, 0); |
1324 | sbic_arm_writenext(host->scsi.io_port, 0); | 1321 | sbic_arm_writenext(host, 0); |
1325 | sbic_arm_writenext(host->scsi.io_port, SCpnt->cmd_len - host->scsi.SCp.sent_command); | 1322 | sbic_arm_writenext(host, SCpnt->cmd_len - host->scsi.SCp.sent_command); |
1326 | 1323 | ||
1327 | acornscsi_sbic_issuecmd(host, CMND_XFERINFO); | 1324 | acornscsi_sbic_issuecmd(host, CMND_XFERINFO); |
1328 | 1325 | ||
@@ -1351,7 +1348,7 @@ void acornscsi_sendmessage(AS_Host *host) | |||
1351 | 1348 | ||
1352 | acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "sending message 1"); | 1349 | acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "sending message 1"); |
1353 | 1350 | ||
1354 | sbic_arm_write(host->scsi.io_port, SBIC_DATA, NOP); | 1351 | sbic_arm_write(host, SBIC_DATA, NOP); |
1355 | 1352 | ||
1356 | host->scsi.last_message = NOP; | 1353 | host->scsi.last_message = NOP; |
1357 | #if (DEBUG & DEBUG_MESSAGES) | 1354 | #if (DEBUG & DEBUG_MESSAGES) |
@@ -1365,7 +1362,7 @@ void acornscsi_sendmessage(AS_Host *host) | |||
1365 | 1362 | ||
1366 | acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "sending message 2"); | 1363 | acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "sending message 2"); |
1367 | 1364 | ||
1368 | sbic_arm_write(host->scsi.io_port, SBIC_DATA, msg->msg[0]); | 1365 | sbic_arm_write(host, SBIC_DATA, msg->msg[0]); |
1369 | 1366 | ||
1370 | host->scsi.last_message = msg->msg[0]; | 1367 | host->scsi.last_message = msg->msg[0]; |
1371 | #if (DEBUG & DEBUG_MESSAGES) | 1368 | #if (DEBUG & DEBUG_MESSAGES) |
@@ -1382,9 +1379,9 @@ void acornscsi_sendmessage(AS_Host *host) | |||
1382 | * initiator. This provides an interlock so that the | 1379 | * initiator. This provides an interlock so that the |
1383 | * initiator can determine which message byte is rejected. | 1380 | * initiator can determine which message byte is rejected. |
1384 | */ | 1381 | */ |
1385 | sbic_arm_write(host->scsi.io_port, SBIC_TRANSCNTH, 0); | 1382 | sbic_arm_write(host, SBIC_TRANSCNTH, 0); |
1386 | sbic_arm_writenext(host->scsi.io_port, 0); | 1383 | sbic_arm_writenext(host, 0); |
1387 | sbic_arm_writenext(host->scsi.io_port, message_length); | 1384 | sbic_arm_writenext(host, message_length); |
1388 | acornscsi_sbic_issuecmd(host, CMND_XFERINFO); | 1385 | acornscsi_sbic_issuecmd(host, CMND_XFERINFO); |
1389 | 1386 | ||
1390 | msgnr = 0; | 1387 | msgnr = 0; |
@@ -1421,7 +1418,7 @@ void acornscsi_readstatusbyte(AS_Host *host) | |||
1421 | { | 1418 | { |
1422 | acornscsi_sbic_issuecmd(host, CMND_XFERINFO|CMND_SBT); | 1419 | acornscsi_sbic_issuecmd(host, CMND_XFERINFO|CMND_SBT); |
1423 | acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "reading status byte"); | 1420 | acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "reading status byte"); |
1424 | host->scsi.SCp.Status = sbic_arm_read(host->scsi.io_port, SBIC_DATA); | 1421 | host->scsi.SCp.Status = sbic_arm_read(host, SBIC_DATA); |
1425 | } | 1422 | } |
1426 | 1423 | ||
1427 | /* | 1424 | /* |
@@ -1438,12 +1435,12 @@ unsigned char acornscsi_readmessagebyte(AS_Host *host) | |||
1438 | 1435 | ||
1439 | acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "for message byte"); | 1436 | acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "for message byte"); |
1440 | 1437 | ||
1441 | message = sbic_arm_read(host->scsi.io_port, SBIC_DATA); | 1438 | message = sbic_arm_read(host, SBIC_DATA); |
1442 | 1439 | ||
1443 | /* wait for MSGIN-XFER-PAUSED */ | 1440 | /* wait for MSGIN-XFER-PAUSED */ |
1444 | acornscsi_sbic_wait(host, ASR_INT, ASR_INT, 1000, "for interrupt after message byte"); | 1441 | acornscsi_sbic_wait(host, ASR_INT, ASR_INT, 1000, "for interrupt after message byte"); |
1445 | 1442 | ||
1446 | sbic_arm_read(host->scsi.io_port, SBIC_SSR); | 1443 | sbic_arm_read(host, SBIC_SSR); |
1447 | 1444 | ||
1448 | return message; | 1445 | return message; |
1449 | } | 1446 | } |
@@ -1480,7 +1477,7 @@ void acornscsi_message(AS_Host *host) | |||
1480 | 1477 | ||
1481 | /* wait for next msg-in */ | 1478 | /* wait for next msg-in */ |
1482 | acornscsi_sbic_wait(host, ASR_INT, ASR_INT, 1000, "for interrupt after negate ack"); | 1479 | acornscsi_sbic_wait(host, ASR_INT, ASR_INT, 1000, "for interrupt after negate ack"); |
1483 | sbic_arm_read(host->scsi.io_port, SBIC_SSR); | 1480 | sbic_arm_read(host, SBIC_SSR); |
1484 | } | 1481 | } |
1485 | } while (msgidx < msglen); | 1482 | } while (msgidx < msglen); |
1486 | 1483 | ||
@@ -1602,7 +1599,7 @@ void acornscsi_message(AS_Host *host) | |||
1602 | host->host->host_no, acornscsi_target(host)); | 1599 | host->host->host_no, acornscsi_target(host)); |
1603 | host->device[host->SCpnt->device->id].sync_xfer = SYNCHTRANSFER_2DBA; | 1600 | host->device[host->SCpnt->device->id].sync_xfer = SYNCHTRANSFER_2DBA; |
1604 | host->device[host->SCpnt->device->id].sync_state = SYNC_ASYNCHRONOUS; | 1601 | host->device[host->SCpnt->device->id].sync_state = SYNC_ASYNCHRONOUS; |
1605 | sbic_arm_write(host->scsi.io_port, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer); | 1602 | sbic_arm_write(host, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer); |
1606 | break; | 1603 | break; |
1607 | 1604 | ||
1608 | default: | 1605 | default: |
@@ -1652,7 +1649,7 @@ void acornscsi_message(AS_Host *host) | |||
1652 | host->device[host->SCpnt->device->id].sync_xfer = | 1649 | host->device[host->SCpnt->device->id].sync_xfer = |
1653 | calc_sync_xfer(period * 4, length); | 1650 | calc_sync_xfer(period * 4, length); |
1654 | } | 1651 | } |
1655 | sbic_arm_write(host->scsi.io_port, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer); | 1652 | sbic_arm_write(host, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer); |
1656 | break; | 1653 | break; |
1657 | #else | 1654 | #else |
1658 | /* We do not accept synchronous transfers. Respond with a | 1655 | /* We do not accept synchronous transfers. Respond with a |
@@ -1792,10 +1789,10 @@ int acornscsi_starttransfer(AS_Host *host) | |||
1792 | 1789 | ||
1793 | residual = scsi_bufflen(host->SCpnt) - host->scsi.SCp.scsi_xferred; | 1790 | residual = scsi_bufflen(host->SCpnt) - host->scsi.SCp.scsi_xferred; |
1794 | 1791 | ||
1795 | sbic_arm_write(host->scsi.io_port, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer); | 1792 | sbic_arm_write(host, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer); |
1796 | sbic_arm_writenext(host->scsi.io_port, residual >> 16); | 1793 | sbic_arm_writenext(host, residual >> 16); |
1797 | sbic_arm_writenext(host->scsi.io_port, residual >> 8); | 1794 | sbic_arm_writenext(host, residual >> 8); |
1798 | sbic_arm_writenext(host->scsi.io_port, residual); | 1795 | sbic_arm_writenext(host, residual); |
1799 | acornscsi_sbic_issuecmd(host, CMND_XFERINFO); | 1796 | acornscsi_sbic_issuecmd(host, CMND_XFERINFO); |
1800 | return 1; | 1797 | return 1; |
1801 | } | 1798 | } |
@@ -1816,7 +1813,7 @@ int acornscsi_reconnect(AS_Host *host) | |||
1816 | { | 1813 | { |
1817 | unsigned int target, lun, ok = 0; | 1814 | unsigned int target, lun, ok = 0; |
1818 | 1815 | ||
1819 | target = sbic_arm_read(host->scsi.io_port, SBIC_SOURCEID); | 1816 | target = sbic_arm_read(host, SBIC_SOURCEID); |
1820 | 1817 | ||
1821 | if (!(target & 8)) | 1818 | if (!(target & 8)) |
1822 | printk(KERN_ERR "scsi%d: invalid source id after reselection " | 1819 | printk(KERN_ERR "scsi%d: invalid source id after reselection " |
@@ -1832,7 +1829,7 @@ int acornscsi_reconnect(AS_Host *host) | |||
1832 | host->SCpnt = NULL; | 1829 | host->SCpnt = NULL; |
1833 | } | 1830 | } |
1834 | 1831 | ||
1835 | lun = sbic_arm_read(host->scsi.io_port, SBIC_DATA) & 7; | 1832 | lun = sbic_arm_read(host, SBIC_DATA) & 7; |
1836 | 1833 | ||
1837 | host->scsi.reconnected.target = target; | 1834 | host->scsi.reconnected.target = target; |
1838 | host->scsi.reconnected.lun = lun; | 1835 | host->scsi.reconnected.lun = lun; |
@@ -1952,7 +1949,7 @@ static | |||
1952 | void acornscsi_abortcmd(AS_Host *host, unsigned char tag) | 1949 | void acornscsi_abortcmd(AS_Host *host, unsigned char tag) |
1953 | { | 1950 | { |
1954 | host->scsi.phase = PHASE_ABORTED; | 1951 | host->scsi.phase = PHASE_ABORTED; |
1955 | sbic_arm_write(host->scsi.io_port, SBIC_CMND, CMND_ASSERTATN); | 1952 | sbic_arm_write(host, SBIC_CMND, CMND_ASSERTATN); |
1956 | 1953 | ||
1957 | msgqueue_flush(&host->scsi.msgs); | 1954 | msgqueue_flush(&host->scsi.msgs); |
1958 | #ifdef CONFIG_SCSI_ACORNSCSI_TAGGED_QUEUE | 1955 | #ifdef CONFIG_SCSI_ACORNSCSI_TAGGED_QUEUE |
@@ -1979,11 +1976,11 @@ intr_ret_t acornscsi_sbicintr(AS_Host *host, int in_irq) | |||
1979 | { | 1976 | { |
1980 | unsigned int asr, ssr; | 1977 | unsigned int asr, ssr; |
1981 | 1978 | ||
1982 | asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR); | 1979 | asr = sbic_arm_read(host, SBIC_ASR); |
1983 | if (!(asr & ASR_INT)) | 1980 | if (!(asr & ASR_INT)) |
1984 | return INTR_IDLE; | 1981 | return INTR_IDLE; |
1985 | 1982 | ||
1986 | ssr = sbic_arm_read(host->scsi.io_port, SBIC_SSR); | 1983 | ssr = sbic_arm_read(host, SBIC_SSR); |
1987 | 1984 | ||
1988 | #if (DEBUG & DEBUG_PHASES) | 1985 | #if (DEBUG & DEBUG_PHASES) |
1989 | print_sbic_status(asr, ssr, host->scsi.phase); | 1986 | print_sbic_status(asr, ssr, host->scsi.phase); |
@@ -1999,15 +1996,15 @@ intr_ret_t acornscsi_sbicintr(AS_Host *host, int in_irq) | |||
1999 | printk(KERN_ERR "scsi%d: reset in standard mode but wanted advanced mode.\n", | 1996 | printk(KERN_ERR "scsi%d: reset in standard mode but wanted advanced mode.\n", |
2000 | host->host->host_no); | 1997 | host->host->host_no); |
2001 | /* setup sbic - WD33C93A */ | 1998 | /* setup sbic - WD33C93A */ |
2002 | sbic_arm_write(host->scsi.io_port, SBIC_OWNID, OWNID_EAF | host->host->this_id); | 1999 | sbic_arm_write(host, SBIC_OWNID, OWNID_EAF | host->host->this_id); |
2003 | sbic_arm_write(host->scsi.io_port, SBIC_CMND, CMND_RESET); | 2000 | sbic_arm_write(host, SBIC_CMND, CMND_RESET); |
2004 | return INTR_IDLE; | 2001 | return INTR_IDLE; |
2005 | 2002 | ||
2006 | case 0x01: /* reset state - advanced */ | 2003 | case 0x01: /* reset state - advanced */ |
2007 | sbic_arm_write(host->scsi.io_port, SBIC_CTRL, INIT_SBICDMA | CTRL_IDI); | 2004 | sbic_arm_write(host, SBIC_CTRL, INIT_SBICDMA | CTRL_IDI); |
2008 | sbic_arm_write(host->scsi.io_port, SBIC_TIMEOUT, TIMEOUT_TIME); | 2005 | sbic_arm_write(host, SBIC_TIMEOUT, TIMEOUT_TIME); |
2009 | sbic_arm_write(host->scsi.io_port, SBIC_SYNCHTRANSFER, SYNCHTRANSFER_2DBA); | 2006 | sbic_arm_write(host, SBIC_SYNCHTRANSFER, SYNCHTRANSFER_2DBA); |
2010 | sbic_arm_write(host->scsi.io_port, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP); | 2007 | sbic_arm_write(host, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP); |
2011 | msgqueue_flush(&host->scsi.msgs); | 2008 | msgqueue_flush(&host->scsi.msgs); |
2012 | return INTR_IDLE; | 2009 | return INTR_IDLE; |
2013 | 2010 | ||
@@ -2025,10 +2022,10 @@ intr_ret_t acornscsi_sbicintr(AS_Host *host, int in_irq) | |||
2025 | msgqueue_flush(&host->scsi.msgs); | 2022 | msgqueue_flush(&host->scsi.msgs); |
2026 | host->dma.transferred = host->scsi.SCp.scsi_xferred; | 2023 | host->dma.transferred = host->scsi.SCp.scsi_xferred; |
2027 | /* 33C93 gives next interrupt indicating bus phase */ | 2024 | /* 33C93 gives next interrupt indicating bus phase */ |
2028 | asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR); | 2025 | asr = sbic_arm_read(host, SBIC_ASR); |
2029 | if (!(asr & ASR_INT)) | 2026 | if (!(asr & ASR_INT)) |
2030 | break; | 2027 | break; |
2031 | ssr = sbic_arm_read(host->scsi.io_port, SBIC_SSR); | 2028 | ssr = sbic_arm_read(host, SBIC_SSR); |
2032 | ADD_STATUS(8, ssr, host->scsi.phase, 1); | 2029 | ADD_STATUS(8, ssr, host->scsi.phase, 1); |
2033 | ADD_STATUS(host->SCpnt->device->id, ssr, host->scsi.phase, 1); | 2030 | ADD_STATUS(host->SCpnt->device->id, ssr, host->scsi.phase, 1); |
2034 | goto connected; | 2031 | goto connected; |
@@ -2655,7 +2652,7 @@ static enum res_abort acornscsi_do_abort(AS_Host *host, struct scsi_cmnd *SCpnt) | |||
2655 | * busylun bit. | 2652 | * busylun bit. |
2656 | */ | 2653 | */ |
2657 | case PHASE_CONNECTED: | 2654 | case PHASE_CONNECTED: |
2658 | sbic_arm_write(host->scsi.io_port, SBIC_CMND, CMND_DISCONNECT); | 2655 | sbic_arm_write(host, SBIC_CMND, CMND_DISCONNECT); |
2659 | host->SCpnt = NULL; | 2656 | host->SCpnt = NULL; |
2660 | res = res_success_clear; | 2657 | res = res_success_clear; |
2661 | break; | 2658 | break; |
@@ -2699,8 +2696,8 @@ int acornscsi_abort(struct scsi_cmnd *SCpnt) | |||
2699 | #if (DEBUG & DEBUG_ABORT) | 2696 | #if (DEBUG & DEBUG_ABORT) |
2700 | { | 2697 | { |
2701 | int asr, ssr; | 2698 | int asr, ssr; |
2702 | asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR); | 2699 | asr = sbic_arm_read(host, SBIC_ASR); |
2703 | ssr = sbic_arm_read(host->scsi.io_port, SBIC_SSR); | 2700 | ssr = sbic_arm_read(host, SBIC_SSR); |
2704 | 2701 | ||
2705 | printk(KERN_WARNING "acornscsi_abort: "); | 2702 | printk(KERN_WARNING "acornscsi_abort: "); |
2706 | print_sbic_status(asr, ssr, host->scsi.phase); | 2703 | print_sbic_status(asr, ssr, host->scsi.phase); |
@@ -2780,8 +2777,8 @@ int acornscsi_bus_reset(struct scsi_cmnd *SCpnt) | |||
2780 | { | 2777 | { |
2781 | int asr, ssr; | 2778 | int asr, ssr; |
2782 | 2779 | ||
2783 | asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR); | 2780 | asr = sbic_arm_read(host, SBIC_ASR); |
2784 | ssr = sbic_arm_read(host->scsi.io_port, SBIC_SSR); | 2781 | ssr = sbic_arm_read(host, SBIC_SSR); |
2785 | 2782 | ||
2786 | printk(KERN_WARNING "acornscsi_reset: "); | 2783 | printk(KERN_WARNING "acornscsi_reset: "); |
2787 | print_sbic_status(asr, ssr, host->scsi.phase); | 2784 | print_sbic_status(asr, ssr, host->scsi.phase); |