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authorNick Cheng <nick.cheng@areca.com.tw>2010-06-18 03:39:12 -0400
committerJames Bottomley <James.Bottomley@suse.de>2010-07-27 13:01:53 -0400
commitae52e7f09ff509df11cd408eabe90132b6be1231 (patch)
tree601dd812c670fe1c586a514a6785324855fdc098 /drivers/scsi/arcmsr
parentf034260db330bb3ffc815fcb682b1c84aca09591 (diff)
[SCSI] arcmsr: Support 1024 scatter-gather list entries and improve AP while FW trapped and behaviors of EHs
1. To support 4M/1024 scatter-gather list entry, reorganize struct ARCMSR_CDB and struct CommandControlBlock 2. To modify arcmsr_probe 3. In order to help fix F/W issue, add the driver mode for type B card 4. To improve AP's behavior while F/W resets 5. To unify struct MessageUnit_B's members' naming in all OS drivers' 6. To improve error handlers, arcmsr_bus_reset(), arcmsr_abort() 7. To fix the arcmsr_queue_command() in bus reset stage, just let the commands pass down to FW, don't block Signed-off-by: Nick Cheng <nick.cheng@areca.com.tw> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'drivers/scsi/arcmsr')
-rw-r--r--drivers/scsi/arcmsr/arcmsr.h135
-rw-r--r--drivers/scsi/arcmsr/arcmsr_hba.c1225
2 files changed, 677 insertions, 683 deletions
diff --git a/drivers/scsi/arcmsr/arcmsr.h b/drivers/scsi/arcmsr/arcmsr.h
index ce5371b3cdd5..c0861c05cd49 100644
--- a/drivers/scsi/arcmsr/arcmsr.h
+++ b/drivers/scsi/arcmsr/arcmsr.h
@@ -48,16 +48,22 @@ struct device_attribute;
48/*The limit of outstanding scsi command that firmware can handle*/ 48/*The limit of outstanding scsi command that firmware can handle*/
49#define ARCMSR_MAX_OUTSTANDING_CMD 256 49#define ARCMSR_MAX_OUTSTANDING_CMD 256
50#define ARCMSR_MAX_FREECCB_NUM 320 50#define ARCMSR_MAX_FREECCB_NUM 320
51#define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.15 2008/11/03" 51#define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.15 2009/12/09"
52#define ARCMSR_SCSI_INITIATOR_ID 255 52#define ARCMSR_SCSI_INITIATOR_ID 255
53#define ARCMSR_MAX_XFER_SECTORS 512 53#define ARCMSR_MAX_XFER_SECTORS 512
54#define ARCMSR_MAX_XFER_SECTORS_B 4096 54#define ARCMSR_MAX_XFER_SECTORS_B 4096
55#define ARCMSR_MAX_XFER_SECTORS_C 304
55#define ARCMSR_MAX_TARGETID 17 56#define ARCMSR_MAX_TARGETID 17
56#define ARCMSR_MAX_TARGETLUN 8 57#define ARCMSR_MAX_TARGETLUN 8
57#define ARCMSR_MAX_CMD_PERLUN ARCMSR_MAX_OUTSTANDING_CMD 58#define ARCMSR_MAX_CMD_PERLUN ARCMSR_MAX_OUTSTANDING_CMD
58#define ARCMSR_MAX_QBUFFER 4096 59#define ARCMSR_MAX_QBUFFER 4096
59#define ARCMSR_MAX_SG_ENTRIES 38 60#define ARCMSR_DEFAULT_SG_ENTRIES 38
60#define ARCMSR_MAX_HBB_POSTQUEUE 264 61#define ARCMSR_MAX_HBB_POSTQUEUE 264
62#define ARCMSR_MAX_XFER_LEN 0x26000 /* 152K */
63#define ARCMSR_CDB_SG_PAGE_LENGTH 256
64#ifndef PCI_DEVICE_ID_ARECA_1880
65#define PCI_DEVICE_ID_ARECA_1880 0x1880
66 #endif
61/* 67/*
62********************************************************************************** 68**********************************************************************************
63** 69**
@@ -141,26 +147,19 @@ struct CMD_MESSAGE_FIELD
141** structure for holding DMA address data 147** structure for holding DMA address data
142************************************************************* 148*************************************************************
143*/ 149*/
150#define IS_DMA64 (sizeof(dma_addr_t) == 8)
144#define IS_SG64_ADDR 0x01000000 /* bit24 */ 151#define IS_SG64_ADDR 0x01000000 /* bit24 */
145struct SG32ENTRY 152struct SG32ENTRY
146{ 153{
147 __le32 length; 154 __le32 length;
148 __le32 address; 155 __le32 address;
149}; 156} __attribute__ ((packed));
150struct SG64ENTRY 157struct SG64ENTRY
151{ 158{
152 __le32 length; 159 __le32 length;
153 __le32 address; 160 __le32 address;
154 __le32 addresshigh; 161 __le32 addresshigh;
155}; 162} __attribute__ ((packed));
156struct SGENTRY_UNION
157{
158 union
159 {
160 struct SG32ENTRY sg32entry;
161 struct SG64ENTRY sg64entry;
162 }u;
163};
164/* 163/*
165******************************************************************** 164********************************************************************
166** Q Buffer of IOP Message Transfer 165** Q Buffer of IOP Message Transfer
@@ -187,6 +186,9 @@ struct FIRMWARE_INFO
187 char model[8]; /*15, 60-67*/ 186 char model[8]; /*15, 60-67*/
188 char firmware_ver[16]; /*17, 68-83*/ 187 char firmware_ver[16]; /*17, 68-83*/
189 char device_map[16]; /*21, 84-99*/ 188 char device_map[16]; /*21, 84-99*/
189 uint32_t cfgVersion; /*25,100-103 Added for checking of new firmware capability*/
190 uint8_t cfgSerial[16]; /*26,104-119*/
191 uint32_t cfgPicStatus; /*30,120-123*/
190}; 192};
191/* signature of set and get firmware config */ 193/* signature of set and get firmware config */
192#define ARCMSR_SIGNATURE_GET_CONFIG 0x87974060 194#define ARCMSR_SIGNATURE_GET_CONFIG 0x87974060
@@ -213,6 +215,8 @@ struct FIRMWARE_INFO
213#define ARCMSR_CCBREPLY_FLAG_ERROR 0x10000000 215#define ARCMSR_CCBREPLY_FLAG_ERROR 0x10000000
214/* outbound firmware ok */ 216/* outbound firmware ok */
215#define ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK 0x80000000 217#define ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK 0x80000000
218/* ARC-1680 Bus Reset*/
219#define ARCMSR_ARC1680_BUS_RESET 0x00000003
216 220
217/* 221/*
218************************************************************************ 222************************************************************************
@@ -264,11 +268,11 @@ struct FIRMWARE_INFO
264 268
265/* data tunnel buffer between user space program and its firmware */ 269/* data tunnel buffer between user space program and its firmware */
266/* user space data to iop 128bytes */ 270/* user space data to iop 128bytes */
267#define ARCMSR_IOCTL_WBUFFER 0x0000fe00 271#define ARCMSR_MESSAGE_WBUFFER 0x0000fe00
268/* iop data to user space 128bytes */ 272/* iop data to user space 128bytes */
269#define ARCMSR_IOCTL_RBUFFER 0x0000ff00 273#define ARCMSR_MESSAGE_RBUFFER 0x0000ff00
270/* iop message_rwbuffer for message command */ 274/* iop message_rwbuffer for message command */
271#define ARCMSR_MSGCODE_RWBUFFER 0x0000fa00 275#define ARCMSR_MESSAGE_RWBUFFER 0x0000fa00
272/* 276/*
273******************************************************************************* 277*******************************************************************************
274** ARECA SCSI COMMAND DESCRIPTOR BLOCK size 0x1F8 (504) 278** ARECA SCSI COMMAND DESCRIPTOR BLOCK size 0x1F8 (504)
@@ -290,7 +294,7 @@ struct ARCMSR_CDB
290#define ARCMSR_CDB_FLAG_HEADQ 0x08 294#define ARCMSR_CDB_FLAG_HEADQ 0x08
291#define ARCMSR_CDB_FLAG_ORDEREDQ 0x10 295#define ARCMSR_CDB_FLAG_ORDEREDQ 0x10
292 296
293 uint8_t Reserved1; 297 uint8_t msgPages;
294 uint32_t Context; 298 uint32_t Context;
295 uint32_t DataLength; 299 uint32_t DataLength;
296 uint8_t Cdb[16]; 300 uint8_t Cdb[16];
@@ -303,10 +307,10 @@ struct ARCMSR_CDB
303 uint8_t SenseData[15]; 307 uint8_t SenseData[15];
304 union 308 union
305 { 309 {
306 struct SG32ENTRY sg32entry[ARCMSR_MAX_SG_ENTRIES]; 310 struct SG32ENTRY sg32entry[1];
307 struct SG64ENTRY sg64entry[ARCMSR_MAX_SG_ENTRIES]; 311 struct SG64ENTRY sg64entry[1];
308 } u; 312 } u;
309}; 313} __attribute__ ((packed));
310/* 314/*
311******************************************************************************* 315*******************************************************************************
312** Messaging Unit (MU) of the Intel R 80331 I/O processor(Type A) and Type B processor 316** Messaging Unit (MU) of the Intel R 80331 I/O processor(Type A) and Type B processor
@@ -344,13 +348,13 @@ struct MessageUnit_B
344 uint32_t done_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE]; 348 uint32_t done_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE];
345 uint32_t postq_index; 349 uint32_t postq_index;
346 uint32_t doneq_index; 350 uint32_t doneq_index;
347 uint32_t __iomem *drv2iop_doorbell_reg; 351 uint32_t __iomem *drv2iop_doorbell;
348 uint32_t __iomem *drv2iop_doorbell_mask_reg; 352 uint32_t __iomem *drv2iop_doorbell_mask;
349 uint32_t __iomem *iop2drv_doorbell_reg; 353 uint32_t __iomem *iop2drv_doorbell;
350 uint32_t __iomem *iop2drv_doorbell_mask_reg; 354 uint32_t __iomem *iop2drv_doorbell_mask;
351 uint32_t __iomem *msgcode_rwbuffer_reg; 355 uint32_t __iomem *message_rwbuffer;
352 uint32_t __iomem *ioctl_wbuffer_reg; 356 uint32_t __iomem *message_wbuffer;
353 uint32_t __iomem *ioctl_rbuffer_reg; 357 uint32_t __iomem *message_rbuffer;
354}; 358};
355 359
356/* 360/*
@@ -370,14 +374,17 @@ struct AdapterControlBlock
370 unsigned long vir2phy_offset; 374 unsigned long vir2phy_offset;
371 /* Offset is used in making arc cdb physical to virtual calculations */ 375 /* Offset is used in making arc cdb physical to virtual calculations */
372 uint32_t outbound_int_enable; 376 uint32_t outbound_int_enable;
373 377 spinlock_t eh_lock;
378 spinlock_t ccblist_lock;
374 union { 379 union {
375 struct MessageUnit_A __iomem * pmuA; 380 struct MessageUnit_A __iomem * pmuA;
376 struct MessageUnit_B * pmuB; 381 struct MessageUnit_B * pmuB;
377 }; 382 };
378 /* message unit ATU inbound base address0 */ 383 /* message unit ATU inbound base address0 */
379 384 void __iomem *mem_base0;
385 void __iomem *mem_base1;
380 uint32_t acb_flags; 386 uint32_t acb_flags;
387 u16 dev_id;
381 uint8_t adapter_index; 388 uint8_t adapter_index;
382 #define ACB_F_SCSISTOPADAPTER 0x0001 389 #define ACB_F_SCSISTOPADAPTER 0x0001
383 #define ACB_F_MSG_STOP_BGRB 0x0002 390 #define ACB_F_MSG_STOP_BGRB 0x0002
@@ -394,6 +401,7 @@ struct AdapterControlBlock
394 #define ACB_F_BUS_RESET 0x0080 401 #define ACB_F_BUS_RESET 0x0080
395 #define ACB_F_IOP_INITED 0x0100 402 #define ACB_F_IOP_INITED 0x0100
396 /* iop init */ 403 /* iop init */
404 #define ACB_F_ABORT 0x0200
397 #define ACB_F_FIRMWARE_TRAP 0x0400 405 #define ACB_F_FIRMWARE_TRAP 0x0400
398 struct CommandControlBlock * pccb_pool[ARCMSR_MAX_FREECCB_NUM]; 406 struct CommandControlBlock * pccb_pool[ARCMSR_MAX_FREECCB_NUM];
399 /* used for memory free */ 407 /* used for memory free */
@@ -408,7 +416,8 @@ struct AdapterControlBlock
408 /* dma_coherent used for memory free */ 416 /* dma_coherent used for memory free */
409 dma_addr_t dma_coherent_handle; 417 dma_addr_t dma_coherent_handle;
410 /* dma_coherent_handle used for memory free */ 418 /* dma_coherent_handle used for memory free */
411 419 dma_addr_t dma_coherent_handle_hbb_mu;
420 unsigned int uncache_size;
412 uint8_t rqbuffer[ARCMSR_MAX_QBUFFER]; 421 uint8_t rqbuffer[ARCMSR_MAX_QBUFFER];
413 /* data collection buffer for read from 80331 */ 422 /* data collection buffer for read from 80331 */
414 int32_t rqbuf_firstindex; 423 int32_t rqbuf_firstindex;
@@ -432,14 +441,18 @@ struct AdapterControlBlock
432 uint32_t firm_numbers_queue; 441 uint32_t firm_numbers_queue;
433 uint32_t firm_sdram_size; 442 uint32_t firm_sdram_size;
434 uint32_t firm_hd_channels; 443 uint32_t firm_hd_channels;
444 uint32_t firm_cfg_version;
435 char firm_model[12]; 445 char firm_model[12];
436 char firm_version[20]; 446 char firm_version[20];
437 char device_map[20]; /*21,84-99*/ 447 char device_map[20]; /*21,84-99*/
438 struct work_struct arcmsr_do_message_isr_bh; 448 struct work_struct arcmsr_do_message_isr_bh;
439 struct timer_list eternal_timer; 449 struct timer_list eternal_timer;
440 unsigned short fw_state; 450 unsigned short fw_flag;
451 #define FW_NORMAL 0x0000
452 #define FW_BOG 0x0001
453 #define FW_DEADLOCK 0x0010
441 atomic_t rq_map_token; 454 atomic_t rq_map_token;
442 int ante_token_value; 455 atomic_t ante_token_value;
443};/* HW_DEVICE_EXTENSION */ 456};/* HW_DEVICE_EXTENSION */
444/* 457/*
445******************************************************************************* 458*******************************************************************************
@@ -449,65 +462,31 @@ struct AdapterControlBlock
449*/ 462*/
450struct CommandControlBlock 463struct CommandControlBlock
451{ 464{
452 struct ARCMSR_CDB arcmsr_cdb; 465 /*x32:sizeof struct_CCB=(32+60)byte, x64:sizeof struct_CCB=(64+60)byte*/
453 /* 466 struct list_head list; /*x32: 8byte, x64: 16byte*/
454 ** 0-503 (size of CDB = 504): 467 struct scsi_cmnd *pcmd; /*8 bytes pointer of linux scsi command */
455 ** arcmsr messenger scsi command descriptor size 504 bytes 468 struct AdapterControlBlock *acb; /*x32: 4byte, x64: 8byte*/
456 */ 469 uint32_t shifted_cdb_phyaddr; /*x32: 4byte, x64: 4byte*/
457 uint32_t cdb_shifted_phyaddr; 470 uint16_t ccb_flags; /*x32: 2byte, x64: 2byte*/
458 /* 504-507 */
459 uint32_t reserved1;
460 /* 508-511 */
461#if BITS_PER_LONG == 64
462 /* ======================512+64 bytes======================== */
463 struct list_head list;
464 /* 512-527 16 bytes next/prev ptrs for ccb lists */
465 struct scsi_cmnd * pcmd;
466 /* 528-535 8 bytes pointer of linux scsi command */
467 struct AdapterControlBlock * acb;
468 /* 536-543 8 bytes pointer of acb */
469
470 uint16_t ccb_flags;
471 /* 544-545 */
472 #define CCB_FLAG_READ 0x0000 471 #define CCB_FLAG_READ 0x0000
473 #define CCB_FLAG_WRITE 0x0001 472 #define CCB_FLAG_WRITE 0x0001
474 #define CCB_FLAG_ERROR 0x0002 473 #define CCB_FLAG_ERROR 0x0002
475 #define CCB_FLAG_FLUSHCACHE 0x0004 474 #define CCB_FLAG_FLUSHCACHE 0x0004
476 #define CCB_FLAG_MASTER_ABORTED 0x0008 475 #define CCB_FLAG_MASTER_ABORTED 0x0008
477 uint16_t startdone; 476 uint16_t startdone; /*x32:2byte,x32:2byte*/
478 /* 546-547 */
479 #define ARCMSR_CCB_DONE 0x0000 477 #define ARCMSR_CCB_DONE 0x0000
480 #define ARCMSR_CCB_START 0x55AA 478 #define ARCMSR_CCB_START 0x55AA
481 #define ARCMSR_CCB_ABORTED 0xAA55 479 #define ARCMSR_CCB_ABORTED 0xAA55
482 #define ARCMSR_CCB_ILLEGAL 0xFFFF 480 #define ARCMSR_CCB_ILLEGAL 0xFFFF
483 uint32_t reserved2[7]; 481 #if BITS_PER_LONG == 64
484 /* 548-551 552-555 556-559 560-563 564-567 568-571 572-575 */ 482 /* ======================512+64 bytes======================== */
483 uint32_t reserved[6]; /*24 byte*/
485#else 484#else
486 /* ======================512+32 bytes======================== */ 485 /* ======================512+32 bytes======================== */
487 struct list_head list; 486 uint32_t reserved[2]; /*8 byte*/
488 /* 512-519 8 bytes next/prev ptrs for ccb lists */
489 struct scsi_cmnd * pcmd;
490 /* 520-523 4 bytes pointer of linux scsi command */
491 struct AdapterControlBlock * acb;
492 /* 524-527 4 bytes pointer of acb */
493
494 uint16_t ccb_flags;
495 /* 528-529 */
496 #define CCB_FLAG_READ 0x0000
497 #define CCB_FLAG_WRITE 0x0001
498 #define CCB_FLAG_ERROR 0x0002
499 #define CCB_FLAG_FLUSHCACHE 0x0004
500 #define CCB_FLAG_MASTER_ABORTED 0x0008
501 uint16_t startdone;
502 /* 530-531 */
503 #define ARCMSR_CCB_DONE 0x0000
504 #define ARCMSR_CCB_START 0x55AA
505 #define ARCMSR_CCB_ABORTED 0xAA55
506 #define ARCMSR_CCB_ILLEGAL 0xFFFF
507 uint32_t reserved2[3];
508 /* 532-535 536-539 540-543 */
509#endif 487#endif
510 /* ========================================================== */ 488 /* ======================================================= */
489 struct ARCMSR_CDB arcmsr_cdb;
511}; 490};
512/* 491/*
513******************************************************************************* 492*******************************************************************************
diff --git a/drivers/scsi/arcmsr/arcmsr_hba.c b/drivers/scsi/arcmsr/arcmsr_hba.c
index ffa54792bb33..ba33473b27a1 100644
--- a/drivers/scsi/arcmsr/arcmsr_hba.c
+++ b/drivers/scsi/arcmsr/arcmsr_hba.c
@@ -58,7 +58,6 @@
58#include <linux/timer.h> 58#include <linux/timer.h>
59#include <linux/pci.h> 59#include <linux/pci.h>
60#include <linux/aer.h> 60#include <linux/aer.h>
61#include <linux/slab.h>
62#include <asm/dma.h> 61#include <asm/dma.h>
63#include <asm/io.h> 62#include <asm/io.h>
64#include <asm/system.h> 63#include <asm/system.h>
@@ -71,20 +70,13 @@
71#include <scsi/scsi_transport.h> 70#include <scsi/scsi_transport.h>
72#include <scsi/scsicam.h> 71#include <scsi/scsicam.h>
73#include "arcmsr.h" 72#include "arcmsr.h"
74 73MODULE_AUTHOR("Nick Cheng <support@areca.com.tw>");
75#ifdef CONFIG_SCSI_ARCMSR_RESET 74MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/16xx) SATA/SAS RAID Host Bus Adapter");
76 static int sleeptime = 20;
77 static int retrycount = 12;
78 module_param(sleeptime, int, S_IRUGO|S_IWUSR);
79 MODULE_PARM_DESC(sleeptime, "The waiting period for FW ready while bus reset");
80 module_param(retrycount, int, S_IRUGO|S_IWUSR);
81 MODULE_PARM_DESC(retrycount, "The retry count for FW ready while bus reset");
82#endif
83MODULE_AUTHOR("Erich Chen <support@areca.com.tw>");
84MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/13xx/16xx) SATA/SAS RAID Host Bus Adapter");
85MODULE_LICENSE("Dual BSD/GPL"); 75MODULE_LICENSE("Dual BSD/GPL");
86MODULE_VERSION(ARCMSR_DRIVER_VERSION); 76MODULE_VERSION(ARCMSR_DRIVER_VERSION);
87 77static int sleeptime = 20;
78static int retrycount = 12;
79wait_queue_head_t wait_q;
88static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 80static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
89 struct scsi_cmnd *cmd); 81 struct scsi_cmnd *cmd);
90static int arcmsr_iop_confirm(struct AdapterControlBlock *acb); 82static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
@@ -108,7 +100,7 @@ static void arcmsr_request_device_map(unsigned long pacb);
108static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb); 100static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb);
109static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb); 101static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb);
110static void arcmsr_message_isr_bh_fn(struct work_struct *work); 102static void arcmsr_message_isr_bh_fn(struct work_struct *work);
111static void *arcmsr_get_firmware_spec(struct AdapterControlBlock *acb, int mode); 103static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
112static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb); 104static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
113 105
114static const char *arcmsr_info(struct Scsi_Host *); 106static const char *arcmsr_info(struct Scsi_Host *);
@@ -135,10 +127,10 @@ static struct scsi_host_template arcmsr_scsi_host_template = {
135 .eh_bus_reset_handler = arcmsr_bus_reset, 127 .eh_bus_reset_handler = arcmsr_bus_reset,
136 .bios_param = arcmsr_bios_param, 128 .bios_param = arcmsr_bios_param,
137 .change_queue_depth = arcmsr_adjust_disk_queue_depth, 129 .change_queue_depth = arcmsr_adjust_disk_queue_depth,
138 .can_queue = ARCMSR_MAX_OUTSTANDING_CMD, 130 .can_queue = ARCMSR_MAX_FREECCB_NUM,
139 .this_id = ARCMSR_SCSI_INITIATOR_ID, 131 .this_id = ARCMSR_SCSI_INITIATOR_ID,
140 .sg_tablesize = ARCMSR_MAX_SG_ENTRIES, 132 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES,
141 .max_sectors = ARCMSR_MAX_XFER_SECTORS, 133 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C,
142 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN, 134 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN,
143 .use_clustering = ENABLE_CLUSTERING, 135 .use_clustering = ENABLE_CLUSTERING,
144 .shost_attrs = arcmsr_host_attrs, 136 .shost_attrs = arcmsr_host_attrs,
@@ -162,6 +154,7 @@ static struct pci_device_id arcmsr_device_id_table[] = {
162 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)}, 154 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)},
163 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)}, 155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)},
164 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)}, 156 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)},
157 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880)},
165 {0, 0}, /* Terminating entry */ 158 {0, 0}, /* Terminating entry */
166}; 159};
167MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table); 160MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
@@ -173,15 +166,72 @@ static struct pci_driver arcmsr_pci_driver = {
173 .shutdown = arcmsr_shutdown, 166 .shutdown = arcmsr_shutdown,
174}; 167};
175 168
169static void arcmsr_free_mu(struct AdapterControlBlock *acb)
170{
171 switch (acb->adapter_type) {
172 case ACB_ADAPTER_TYPE_A:
173 break;
174 case ACB_ADAPTER_TYPE_B:{
175 struct MessageUnit_B *reg = acb->pmuB;
176 dma_free_coherent(&acb->pdev->dev,
177 sizeof(struct MessageUnit_B),
178 reg, acb->dma_coherent_handle_hbb_mu);
179 }
180 }
181}
182
183static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
184{
185 struct pci_dev *pdev = acb->pdev;
186
187 switch (acb->adapter_type) {
188 case ACB_ADAPTER_TYPE_A:{
189 acb->pmuA = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
190 if (!acb->pmuA) {
191 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
192 return false;
193 }
194 break;
195 }
196 case ACB_ADAPTER_TYPE_B:{
197 void __iomem *mem_base0, *mem_base1;
198 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
199 if (!mem_base0) {
200 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
201 return false;
202 }
203 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
204 if (!mem_base1) {
205 iounmap(mem_base0);
206 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
207 return false;
208 }
209 acb->mem_base0 = mem_base0;
210 acb->mem_base1 = mem_base1;
211 }
212 }
213 return true;
214}
215
216static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
217{
218 switch (acb->adapter_type) {
219 case ACB_ADAPTER_TYPE_A:{
220 iounmap(acb->pmuA);
221 }
222 case ACB_ADAPTER_TYPE_B:{
223 iounmap(acb->mem_base0);
224 iounmap(acb->mem_base1);
225 }
226 }
227}
228
176static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id) 229static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
177{ 230{
178 irqreturn_t handle_state; 231 irqreturn_t handle_state;
179 struct AdapterControlBlock *acb = dev_id; 232 struct AdapterControlBlock *acb = dev_id;
180 233
181 spin_lock(acb->host->host_lock);
182 handle_state = arcmsr_interrupt(acb); 234 handle_state = arcmsr_interrupt(acb);
183 spin_unlock(acb->host->host_lock);
184
185 return handle_state; 235 return handle_state;
186} 236}
187 237
@@ -218,6 +268,7 @@ static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb)
218 struct pci_dev *pdev = acb->pdev; 268 struct pci_dev *pdev = acb->pdev;
219 u16 dev_id; 269 u16 dev_id;
220 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id); 270 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
271 acb->dev_id = dev_id;
221 switch (dev_id) { 272 switch (dev_id) {
222 case 0x1201 : { 273 case 0x1201 : {
223 acb->adapter_type = ACB_ADAPTER_TYPE_B; 274 acb->adapter_type = ACB_ADAPTER_TYPE_B;
@@ -228,141 +279,210 @@ static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb)
228 } 279 }
229} 280}
230 281
231static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) 282static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
283{
284 struct MessageUnit_A __iomem *reg = acb->pmuA;
285 uint32_t Index;
286 uint8_t Retries = 0x00;
287
288 do {
289 for (Index = 0; Index < 100; Index++) {
290 if (readl(&reg->outbound_intstatus) &
291 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
292 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
293 &reg->outbound_intstatus);
294 return 0x00;
295 }
296 msleep(10);
297 } /*max 1 seconds*/
298
299 } while (Retries++ < 20);/*max 20 sec*/
300 return 0xff;
301}
302
303static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
232{ 304{
305 struct MessageUnit_B *reg = acb->pmuB;
306 uint32_t Index;
307 uint8_t Retries = 0x00;
233 308
309 do {
310 for (Index = 0; Index < 100; Index++) {
311 if (readl(reg->iop2drv_doorbell)
312 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
313 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN
314 , reg->iop2drv_doorbell);
315 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
316 return 0x00;
317 }
318 msleep(10);
319 } /*max 1 seconds*/
320
321 } while (Retries++ < 20);/*max 20 sec*/
322 return 0xff;
323}
324
325static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
326{
327 struct MessageUnit_A __iomem *reg = acb->pmuA;
328 int retry_count = 30;
329
330 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
331 do {
332 if (!arcmsr_hba_wait_msgint_ready(acb))
333 break;
334 else {
335 retry_count--;
336 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
337 timeout, retry count down = %d \n", acb->host->host_no, retry_count);
338 }
339 } while (retry_count != 0);
340}
341
342static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
343{
344 struct MessageUnit_B *reg = acb->pmuB;
345 int retry_count = 30;
346
347 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
348 do {
349 if (!arcmsr_hbb_wait_msgint_ready(acb))
350 break;
351 else {
352 retry_count--;
353 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
354 timeout,retry count down = %d \n", acb->host->host_no, retry_count);
355 }
356 } while (retry_count != 0);
357}
358
359static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
360{
234 switch (acb->adapter_type) { 361 switch (acb->adapter_type) {
235 362
236 case ACB_ADAPTER_TYPE_A: { 363 case ACB_ADAPTER_TYPE_A: {
237 struct pci_dev *pdev = acb->pdev; 364 arcmsr_flush_hba_cache(acb);
238 void *dma_coherent; 365 }
239 dma_addr_t dma_coherent_handle, dma_addr; 366 break;
240 struct CommandControlBlock *ccb_tmp;
241 int i, j;
242 367
243 acb->pmuA = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 368 case ACB_ADAPTER_TYPE_B: {
244 if (!acb->pmuA) { 369 arcmsr_flush_hbb_cache(acb);
245 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n",
246 acb->host->host_no);
247 return -ENOMEM;
248 } 370 }
371 }
372}
249 373
250 dma_coherent = dma_alloc_coherent(&pdev->dev, 374static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
251 ARCMSR_MAX_FREECCB_NUM * 375{
252 sizeof (struct CommandControlBlock) + 0x20, 376 struct pci_dev *pdev = acb->pdev;
253 &dma_coherent_handle, GFP_KERNEL); 377 switch (acb->adapter_type) {
378 case ACB_ADAPTER_TYPE_A: {
254 379
380 void *dma_coherent;
381 dma_addr_t dma_coherent_handle;
382 struct CommandControlBlock *ccb_tmp;
383 int i = 0, j = 0;
384 dma_addr_t cdb_phyaddr;
385 unsigned long roundup_ccbsize = 0;
386 unsigned long max_xfer_len;
387 unsigned long max_sg_entrys;
388 uint32_t firm_config_version;
389
390 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
391 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
392 acb->devstate[i][j] = ARECA_RAID_GONE;
393
394 max_xfer_len = ARCMSR_MAX_XFER_LEN;
395 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
396 firm_config_version = acb->firm_cfg_version;
397 if ((firm_config_version & 0xFF) >= 3) {
398 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 16M byte */
399 max_sg_entrys = (max_xfer_len/4096);
400 }
401 acb->host->max_sectors = max_xfer_len/512;
402 acb->host->sg_tablesize = max_sg_entrys;
403 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + max_sg_entrys * sizeof(struct SG64ENTRY), 32);
404 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM;
405 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
255 if (!dma_coherent) { 406 if (!dma_coherent) {
256 iounmap(acb->pmuA); 407 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error \n", acb->host->host_no);
257 return -ENOMEM; 408 return -ENOMEM;
258 } 409 }
259 410 memset(dma_coherent, 0, acb->uncache_size);
260 acb->dma_coherent = dma_coherent; 411 acb->dma_coherent = dma_coherent;
261 acb->dma_coherent_handle = dma_coherent_handle; 412 acb->dma_coherent_handle = dma_coherent_handle;
262
263 if (((unsigned long)dma_coherent & 0x1F)) {
264 dma_coherent = dma_coherent +
265 (0x20 - ((unsigned long)dma_coherent & 0x1F));
266 dma_coherent_handle = dma_coherent_handle +
267 (0x20 - ((unsigned long)dma_coherent_handle & 0x1F));
268 }
269
270 dma_addr = dma_coherent_handle;
271 ccb_tmp = (struct CommandControlBlock *)dma_coherent; 413 ccb_tmp = (struct CommandControlBlock *)dma_coherent;
414 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
272 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 415 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
273 ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5; 416 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
274 ccb_tmp->acb = acb; 417 ccb_tmp->shifted_cdb_phyaddr = cdb_phyaddr >> 5;
275 acb->pccb_pool[i] = ccb_tmp; 418 acb->pccb_pool[i] = ccb_tmp;
419 ccb_tmp->acb = acb;
420 INIT_LIST_HEAD(&ccb_tmp->list);
276 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); 421 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
277 dma_addr = dma_addr + sizeof(struct CommandControlBlock); 422 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
278 ccb_tmp++; 423 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize;
279 }
280
281 acb->vir2phy_offset = (unsigned long)ccb_tmp -(unsigned long)dma_addr;
282 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
283 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
284 acb->devstate[i][j] = ARECA_RAID_GONE;
285 } 424 }
286 break; 425 break;
287 426 }
288 case ACB_ADAPTER_TYPE_B: { 427 case ACB_ADAPTER_TYPE_B: {
289 428
290 struct pci_dev *pdev = acb->pdev;
291 struct MessageUnit_B *reg;
292 void __iomem *mem_base0, *mem_base1;
293 void *dma_coherent; 429 void *dma_coherent;
294 dma_addr_t dma_coherent_handle, dma_addr; 430 dma_addr_t dma_coherent_handle;
295 struct CommandControlBlock *ccb_tmp; 431 struct CommandControlBlock *ccb_tmp;
296 int i, j; 432 uint32_t cdb_phyaddr;
297 433 unsigned int roundup_ccbsize = 0;
298 dma_coherent = dma_alloc_coherent(&pdev->dev, 434 unsigned long max_xfer_len;
299 ((ARCMSR_MAX_FREECCB_NUM * 435 unsigned long max_sg_entrys;
300 sizeof(struct CommandControlBlock) + 0x20) + 436 unsigned long firm_config_version;
301 sizeof(struct MessageUnit_B)), 437 unsigned long max_freeccb_num = 0;
438 int i = 0, j = 0;
439
440 max_freeccb_num = ARCMSR_MAX_FREECCB_NUM;
441 max_xfer_len = ARCMSR_MAX_XFER_LEN;
442 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
443 firm_config_version = acb->firm_cfg_version;
444 if ((firm_config_version & 0xFF) >= 3) {
445 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH <<
446 ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 16M byte */
447 max_sg_entrys = (max_xfer_len/4096);/* max 4097 sg entry*/
448 }
449 acb->host->max_sectors = max_xfer_len / 512;
450 acb->host->sg_tablesize = max_sg_entrys;
451 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock)+
452 (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
453 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM;
454 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size,
302 &dma_coherent_handle, GFP_KERNEL); 455 &dma_coherent_handle, GFP_KERNEL);
303 if (!dma_coherent)
304 return -ENOMEM;
305 456
457 if (!dma_coherent) {
458 printk(KERN_NOTICE "DMA allocation failed...........................\n");
459 return -ENOMEM;
460 }
461 memset(dma_coherent, 0, acb->uncache_size);
306 acb->dma_coherent = dma_coherent; 462 acb->dma_coherent = dma_coherent;
307 acb->dma_coherent_handle = dma_coherent_handle; 463 acb->dma_coherent_handle = dma_coherent_handle;
308
309 if (((unsigned long)dma_coherent & 0x1F)) {
310 dma_coherent = dma_coherent +
311 (0x20 - ((unsigned long)dma_coherent & 0x1F));
312 dma_coherent_handle = dma_coherent_handle +
313 (0x20 - ((unsigned long)dma_coherent_handle & 0x1F));
314 }
315
316 dma_addr = dma_coherent_handle;
317 ccb_tmp = (struct CommandControlBlock *)dma_coherent; 464 ccb_tmp = (struct CommandControlBlock *)dma_coherent;
465 acb->vir2phy_offset = (unsigned long)dma_coherent -
466 (unsigned long)dma_coherent_handle;
318 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 467 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
319 ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5; 468 cdb_phyaddr = dma_coherent_handle +
320 ccb_tmp->acb = acb; 469 offsetof(struct CommandControlBlock, arcmsr_cdb);
470 ccb_tmp->shifted_cdb_phyaddr = cdb_phyaddr >> 5;
321 acb->pccb_pool[i] = ccb_tmp; 471 acb->pccb_pool[i] = ccb_tmp;
472 ccb_tmp->acb = acb;
473 INIT_LIST_HEAD(&ccb_tmp->list);
322 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); 474 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
323 dma_addr = dma_addr + sizeof(struct CommandControlBlock); 475 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp +
324 ccb_tmp++; 476 roundup_ccbsize);
325 } 477 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize;
326
327 reg = (struct MessageUnit_B *)(dma_coherent +
328 ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock));
329 acb->pmuB = reg;
330 mem_base0 = ioremap(pci_resource_start(pdev, 0),
331 pci_resource_len(pdev, 0));
332 if (!mem_base0)
333 goto out;
334
335 mem_base1 = ioremap(pci_resource_start(pdev, 2),
336 pci_resource_len(pdev, 2));
337 if (!mem_base1) {
338 iounmap(mem_base0);
339 goto out;
340 } 478 }
341
342 reg->drv2iop_doorbell_reg = mem_base0 + ARCMSR_DRV2IOP_DOORBELL;
343 reg->drv2iop_doorbell_mask_reg = mem_base0 +
344 ARCMSR_DRV2IOP_DOORBELL_MASK;
345 reg->iop2drv_doorbell_reg = mem_base0 + ARCMSR_IOP2DRV_DOORBELL;
346 reg->iop2drv_doorbell_mask_reg = mem_base0 +
347 ARCMSR_IOP2DRV_DOORBELL_MASK;
348 reg->ioctl_wbuffer_reg = mem_base1 + ARCMSR_IOCTL_WBUFFER;
349 reg->ioctl_rbuffer_reg = mem_base1 + ARCMSR_IOCTL_RBUFFER;
350 reg->msgcode_rwbuffer_reg = mem_base1 + ARCMSR_MSGCODE_RWBUFFER;
351
352 acb->vir2phy_offset = (unsigned long)ccb_tmp -(unsigned long)dma_addr;
353 for (i = 0; i < ARCMSR_MAX_TARGETID; i++) 479 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
354 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) 480 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
355 acb->devstate[i][j] = ARECA_RAID_GOOD; 481 acb->devstate[i][j] = ARECA_RAID_GONE;
356 } 482 }
357 break; 483 break;
358 } 484 }
359 return 0; 485 return 0;
360
361out:
362 dma_free_coherent(&acb->pdev->dev,
363 (ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock) + 0x20 +
364 sizeof(struct MessageUnit_B)), acb->dma_coherent, acb->dma_coherent_handle);
365 return -ENOMEM;
366} 486}
367static void arcmsr_message_isr_bh_fn(struct work_struct *work) 487static void arcmsr_message_isr_bh_fn(struct work_struct *work)
368{ 488{
@@ -411,8 +531,8 @@ static void arcmsr_message_isr_bh_fn(struct work_struct *work)
411 case ACB_ADAPTER_TYPE_B: { 531 case ACB_ADAPTER_TYPE_B: {
412 struct MessageUnit_B *reg = acb->pmuB; 532 struct MessageUnit_B *reg = acb->pmuB;
413 char *acb_dev_map = (char *)acb->device_map; 533 char *acb_dev_map = (char *)acb->device_map;
414 uint32_t __iomem *signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer_reg[0]); 534 uint32_t __iomem *signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
415 char __iomem *devicemap = (char __iomem *)(&reg->msgcode_rwbuffer_reg[21]); 535 char __iomem *devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
416 int target, lun; 536 int target, lun;
417 struct scsi_device *psdev; 537 struct scsi_device *psdev;
418 char diff; 538 char diff;
@@ -447,8 +567,7 @@ static void arcmsr_message_isr_bh_fn(struct work_struct *work)
447 } 567 }
448} 568}
449 569
450static int arcmsr_probe(struct pci_dev *pdev, 570static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
451 const struct pci_device_id *id)
452{ 571{
453 struct Scsi_Host *host; 572 struct Scsi_Host *host;
454 struct AdapterControlBlock *acb; 573 struct AdapterControlBlock *acb;
@@ -456,19 +575,13 @@ static int arcmsr_probe(struct pci_dev *pdev,
456 int error; 575 int error;
457 576
458 error = pci_enable_device(pdev); 577 error = pci_enable_device(pdev);
459 if (error) 578 if (error) {
460 goto out; 579 return -ENODEV;
461 pci_set_master(pdev); 580 }
462 581 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
463 host = scsi_host_alloc(&arcmsr_scsi_host_template,
464 sizeof(struct AdapterControlBlock));
465 if (!host) { 582 if (!host) {
466 error = -ENOMEM; 583 goto pci_disable_dev;
467 goto out_disable_device;
468 } 584 }
469 acb = (struct AdapterControlBlock *)host->hostdata;
470 memset(acb, 0, sizeof (struct AdapterControlBlock));
471
472 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 585 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
473 if (error) { 586 if (error) {
474 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 587 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
@@ -476,126 +589,90 @@ static int arcmsr_probe(struct pci_dev *pdev,
476 printk(KERN_WARNING 589 printk(KERN_WARNING
477 "scsi%d: No suitable DMA mask available\n", 590 "scsi%d: No suitable DMA mask available\n",
478 host->host_no); 591 host->host_no);
479 goto out_host_put; 592 goto scsi_host_release;
480 } 593 }
481 } 594 }
595 init_waitqueue_head(&wait_q);
482 bus = pdev->bus->number; 596 bus = pdev->bus->number;
483 dev_fun = pdev->devfn; 597 dev_fun = pdev->devfn;
484 acb->host = host; 598 acb = (struct AdapterControlBlock *) host->hostdata;
599 memset(acb, 0, sizeof(struct AdapterControlBlock));
485 acb->pdev = pdev; 600 acb->pdev = pdev;
486 host->max_sectors = ARCMSR_MAX_XFER_SECTORS; 601 acb->host = host;
487 host->max_lun = ARCMSR_MAX_TARGETLUN; 602 host->max_lun = ARCMSR_MAX_TARGETLUN;
488 host->max_id = ARCMSR_MAX_TARGETID;/*16:8*/ 603 host->max_id = ARCMSR_MAX_TARGETID;/*16:8*/
489 host->max_cmd_len = 16; /*this is issue of 64bit LBA, over 2T byte*/ 604 host->max_cmd_len = 16; /*this is issue of 64bit LBA, over 2T byte*/
490 host->sg_tablesize = ARCMSR_MAX_SG_ENTRIES;
491 host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */ 605 host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */
492 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN; 606 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
493 host->this_id = ARCMSR_SCSI_INITIATOR_ID; 607 host->this_id = ARCMSR_SCSI_INITIATOR_ID;
494 host->unique_id = (bus << 8) | dev_fun; 608 host->unique_id = (bus << 8) | dev_fun;
495 host->irq = pdev->irq; 609 pci_set_drvdata(pdev, host);
610 pci_set_master(pdev);
496 error = pci_request_regions(pdev, "arcmsr"); 611 error = pci_request_regions(pdev, "arcmsr");
497 if (error) { 612 if (error) {
498 goto out_host_put; 613 goto scsi_host_release;
499 } 614 }
500 arcmsr_define_adapter_type(acb); 615 spin_lock_init(&acb->eh_lock);
501 616 spin_lock_init(&acb->ccblist_lock);
502 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 617 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
503 ACB_F_MESSAGE_RQBUFFER_CLEARED | 618 ACB_F_MESSAGE_RQBUFFER_CLEARED |
504 ACB_F_MESSAGE_WQBUFFER_READED); 619 ACB_F_MESSAGE_WQBUFFER_READED);
505 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; 620 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
506 INIT_LIST_HEAD(&acb->ccb_free_list); 621 INIT_LIST_HEAD(&acb->ccb_free_list);
507 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn); 622 arcmsr_define_adapter_type(acb);
623 error = arcmsr_remap_pciregion(acb);
624 if (!error) {
625 goto pci_release_regs;
626 }
627 error = arcmsr_get_firmware_spec(acb);
628 if (!error) {
629 goto unmap_pci_region;
630 }
508 error = arcmsr_alloc_ccb_pool(acb); 631 error = arcmsr_alloc_ccb_pool(acb);
509 if (error) 632 if (error) {
510 goto out_release_regions; 633 goto free_hbb_mu;
511 634 }
512 arcmsr_iop_init(acb); 635 arcmsr_iop_init(acb);
513 error = request_irq(pdev->irq, arcmsr_do_interrupt,
514 IRQF_SHARED, "arcmsr", acb);
515 if (error)
516 goto out_free_ccb_pool;
517
518 pci_set_drvdata(pdev, host);
519 if (strncmp(acb->firm_version, "V1.42", 5) >= 0)
520 host->max_sectors= ARCMSR_MAX_XFER_SECTORS_B;
521
522 error = scsi_add_host(host, &pdev->dev); 636 error = scsi_add_host(host, &pdev->dev);
523 if (error) 637 if (error) {
524 goto out_free_irq; 638 goto RAID_controller_stop;
525 639 }
526 error = arcmsr_alloc_sysfs_attr(acb); 640 error = request_irq(pdev->irq, arcmsr_do_interrupt, IRQF_SHARED, "arcmsr", acb);
527 if (error) 641 if (error) {
528 goto out_free_sysfs; 642 goto scsi_host_remove;
529 643 }
644 host->irq = pdev->irq;
530 scsi_scan_host(host); 645 scsi_scan_host(host);
531 #ifdef CONFIG_SCSI_ARCMSR_AER 646 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
532 pci_enable_pcie_error_reporting(pdev);
533 #endif
534 atomic_set(&acb->rq_map_token, 16); 647 atomic_set(&acb->rq_map_token, 16);
535 acb->fw_state = true; 648 atomic_set(&acb->ante_token_value, 16);
649 acb->fw_flag = FW_NORMAL;
536 init_timer(&acb->eternal_timer); 650 init_timer(&acb->eternal_timer);
537 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(10*HZ); 651 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
538 acb->eternal_timer.data = (unsigned long) acb; 652 acb->eternal_timer.data = (unsigned long) acb;
539 acb->eternal_timer.function = &arcmsr_request_device_map; 653 acb->eternal_timer.function = &arcmsr_request_device_map;
540 add_timer(&acb->eternal_timer); 654 add_timer(&acb->eternal_timer);
541 655 if (arcmsr_alloc_sysfs_attr(acb))
656 goto out_free_sysfs;
542 return 0; 657 return 0;
543 out_free_sysfs: 658 out_free_sysfs:
544 out_free_irq: 659scsi_host_remove:
545 free_irq(pdev->irq, acb); 660 scsi_remove_host(host);
546 out_free_ccb_pool: 661RAID_controller_stop:
662 arcmsr_stop_adapter_bgrb(acb);
663 arcmsr_flush_adapter_cache(acb);
547 arcmsr_free_ccb_pool(acb); 664 arcmsr_free_ccb_pool(acb);
548 out_release_regions: 665free_hbb_mu:
666 arcmsr_free_mu(acb);
667unmap_pci_region:
668 arcmsr_unmap_pciregion(acb);
669pci_release_regs:
549 pci_release_regions(pdev); 670 pci_release_regions(pdev);
550 out_host_put: 671scsi_host_release:
551 scsi_host_put(host); 672 scsi_host_put(host);
552 out_disable_device: 673pci_disable_dev:
553 pci_disable_device(pdev); 674 pci_disable_device(pdev);
554 out: 675 return -ENODEV;
555 return error;
556}
557
558static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
559{
560 struct MessageUnit_A __iomem *reg = acb->pmuA;
561 uint32_t Index;
562 uint8_t Retries = 0x00;
563
564 do {
565 for (Index = 0; Index < 100; Index++) {
566 if (readl(&reg->outbound_intstatus) &
567 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
568 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
569 &reg->outbound_intstatus);
570 return 0x00;
571 }
572 msleep(10);
573 }/*max 1 seconds*/
574
575 } while (Retries++ < 20);/*max 20 sec*/
576 return 0xff;
577}
578
579static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
580{
581 struct MessageUnit_B *reg = acb->pmuB;
582 uint32_t Index;
583 uint8_t Retries = 0x00;
584
585 do {
586 for (Index = 0; Index < 100; Index++) {
587 if (readl(reg->iop2drv_doorbell_reg)
588 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
589 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN
590 , reg->iop2drv_doorbell_reg);
591 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell_reg);
592 return 0x00;
593 }
594 msleep(10);
595 }/*max 1 seconds*/
596
597 } while (Retries++ < 20);/*max 20 sec*/
598 return 0xff;
599} 676}
600 677
601static uint8_t arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb) 678static uint8_t arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb)
@@ -616,7 +693,7 @@ static uint8_t arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb)
616{ 693{
617 struct MessageUnit_B *reg = acb->pmuB; 694 struct MessageUnit_B *reg = acb->pmuB;
618 695
619 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell_reg); 696 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
620 if (arcmsr_hbb_wait_msgint_ready(acb)) { 697 if (arcmsr_hbb_wait_msgint_ready(acb)) {
621 printk(KERN_NOTICE 698 printk(KERN_NOTICE
622 "arcmsr%d: wait 'abort all outstanding command' timeout \n" 699 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
@@ -642,76 +719,41 @@ static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
642 return rtnval; 719 return rtnval;
643} 720}
644 721
722static bool arcmsr_hbb_enable_driver_mode(struct AdapterControlBlock *pacb)
723{
724 struct MessageUnit_B *reg = pacb->pmuB;
725
726 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
727 if (arcmsr_hbb_wait_msgint_ready(pacb)) {
728 printk(KERN_ERR "arcmsr%d: can't set driver mode. \n", pacb->host->host_no);
729 return false;
730}
731 return true;
732}
733
645static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb) 734static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
646{ 735{
647 struct scsi_cmnd *pcmd = ccb->pcmd; 736 struct scsi_cmnd *pcmd = ccb->pcmd;
648 737
649 scsi_dma_unmap(pcmd); 738 scsi_dma_unmap(pcmd);
650} 739 }
651 740
652static void arcmsr_ccb_complete(struct CommandControlBlock *ccb, int stand_flag) 741static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
653{ 742{
654 struct AdapterControlBlock *acb = ccb->acb; 743 struct AdapterControlBlock *acb = ccb->acb;
655 struct scsi_cmnd *pcmd = ccb->pcmd; 744 struct scsi_cmnd *pcmd = ccb->pcmd;
745 unsigned long flags;
656 746
747 atomic_dec(&acb->ccboutstandingcount);
657 arcmsr_pci_unmap_dma(ccb); 748 arcmsr_pci_unmap_dma(ccb);
658 if (stand_flag == 1)
659 atomic_dec(&acb->ccboutstandingcount);
660 ccb->startdone = ARCMSR_CCB_DONE; 749 ccb->startdone = ARCMSR_CCB_DONE;
661 ccb->ccb_flags = 0; 750 ccb->ccb_flags = 0;
751 spin_lock_irqsave(&acb->ccblist_lock, flags);
662 list_add_tail(&ccb->list, &acb->ccb_free_list); 752 list_add_tail(&ccb->list, &acb->ccb_free_list);
753 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
663 pcmd->scsi_done(pcmd); 754 pcmd->scsi_done(pcmd);
664} 755}
665 756
666static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
667{
668 struct MessageUnit_A __iomem *reg = acb->pmuA;
669 int retry_count = 30;
670
671 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
672 do {
673 if (!arcmsr_hba_wait_msgint_ready(acb))
674 break;
675 else {
676 retry_count--;
677 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
678 timeout, retry count down = %d \n", acb->host->host_no, retry_count);
679 }
680 } while (retry_count != 0);
681}
682
683static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
684{
685 struct MessageUnit_B *reg = acb->pmuB;
686 int retry_count = 30;
687
688 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell_reg);
689 do {
690 if (!arcmsr_hbb_wait_msgint_ready(acb))
691 break;
692 else {
693 retry_count--;
694 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
695 timeout,retry count down = %d \n", acb->host->host_no, retry_count);
696 }
697 } while (retry_count != 0);
698}
699
700static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
701{
702 switch (acb->adapter_type) {
703
704 case ACB_ADAPTER_TYPE_A: {
705 arcmsr_flush_hba_cache(acb);
706 }
707 break;
708
709 case ACB_ADAPTER_TYPE_B: {
710 arcmsr_flush_hbb_cache(acb);
711 }
712 }
713}
714
715static void arcmsr_report_sense_info(struct CommandControlBlock *ccb) 757static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
716{ 758{
717 759
@@ -745,15 +787,15 @@ static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
745 787
746 case ACB_ADAPTER_TYPE_B : { 788 case ACB_ADAPTER_TYPE_B : {
747 struct MessageUnit_B *reg = acb->pmuB; 789 struct MessageUnit_B *reg = acb->pmuB;
748 orig_mask = readl(reg->iop2drv_doorbell_mask_reg); 790 orig_mask = readl(reg->iop2drv_doorbell_mask);
749 writel(0, reg->iop2drv_doorbell_mask_reg); 791 writel(0, reg->iop2drv_doorbell_mask);
750 } 792 }
751 break; 793 break;
752 } 794 }
753 return orig_mask; 795 return orig_mask;
754} 796}
755 797
756static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, \ 798static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
757 struct CommandControlBlock *ccb, uint32_t flag_ccb) 799 struct CommandControlBlock *ccb, uint32_t flag_ccb)
758{ 800{
759 801
@@ -764,13 +806,13 @@ static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, \
764 if (acb->devstate[id][lun] == ARECA_RAID_GONE) 806 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
765 acb->devstate[id][lun] = ARECA_RAID_GOOD; 807 acb->devstate[id][lun] = ARECA_RAID_GOOD;
766 ccb->pcmd->result = DID_OK << 16; 808 ccb->pcmd->result = DID_OK << 16;
767 arcmsr_ccb_complete(ccb, 1); 809 arcmsr_ccb_complete(ccb);
768 } else { 810 } else {
769 switch (ccb->arcmsr_cdb.DeviceStatus) { 811 switch (ccb->arcmsr_cdb.DeviceStatus) {
770 case ARCMSR_DEV_SELECT_TIMEOUT: { 812 case ARCMSR_DEV_SELECT_TIMEOUT: {
771 acb->devstate[id][lun] = ARECA_RAID_GONE; 813 acb->devstate[id][lun] = ARECA_RAID_GONE;
772 ccb->pcmd->result = DID_NO_CONNECT << 16; 814 ccb->pcmd->result = DID_NO_CONNECT << 16;
773 arcmsr_ccb_complete(ccb, 1); 815 arcmsr_ccb_complete(ccb);
774 } 816 }
775 break; 817 break;
776 818
@@ -779,14 +821,14 @@ static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, \
779 case ARCMSR_DEV_INIT_FAIL: { 821 case ARCMSR_DEV_INIT_FAIL: {
780 acb->devstate[id][lun] = ARECA_RAID_GONE; 822 acb->devstate[id][lun] = ARECA_RAID_GONE;
781 ccb->pcmd->result = DID_BAD_TARGET << 16; 823 ccb->pcmd->result = DID_BAD_TARGET << 16;
782 arcmsr_ccb_complete(ccb, 1); 824 arcmsr_ccb_complete(ccb);
783 } 825 }
784 break; 826 break;
785 827
786 case ARCMSR_DEV_CHECK_CONDITION: { 828 case ARCMSR_DEV_CHECK_CONDITION: {
787 acb->devstate[id][lun] = ARECA_RAID_GOOD; 829 acb->devstate[id][lun] = ARECA_RAID_GOOD;
788 arcmsr_report_sense_info(ccb); 830 arcmsr_report_sense_info(ccb);
789 arcmsr_ccb_complete(ccb, 1); 831 arcmsr_ccb_complete(ccb);
790 } 832 }
791 break; 833 break;
792 834
@@ -801,7 +843,7 @@ static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, \
801 , ccb->arcmsr_cdb.DeviceStatus); 843 , ccb->arcmsr_cdb.DeviceStatus);
802 acb->devstate[id][lun] = ARECA_RAID_GONE; 844 acb->devstate[id][lun] = ARECA_RAID_GONE;
803 ccb->pcmd->result = DID_NO_CONNECT << 16; 845 ccb->pcmd->result = DID_NO_CONNECT << 16;
804 arcmsr_ccb_complete(ccb, 1); 846 arcmsr_ccb_complete(ccb);
805 break; 847 break;
806 } 848 }
807 } 849 }
@@ -811,14 +853,19 @@ static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, uint32_t fla
811 853
812{ 854{
813 struct CommandControlBlock *ccb; 855 struct CommandControlBlock *ccb;
856 struct ARCMSR_CDB *arcmsr_cdb;
857 int id, lun;
814 858
815 ccb = (struct CommandControlBlock *)(acb->vir2phy_offset + (flag_ccb << 5)); 859 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
860 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
816 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 861 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
817 if (ccb->startdone == ARCMSR_CCB_ABORTED) { 862 if (ccb->startdone == ARCMSR_CCB_ABORTED) {
818 struct scsi_cmnd *abortcmd = ccb->pcmd; 863 struct scsi_cmnd *abortcmd = ccb->pcmd;
819 if (abortcmd) { 864 if (abortcmd) {
865 id = abortcmd->device->id;
866 lun = abortcmd->device->lun;
820 abortcmd->result |= DID_ABORT << 16; 867 abortcmd->result |= DID_ABORT << 16;
821 arcmsr_ccb_complete(ccb, 1); 868 arcmsr_ccb_complete(ccb);
822 printk(KERN_NOTICE "arcmsr%d: ccb ='0x%p' \ 869 printk(KERN_NOTICE "arcmsr%d: ccb ='0x%p' \
823 isr got aborted command \n", acb->host->host_no, ccb); 870 isr got aborted command \n", acb->host->host_no, ccb);
824 } 871 }
@@ -883,6 +930,7 @@ static void arcmsr_remove(struct pci_dev *pdev)
883 int poll_count = 0; 930 int poll_count = 0;
884 arcmsr_free_sysfs_attr(acb); 931 arcmsr_free_sysfs_attr(acb);
885 scsi_remove_host(host); 932 scsi_remove_host(host);
933 scsi_host_put(host);
886 flush_scheduled_work(); 934 flush_scheduled_work();
887 del_timer_sync(&acb->eternal_timer); 935 del_timer_sync(&acb->eternal_timer);
888 arcmsr_disable_outbound_ints(acb); 936 arcmsr_disable_outbound_ints(acb);
@@ -908,17 +956,14 @@ static void arcmsr_remove(struct pci_dev *pdev)
908 if (ccb->startdone == ARCMSR_CCB_START) { 956 if (ccb->startdone == ARCMSR_CCB_START) {
909 ccb->startdone = ARCMSR_CCB_ABORTED; 957 ccb->startdone = ARCMSR_CCB_ABORTED;
910 ccb->pcmd->result = DID_ABORT << 16; 958 ccb->pcmd->result = DID_ABORT << 16;
911 arcmsr_ccb_complete(ccb, 1); 959 arcmsr_ccb_complete(ccb);
912 } 960 }
913 } 961 }
914 } 962 }
915
916 free_irq(pdev->irq, acb); 963 free_irq(pdev->irq, acb);
917 arcmsr_free_ccb_pool(acb); 964 arcmsr_free_ccb_pool(acb);
965 arcmsr_free_mu(acb);
918 pci_release_regions(pdev); 966 pci_release_regions(pdev);
919
920 scsi_host_put(host);
921
922 pci_disable_device(pdev); 967 pci_disable_device(pdev);
923 pci_set_drvdata(pdev, NULL); 968 pci_set_drvdata(pdev, NULL);
924} 969}
@@ -973,7 +1018,7 @@ static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
973 ARCMSR_IOP2DRV_DATA_READ_OK | 1018 ARCMSR_IOP2DRV_DATA_READ_OK |
974 ARCMSR_IOP2DRV_CDB_DONE | 1019 ARCMSR_IOP2DRV_CDB_DONE |
975 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); 1020 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
976 writel(mask, reg->iop2drv_doorbell_mask_reg); 1021 writel(mask, reg->iop2drv_doorbell_mask);
977 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f; 1022 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
978 } 1023 }
979 } 1024 }
@@ -986,6 +1031,9 @@ static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
986 int8_t *psge = (int8_t *)&arcmsr_cdb->u; 1031 int8_t *psge = (int8_t *)&arcmsr_cdb->u;
987 __le32 address_lo, address_hi; 1032 __le32 address_lo, address_hi;
988 int arccdbsize = 0x30; 1033 int arccdbsize = 0x30;
1034 __le32 length = 0;
1035 int i, cdb_sgcount = 0;
1036 struct scatterlist *sg;
989 int nseg; 1037 int nseg;
990 1038
991 ccb->pcmd = pcmd; 1039 ccb->pcmd = pcmd;
@@ -995,19 +1043,12 @@ static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
995 arcmsr_cdb->LUN = pcmd->device->lun; 1043 arcmsr_cdb->LUN = pcmd->device->lun;
996 arcmsr_cdb->Function = 1; 1044 arcmsr_cdb->Function = 1;
997 arcmsr_cdb->CdbLength = (uint8_t)pcmd->cmd_len; 1045 arcmsr_cdb->CdbLength = (uint8_t)pcmd->cmd_len;
998 arcmsr_cdb->Context = (unsigned long)arcmsr_cdb; 1046 arcmsr_cdb->Context = 0;
999 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len); 1047 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
1000 1048
1001 nseg = scsi_dma_map(pcmd); 1049 nseg = scsi_dma_map(pcmd);
1002 if (nseg > ARCMSR_MAX_SG_ENTRIES) 1050 if (nseg > acb->host->sg_tablesize || nseg < 0)
1003 return FAILED; 1051 return FAILED;
1004 BUG_ON(nseg < 0);
1005
1006 if (nseg) {
1007 __le32 length;
1008 int i, cdb_sgcount = 0;
1009 struct scatterlist *sg;
1010
1011 /* map stor port SG list to our iop SG List. */ 1052 /* map stor port SG list to our iop SG List. */
1012 scsi_for_each_sg(pcmd, sg, nseg, i) { 1053 scsi_for_each_sg(pcmd, sg, nseg, i) {
1013 /* Get the physical address of the current data pointer */ 1054 /* Get the physical address of the current data pointer */
@@ -1034,10 +1075,10 @@ static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
1034 } 1075 }
1035 arcmsr_cdb->sgcount = (uint8_t)cdb_sgcount; 1076 arcmsr_cdb->sgcount = (uint8_t)cdb_sgcount;
1036 arcmsr_cdb->DataLength = scsi_bufflen(pcmd); 1077 arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1078 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1037 if ( arccdbsize > 256) 1079 if ( arccdbsize > 256)
1038 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE; 1080 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
1039 } 1081 if (pcmd->cmnd[0]|WRITE_6 || pcmd->cmnd[0] | WRITE_10 || pcmd->cmnd[0]|WRITE_12) {
1040 if (pcmd->sc_data_direction == DMA_TO_DEVICE ) {
1041 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE; 1082 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
1042 ccb->ccb_flags |= CCB_FLAG_WRITE; 1083 ccb->ccb_flags |= CCB_FLAG_WRITE;
1043 } 1084 }
@@ -1046,7 +1087,7 @@ static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
1046 1087
1047static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb) 1088static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1048{ 1089{
1049 uint32_t cdb_shifted_phyaddr = ccb->cdb_shifted_phyaddr; 1090 uint32_t shifted_cdb_phyaddr = ccb->shifted_cdb_phyaddr;
1050 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 1091 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1051 atomic_inc(&acb->ccboutstandingcount); 1092 atomic_inc(&acb->ccboutstandingcount);
1052 ccb->startdone = ARCMSR_CCB_START; 1093 ccb->startdone = ARCMSR_CCB_START;
@@ -1056,10 +1097,10 @@ static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandContr
1056 struct MessageUnit_A __iomem *reg = acb->pmuA; 1097 struct MessageUnit_A __iomem *reg = acb->pmuA;
1057 1098
1058 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) 1099 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
1059 writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE, 1100 writel(shifted_cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
1060 &reg->inbound_queueport); 1101 &reg->inbound_queueport);
1061 else { 1102 else {
1062 writel(cdb_shifted_phyaddr, &reg->inbound_queueport); 1103 writel(shifted_cdb_phyaddr, &reg->inbound_queueport);
1063 } 1104 }
1064 } 1105 }
1065 break; 1106 break;
@@ -1071,16 +1112,16 @@ static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandContr
1071 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE); 1112 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1072 writel(0, &reg->post_qbuffer[ending_index]); 1113 writel(0, &reg->post_qbuffer[ending_index]);
1073 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) { 1114 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
1074 writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\ 1115 writel(shifted_cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\
1075 &reg->post_qbuffer[index]); 1116 &reg->post_qbuffer[index]);
1076 } 1117 }
1077 else { 1118 else {
1078 writel(cdb_shifted_phyaddr, &reg->post_qbuffer[index]); 1119 writel(shifted_cdb_phyaddr, &reg->post_qbuffer[index]);
1079 } 1120 }
1080 index++; 1121 index++;
1081 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */ 1122 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1082 reg->postq_index = index; 1123 reg->postq_index = index;
1083 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell_reg); 1124 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
1084 } 1125 }
1085 break; 1126 break;
1086 } 1127 }
@@ -1103,7 +1144,7 @@ static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb)
1103{ 1144{
1104 struct MessageUnit_B *reg = acb->pmuB; 1145 struct MessageUnit_B *reg = acb->pmuB;
1105 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1146 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1106 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell_reg); 1147 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
1107 1148
1108 if (arcmsr_hbb_wait_msgint_ready(acb)) { 1149 if (arcmsr_hbb_wait_msgint_ready(acb)) {
1109 printk(KERN_NOTICE 1150 printk(KERN_NOTICE
@@ -1131,23 +1172,14 @@ static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1131{ 1172{
1132 switch (acb->adapter_type) { 1173 switch (acb->adapter_type) {
1133 case ACB_ADAPTER_TYPE_A: { 1174 case ACB_ADAPTER_TYPE_A: {
1175 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
1134 iounmap(acb->pmuA); 1176 iounmap(acb->pmuA);
1135 dma_free_coherent(&acb->pdev->dev,
1136 ARCMSR_MAX_FREECCB_NUM * sizeof (struct CommandControlBlock) + 0x20,
1137 acb->dma_coherent,
1138 acb->dma_coherent_handle);
1139 break;
1140 } 1177 }
1178 break;
1141 case ACB_ADAPTER_TYPE_B: { 1179 case ACB_ADAPTER_TYPE_B: {
1142 struct MessageUnit_B *reg = acb->pmuB; 1180 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
1143 iounmap((u8 *)reg->drv2iop_doorbell_reg - ARCMSR_DRV2IOP_DOORBELL);
1144 iounmap((u8 *)reg->ioctl_wbuffer_reg - ARCMSR_IOCTL_WBUFFER);
1145 dma_free_coherent(&acb->pdev->dev,
1146 (ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock) + 0x20 +
1147 sizeof(struct MessageUnit_B)), acb->dma_coherent, acb->dma_coherent_handle);
1148 } 1181 }
1149 } 1182 }
1150
1151} 1183}
1152 1184
1153void arcmsr_iop_message_read(struct AdapterControlBlock *acb) 1185void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
@@ -1161,7 +1193,7 @@ void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
1161 1193
1162 case ACB_ADAPTER_TYPE_B: { 1194 case ACB_ADAPTER_TYPE_B: {
1163 struct MessageUnit_B *reg = acb->pmuB; 1195 struct MessageUnit_B *reg = acb->pmuB;
1164 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell_reg); 1196 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
1165 } 1197 }
1166 break; 1198 break;
1167 } 1199 }
@@ -1186,7 +1218,7 @@ static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1186 ** push inbound doorbell tell iop, driver data write ok 1218 ** push inbound doorbell tell iop, driver data write ok
1187 ** and wait reply on next hwinterrupt for next Qbuffer post 1219 ** and wait reply on next hwinterrupt for next Qbuffer post
1188 */ 1220 */
1189 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell_reg); 1221 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
1190 } 1222 }
1191 break; 1223 break;
1192 } 1224 }
@@ -1206,7 +1238,7 @@ struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
1206 1238
1207 case ACB_ADAPTER_TYPE_B: { 1239 case ACB_ADAPTER_TYPE_B: {
1208 struct MessageUnit_B *reg = acb->pmuB; 1240 struct MessageUnit_B *reg = acb->pmuB;
1209 qbuffer = (struct QBUFFER __iomem *)reg->ioctl_rbuffer_reg; 1241 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
1210 } 1242 }
1211 break; 1243 break;
1212 } 1244 }
@@ -1227,7 +1259,7 @@ static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBloc
1227 1259
1228 case ACB_ADAPTER_TYPE_B: { 1260 case ACB_ADAPTER_TYPE_B: {
1229 struct MessageUnit_B *reg = acb->pmuB; 1261 struct MessageUnit_B *reg = acb->pmuB;
1230 pqbuffer = (struct QBUFFER __iomem *)reg->ioctl_wbuffer_reg; 1262 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
1231 } 1263 }
1232 break; 1264 break;
1233 } 1265 }
@@ -1362,7 +1394,7 @@ static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb)
1362 struct MessageUnit_B *reg = acb->pmuB; 1394 struct MessageUnit_B *reg = acb->pmuB;
1363 1395
1364 /*clear interrupt and message state*/ 1396 /*clear interrupt and message state*/
1365 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell_reg); 1397 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
1366 schedule_work(&acb->arcmsr_do_message_isr_bh); 1398 schedule_work(&acb->arcmsr_do_message_isr_bh);
1367} 1399}
1368static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb) 1400static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb)
@@ -1394,16 +1426,16 @@ static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb)
1394 uint32_t outbound_doorbell; 1426 uint32_t outbound_doorbell;
1395 struct MessageUnit_B *reg = acb->pmuB; 1427 struct MessageUnit_B *reg = acb->pmuB;
1396 1428
1397 outbound_doorbell = readl(reg->iop2drv_doorbell_reg) & 1429 outbound_doorbell = readl(reg->iop2drv_doorbell) &
1398 acb->outbound_int_enable; 1430 acb->outbound_int_enable;
1399 if (!outbound_doorbell) 1431 if (!outbound_doorbell)
1400 return 1; 1432 return 1;
1401 1433
1402 writel(~outbound_doorbell, reg->iop2drv_doorbell_reg); 1434 writel(~outbound_doorbell, reg->iop2drv_doorbell);
1403 /*in case the last action of doorbell interrupt clearance is cached, 1435 /*in case the last action of doorbell interrupt clearance is cached,
1404 this action can push HW to write down the clear bit*/ 1436 this action can push HW to write down the clear bit*/
1405 readl(reg->iop2drv_doorbell_reg); 1437 readl(reg->iop2drv_doorbell);
1406 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell_reg); 1438 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
1407 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) { 1439 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
1408 arcmsr_iop2drv_data_wrote_handle(acb); 1440 arcmsr_iop2drv_data_wrote_handle(acb);
1409 } 1441 }
@@ -1523,12 +1555,6 @@ static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
1523 goto message_out; 1555 goto message_out;
1524 } 1556 }
1525 1557
1526 if (!acb->fw_state) {
1527 pcmdmessagefld->cmdmessage.ReturnCode =
1528 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1529 goto message_out;
1530 }
1531
1532 ptmpQbuffer = ver_addr; 1558 ptmpQbuffer = ver_addr;
1533 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex) 1559 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
1534 && (allxfer_len < 1031)) { 1560 && (allxfer_len < 1031)) {
@@ -1560,7 +1586,11 @@ static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
1560 } 1586 }
1561 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len); 1587 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len);
1562 pcmdmessagefld->cmdmessage.Length = allxfer_len; 1588 pcmdmessagefld->cmdmessage.Length = allxfer_len;
1589 if (acb->fw_flag == FW_DEADLOCK) {
1590 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1591 } else {
1563 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; 1592 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
1593 }
1564 kfree(ver_addr); 1594 kfree(ver_addr);
1565 } 1595 }
1566 break; 1596 break;
@@ -1575,12 +1605,13 @@ static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
1575 retvalue = ARCMSR_MESSAGE_FAIL; 1605 retvalue = ARCMSR_MESSAGE_FAIL;
1576 goto message_out; 1606 goto message_out;
1577 } 1607 }
1578 if (!acb->fw_state) { 1608 if (acb->fw_flag == FW_DEADLOCK) {
1579 pcmdmessagefld->cmdmessage.ReturnCode = 1609 pcmdmessagefld->cmdmessage.ReturnCode =
1580 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1610 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1581 goto message_out; 1611 } else {
1612 pcmdmessagefld->cmdmessage.ReturnCode =
1613 ARCMSR_MESSAGE_RETURNCODE_OK;
1582 } 1614 }
1583
1584 ptmpuserbuffer = ver_addr; 1615 ptmpuserbuffer = ver_addr;
1585 user_len = pcmdmessagefld->cmdmessage.Length; 1616 user_len = pcmdmessagefld->cmdmessage.Length;
1586 memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len); 1617 memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len);
@@ -1633,12 +1664,6 @@ static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
1633 1664
1634 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { 1665 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
1635 uint8_t *pQbuffer = acb->rqbuffer; 1666 uint8_t *pQbuffer = acb->rqbuffer;
1636 if (!acb->fw_state) {
1637 pcmdmessagefld->cmdmessage.ReturnCode =
1638 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1639 goto message_out;
1640 }
1641
1642 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1667 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1643 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1668 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1644 arcmsr_iop_message_read(acb); 1669 arcmsr_iop_message_read(acb);
@@ -1647,16 +1672,24 @@ static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
1647 acb->rqbuf_firstindex = 0; 1672 acb->rqbuf_firstindex = 0;
1648 acb->rqbuf_lastindex = 0; 1673 acb->rqbuf_lastindex = 0;
1649 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1674 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
1650 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; 1675 if (acb->fw_flag == FW_DEADLOCK) {
1676 pcmdmessagefld->cmdmessage.ReturnCode =
1677 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1678 } else {
1679 pcmdmessagefld->cmdmessage.ReturnCode =
1680 ARCMSR_MESSAGE_RETURNCODE_OK;
1681 }
1651 } 1682 }
1652 break; 1683 break;
1653 1684
1654 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { 1685 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
1655 uint8_t *pQbuffer = acb->wqbuffer; 1686 uint8_t *pQbuffer = acb->wqbuffer;
1656 if (!acb->fw_state) { 1687 if (acb->fw_flag == FW_DEADLOCK) {
1657 pcmdmessagefld->cmdmessage.ReturnCode = 1688 pcmdmessagefld->cmdmessage.ReturnCode =
1658 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1689 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1659 goto message_out; 1690 } else {
1691 pcmdmessagefld->cmdmessage.ReturnCode =
1692 ARCMSR_MESSAGE_RETURNCODE_OK;
1660 } 1693 }
1661 1694
1662 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1695 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
@@ -1669,18 +1702,11 @@ static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
1669 acb->wqbuf_firstindex = 0; 1702 acb->wqbuf_firstindex = 0;
1670 acb->wqbuf_lastindex = 0; 1703 acb->wqbuf_lastindex = 0;
1671 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1704 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
1672 pcmdmessagefld->cmdmessage.ReturnCode =
1673 ARCMSR_MESSAGE_RETURNCODE_OK;
1674 } 1705 }
1675 break; 1706 break;
1676 1707
1677 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { 1708 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
1678 uint8_t *pQbuffer; 1709 uint8_t *pQbuffer;
1679 if (!acb->fw_state) {
1680 pcmdmessagefld->cmdmessage.ReturnCode =
1681 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1682 goto message_out;
1683 }
1684 1710
1685 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1711 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1686 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1712 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
@@ -1698,47 +1724,52 @@ static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
1698 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 1724 memset(pQbuffer, 0, sizeof(struct QBUFFER));
1699 pQbuffer = acb->wqbuffer; 1725 pQbuffer = acb->wqbuffer;
1700 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 1726 memset(pQbuffer, 0, sizeof(struct QBUFFER));
1701 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; 1727 if (acb->fw_flag == FW_DEADLOCK) {
1728 pcmdmessagefld->cmdmessage.ReturnCode =
1729 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1730 } else {
1731 pcmdmessagefld->cmdmessage.ReturnCode =
1732 ARCMSR_MESSAGE_RETURNCODE_OK;
1733 }
1702 } 1734 }
1703 break; 1735 break;
1704 1736
1705 case ARCMSR_MESSAGE_RETURN_CODE_3F: { 1737 case ARCMSR_MESSAGE_RETURN_CODE_3F: {
1706 if (!acb->fw_state) { 1738 if (acb->fw_flag == FW_DEADLOCK) {
1707 pcmdmessagefld->cmdmessage.ReturnCode = 1739 pcmdmessagefld->cmdmessage.ReturnCode =
1708 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1740 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1709 goto message_out; 1741 } else {
1710 } 1742 pcmdmessagefld->cmdmessage.ReturnCode =
1711 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F; 1743 ARCMSR_MESSAGE_RETURNCODE_3F;
1712 } 1744 }
1713 break; 1745 break;
1714 1746 }
1715 case ARCMSR_MESSAGE_SAY_HELLO: { 1747 case ARCMSR_MESSAGE_SAY_HELLO: {
1716 int8_t *hello_string = "Hello! I am ARCMSR"; 1748 int8_t *hello_string = "Hello! I am ARCMSR";
1717 if (!acb->fw_state) { 1749 if (acb->fw_flag == FW_DEADLOCK) {
1718 pcmdmessagefld->cmdmessage.ReturnCode = 1750 pcmdmessagefld->cmdmessage.ReturnCode =
1719 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1751 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1720 goto message_out; 1752 } else {
1753 pcmdmessagefld->cmdmessage.ReturnCode =
1754 ARCMSR_MESSAGE_RETURNCODE_OK;
1721 } 1755 }
1722 memcpy(pcmdmessagefld->messagedatabuffer, hello_string 1756 memcpy(pcmdmessagefld->messagedatabuffer, hello_string
1723 , (int16_t)strlen(hello_string)); 1757 , (int16_t)strlen(hello_string));
1724 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
1725 } 1758 }
1726 break; 1759 break;
1727 1760
1728 case ARCMSR_MESSAGE_SAY_GOODBYE: 1761 case ARCMSR_MESSAGE_SAY_GOODBYE:
1729 if (!acb->fw_state) { 1762 if (acb->fw_flag == FW_DEADLOCK) {
1730 pcmdmessagefld->cmdmessage.ReturnCode = 1763 pcmdmessagefld->cmdmessage.ReturnCode =
1731 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1764 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1732 goto message_out;
1733 } 1765 }
1734 arcmsr_iop_parking(acb); 1766 arcmsr_iop_parking(acb);
1735 break; 1767 break;
1736 1768
1737 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: 1769 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
1738 if (!acb->fw_state) { 1770 if (acb->fw_flag == FW_DEADLOCK) {
1739 pcmdmessagefld->cmdmessage.ReturnCode = 1771 pcmdmessagefld->cmdmessage.ReturnCode =
1740 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1772 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1741 goto message_out;
1742 } 1773 }
1743 arcmsr_flush_adapter_cache(acb); 1774 arcmsr_flush_adapter_cache(acb);
1744 break; 1775 break;
@@ -1756,11 +1787,16 @@ static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock
1756{ 1787{
1757 struct list_head *head = &acb->ccb_free_list; 1788 struct list_head *head = &acb->ccb_free_list;
1758 struct CommandControlBlock *ccb = NULL; 1789 struct CommandControlBlock *ccb = NULL;
1759 1790 unsigned long flags;
1791 spin_lock_irqsave(&acb->ccblist_lock, flags);
1760 if (!list_empty(head)) { 1792 if (!list_empty(head)) {
1761 ccb = list_entry(head->next, struct CommandControlBlock, list); 1793 ccb = list_entry(head->next, struct CommandControlBlock, list);
1762 list_del(head->next); 1794 list_del_init(&ccb->list);
1795 } else {
1796 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
1797 return 0;
1763 } 1798 }
1799 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
1764 return ccb; 1800 return ccb;
1765} 1801}
1766 1802
@@ -1835,66 +1871,12 @@ static int arcmsr_queue_command(struct scsi_cmnd *cmd,
1835 return 0; 1871 return 0;
1836 } 1872 }
1837 1873
1838 if (acb->acb_flags & ACB_F_BUS_RESET) {
1839 switch (acb->adapter_type) {
1840 case ACB_ADAPTER_TYPE_A: {
1841 struct MessageUnit_A __iomem *reg = acb->pmuA;
1842 uint32_t intmask_org, outbound_doorbell;
1843
1844 if ((readl(&reg->outbound_msgaddr1) &
1845 ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) {
1846 printk(KERN_NOTICE "arcmsr%d: bus reset and return busy\n",
1847 acb->host->host_no);
1848 return SCSI_MLQUEUE_HOST_BUSY;
1849 }
1850
1851 acb->acb_flags &= ~ACB_F_FIRMWARE_TRAP;
1852 printk(KERN_NOTICE "arcmsr%d: hardware bus reset and reset ok\n",
1853 acb->host->host_no);
1854 /* disable all outbound interrupt */
1855 intmask_org = arcmsr_disable_outbound_ints(acb);
1856 arcmsr_get_firmware_spec(acb, 1);
1857 /*start background rebuild*/
1858 arcmsr_start_adapter_bgrb(acb);
1859 /* clear Qbuffer if door bell ringed */
1860 outbound_doorbell = readl(&reg->outbound_doorbell);
1861 /*clear interrupt */
1862 writel(outbound_doorbell, &reg->outbound_doorbell);
1863 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK,
1864 &reg->inbound_doorbell);
1865 /* enable outbound Post Queue,outbound doorbell Interrupt */
1866 arcmsr_enable_outbound_ints(acb, intmask_org);
1867 acb->acb_flags |= ACB_F_IOP_INITED;
1868 acb->acb_flags &= ~ACB_F_BUS_RESET;
1869 }
1870 break;
1871 case ACB_ADAPTER_TYPE_B: {
1872 }
1873 }
1874 }
1875
1876 if (target == 16) { 1874 if (target == 16) {
1877 /* virtual device for iop message transfer */ 1875 /* virtual device for iop message transfer */
1878 arcmsr_handle_virtual_command(acb, cmd); 1876 arcmsr_handle_virtual_command(acb, cmd);
1879 return 0; 1877 return 0;
1880 } 1878 }
1881 if (acb->devstate[target][lun] == ARECA_RAID_GONE) {
1882 uint8_t block_cmd;
1883 1879
1884 block_cmd = cmd->cmnd[0] & 0x0f;
1885 if (block_cmd == 0x08 || block_cmd == 0x0a) {
1886 printk(KERN_NOTICE
1887 "arcmsr%d: block 'read/write'"
1888 "command with gone raid volume"
1889 " Cmd = %2x, TargetId = %d, Lun = %d \n"
1890 , acb->host->host_no
1891 , cmd->cmnd[0]
1892 , target, lun);
1893 cmd->result = (DID_NO_CONNECT << 16);
1894 cmd->scsi_done(cmd);
1895 return 0;
1896 }
1897 }
1898 if (atomic_read(&acb->ccboutstandingcount) >= 1880 if (atomic_read(&acb->ccboutstandingcount) >=
1899 ARCMSR_MAX_OUTSTANDING_CMD) 1881 ARCMSR_MAX_OUTSTANDING_CMD)
1900 return SCSI_MLQUEUE_HOST_BUSY; 1882 return SCSI_MLQUEUE_HOST_BUSY;
@@ -1911,7 +1893,7 @@ static int arcmsr_queue_command(struct scsi_cmnd *cmd,
1911 return 0; 1893 return 0;
1912} 1894}
1913 1895
1914static void *arcmsr_get_hba_config(struct AdapterControlBlock *acb, int mode) 1896static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb)
1915{ 1897{
1916 struct MessageUnit_A __iomem *reg = acb->pmuA; 1898 struct MessageUnit_A __iomem *reg = acb->pmuA;
1917 char *acb_firm_model = acb->firm_model; 1899 char *acb_firm_model = acb->firm_model;
@@ -1926,10 +1908,8 @@ static void *arcmsr_get_hba_config(struct AdapterControlBlock *acb, int mode)
1926 if (arcmsr_hba_wait_msgint_ready(acb)) { 1908 if (arcmsr_hba_wait_msgint_ready(acb)) {
1927 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 1909 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
1928 miscellaneous data' timeout \n", acb->host->host_no); 1910 miscellaneous data' timeout \n", acb->host->host_no);
1929 return NULL; 1911 return false;
1930 } 1912 }
1931
1932 if (mode == 1) {
1933 count = 8; 1913 count = 8;
1934 while (count) { 1914 while (count) {
1935 *acb_firm_model = readb(iop_firm_model); 1915 *acb_firm_model = readb(iop_firm_model);
@@ -1953,53 +1933,68 @@ static void *arcmsr_get_hba_config(struct AdapterControlBlock *acb, int mode)
1953 iop_device_map++; 1933 iop_device_map++;
1954 count--; 1934 count--;
1955 } 1935 }
1956 1936 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
1957 printk(KERN_INFO "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n" 1937 acb->host->host_no,
1958 , acb->host->host_no 1938 acb->firm_version,
1959 , acb->firm_version); 1939 acb->firm_model);
1960 acb->signature = readl(&reg->message_rwbuffer[0]); 1940 acb->signature = readl(&reg->message_rwbuffer[0]);
1961 acb->firm_request_len = readl(&reg->message_rwbuffer[1]); 1941 acb->firm_request_len = readl(&reg->message_rwbuffer[1]);
1962 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]); 1942 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]);
1963 acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]); 1943 acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]);
1964 acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]); 1944 acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]);
1945 acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
1946 return true;
1965} 1947}
1966 return reg->message_rwbuffer; 1948static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
1967}
1968static void __iomem *arcmsr_get_hbb_config(struct AdapterControlBlock *acb, int mode)
1969{ 1949{
1970 struct MessageUnit_B *reg = acb->pmuB; 1950 struct MessageUnit_B *reg = acb->pmuB;
1971 uint32_t __iomem *lrwbuffer = reg->msgcode_rwbuffer_reg; 1951 struct pci_dev *pdev = acb->pdev;
1952 void *dma_coherent;
1953 dma_addr_t dma_coherent_handle;
1972 char *acb_firm_model = acb->firm_model; 1954 char *acb_firm_model = acb->firm_model;
1973 char *acb_firm_version = acb->firm_version; 1955 char *acb_firm_version = acb->firm_version;
1974 char *acb_device_map = acb->device_map; 1956 char *acb_device_map = acb->device_map;
1975 char __iomem *iop_firm_model = (char __iomem *)(&lrwbuffer[15]); 1957 char __iomem *iop_firm_model;
1976 /*firm_model,15,60-67*/ 1958 /*firm_model,15,60-67*/
1977 char __iomem *iop_firm_version = (char __iomem *)(&lrwbuffer[17]); 1959 char __iomem *iop_firm_version;
1978 /*firm_version,17,68-83*/ 1960 /*firm_version,17,68-83*/
1979 char __iomem *iop_device_map = (char __iomem *) (&lrwbuffer[21]); 1961 char __iomem *iop_device_map;
1980 /*firm_version,21,84-99*/ 1962 /*firm_version,21,84-99*/
1981 int count; 1963 int count;
1982 1964 dma_coherent = dma_alloc_coherent(&pdev->dev, sizeof(struct MessageUnit_B), &dma_coherent_handle, GFP_KERNEL);
1983 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell_reg); 1965 if (!dma_coherent) {
1966 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error for hbb mu\n", acb->host->host_no);
1967 return false;
1968 }
1969 acb->dma_coherent_handle_hbb_mu = dma_coherent_handle;
1970 reg = (struct MessageUnit_B *)dma_coherent;
1971 acb->pmuB = reg;
1972 reg->drv2iop_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL);
1973 reg->drv2iop_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL_MASK);
1974 reg->iop2drv_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL);
1975 reg->iop2drv_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL_MASK);
1976 reg->message_wbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_WBUFFER);
1977 reg->message_rbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RBUFFER);
1978 reg->message_rwbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RWBUFFER);
1979 iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]); /*firm_model,15,60-67*/
1980 iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]); /*firm_version,17,68-83*/
1981 iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]); /*firm_version,21,84-99*/
1982
1983 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
1984 if (arcmsr_hbb_wait_msgint_ready(acb)) { 1984 if (arcmsr_hbb_wait_msgint_ready(acb)) {
1985 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 1985 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
1986 miscellaneous data' timeout \n", acb->host->host_no); 1986 miscellaneous data' timeout \n", acb->host->host_no);
1987 return NULL; 1987 return false;
1988 } 1988 }
1989
1990 if (mode == 1) {
1991 count = 8; 1989 count = 8;
1992 while (count) 1990 while (count) {
1993 {
1994 *acb_firm_model = readb(iop_firm_model); 1991 *acb_firm_model = readb(iop_firm_model);
1995 acb_firm_model++; 1992 acb_firm_model++;
1996 iop_firm_model++; 1993 iop_firm_model++;
1997 count--; 1994 count--;
1998 } 1995 }
1999
2000 count = 16; 1996 count = 16;
2001 while (count) 1997 while (count) {
2002 {
2003 *acb_firm_version = readb(iop_firm_version); 1998 *acb_firm_version = readb(iop_firm_version);
2004 acb_firm_version++; 1999 acb_firm_version++;
2005 iop_firm_version++; 2000 iop_firm_version++;
@@ -2014,46 +2009,41 @@ static void __iomem *arcmsr_get_hbb_config(struct AdapterControlBlock *acb, int
2014 count--; 2009 count--;
2015 } 2010 }
2016 2011
2017 printk(KERN_INFO "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n", 2012 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
2018 acb->host->host_no, 2013 acb->host->host_no,
2019 acb->firm_version); 2014 acb->firm_version,
2015 acb->firm_model);
2020 2016
2021 acb->signature = readl(lrwbuffer++); 2017 acb->signature = readl(&reg->message_rwbuffer[1]);
2022 /*firm_signature,1,00-03*/ 2018 /*firm_signature,1,00-03*/
2023 acb->firm_request_len = readl(lrwbuffer++); 2019 acb->firm_request_len = readl(&reg->message_rwbuffer[2]);
2024 /*firm_request_len,1,04-07*/ 2020 /*firm_request_len,1,04-07*/
2025 acb->firm_numbers_queue = readl(lrwbuffer++); 2021 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[3]);
2026 /*firm_numbers_queue,2,08-11*/ 2022 /*firm_numbers_queue,2,08-11*/
2027 acb->firm_sdram_size = readl(lrwbuffer++); 2023 acb->firm_sdram_size = readl(&reg->message_rwbuffer[4]);
2028 /*firm_sdram_size,3,12-15*/ 2024 /*firm_sdram_size,3,12-15*/
2029 acb->firm_hd_channels = readl(lrwbuffer); 2025 acb->firm_hd_channels = readl(&reg->message_rwbuffer[5]);
2030 /*firm_ide_channels,4,16-19*/ 2026 /*firm_ide_channels,4,16-19*/
2027 acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2028 /*firm_ide_channels,4,16-19*/
2029 return true;
2031} 2030}
2032 return reg->msgcode_rwbuffer_reg; 2031static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
2033}
2034static void *arcmsr_get_firmware_spec(struct AdapterControlBlock *acb, int mode)
2035{ 2032{
2036 void *rtnval = 0; 2033 if (acb->adapter_type == ACB_ADAPTER_TYPE_A)
2037 switch (acb->adapter_type) { 2034 return arcmsr_get_hba_config(acb);
2038 case ACB_ADAPTER_TYPE_A: { 2035 else
2039 rtnval = arcmsr_get_hba_config(acb, mode); 2036 return arcmsr_get_hbb_config(acb);
2040 }
2041 break;
2042
2043 case ACB_ADAPTER_TYPE_B: {
2044 rtnval = arcmsr_get_hbb_config(acb, mode);
2045 }
2046 break;
2047 }
2048 return rtnval;
2049} 2037}
2050 2038
2051static void arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb, 2039static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
2052 struct CommandControlBlock *poll_ccb) 2040 struct CommandControlBlock *poll_ccb)
2053{ 2041{
2054 struct MessageUnit_A __iomem *reg = acb->pmuA; 2042 struct MessageUnit_A __iomem *reg = acb->pmuA;
2055 struct CommandControlBlock *ccb; 2043 struct CommandControlBlock *ccb;
2044 struct ARCMSR_CDB *arcmsr_cdb;
2056 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0; 2045 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
2046 int rtn;
2057 2047
2058 polling_hba_ccb_retry: 2048 polling_hba_ccb_retry:
2059 poll_count++; 2049 poll_count++;
@@ -2061,16 +2051,19 @@ static void arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
2061 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/ 2051 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
2062 while (1) { 2052 while (1) {
2063 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) { 2053 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
2064 if (poll_ccb_done) 2054 if (poll_ccb_done) {
2055 rtn = SUCCESS;
2065 break; 2056 break;
2066 else { 2057 } else {
2067 msleep(25); 2058 if (poll_count > 100) {
2068 if (poll_count > 100) 2059 rtn = FAILED;
2069 break; 2060 break;
2061 }
2070 goto polling_hba_ccb_retry; 2062 goto polling_hba_ccb_retry;
2071 } 2063 }
2072 } 2064 }
2073 ccb = (struct CommandControlBlock *)(acb->vir2phy_offset + (flag_ccb << 5)); 2065 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2066 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
2074 poll_ccb_done = (ccb == poll_ccb) ? 1:0; 2067 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
2075 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 2068 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2076 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 2069 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
@@ -2081,8 +2074,7 @@ static void arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
2081 , ccb->pcmd->device->lun 2074 , ccb->pcmd->device->lun
2082 , ccb); 2075 , ccb);
2083 ccb->pcmd->result = DID_ABORT << 16; 2076 ccb->pcmd->result = DID_ABORT << 16;
2084 arcmsr_ccb_complete(ccb, 1); 2077 arcmsr_ccb_complete(ccb);
2085 poll_ccb_done = 1;
2086 continue; 2078 continue;
2087 } 2079 }
2088 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2080 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
@@ -2092,32 +2084,38 @@ static void arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
2092 , ccb 2084 , ccb
2093 , atomic_read(&acb->ccboutstandingcount)); 2085 , atomic_read(&acb->ccboutstandingcount));
2094 continue; 2086 continue;
2095 } 2087 } else {
2096 arcmsr_report_ccb_state(acb, ccb, flag_ccb); 2088 arcmsr_report_ccb_state(acb, ccb, flag_ccb);
2097 } 2089 }
2098} 2090}
2091 return rtn;
2092}
2099 2093
2100static void arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb, 2094static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
2101 struct CommandControlBlock *poll_ccb) 2095 struct CommandControlBlock *poll_ccb)
2102{ 2096{
2103 struct MessageUnit_B *reg = acb->pmuB; 2097 struct MessageUnit_B *reg = acb->pmuB;
2098 struct ARCMSR_CDB *arcmsr_cdb;
2104 struct CommandControlBlock *ccb; 2099 struct CommandControlBlock *ccb;
2105 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0; 2100 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
2106 int index; 2101 int index, rtn;
2107 2102
2108 polling_hbb_ccb_retry: 2103 polling_hbb_ccb_retry:
2109 poll_count++; 2104 poll_count++;
2110 /* clear doorbell interrupt */ 2105 /* clear doorbell interrupt */
2111 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell_reg); 2106 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2112 while (1) { 2107 while (1) {
2113 index = reg->doneq_index; 2108 index = reg->doneq_index;
2114 if ((flag_ccb = readl(&reg->done_qbuffer[index])) == 0) { 2109 if ((flag_ccb = readl(&reg->done_qbuffer[index])) == 0) {
2115 if (poll_ccb_done) 2110 if (poll_ccb_done) {
2111 rtn = SUCCESS;
2116 break; 2112 break;
2117 else { 2113 } else {
2118 msleep(25); 2114 msleep(25);
2119 if (poll_count > 100) 2115 if (poll_count > 100) {
2116 rtn = FAILED;
2120 break; 2117 break;
2118 }
2121 goto polling_hbb_ccb_retry; 2119 goto polling_hbb_ccb_retry;
2122 } 2120 }
2123 } 2121 }
@@ -2127,19 +2125,19 @@ static void arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
2127 index %= ARCMSR_MAX_HBB_POSTQUEUE; 2125 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2128 reg->doneq_index = index; 2126 reg->doneq_index = index;
2129 /* check ifcommand done with no error*/ 2127 /* check ifcommand done with no error*/
2130 ccb = (struct CommandControlBlock *)\ 2128 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2131 (acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 2129 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
2132 poll_ccb_done = (ccb == poll_ccb) ? 1:0; 2130 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
2133 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 2131 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2134 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 2132 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
2135 printk(KERN_NOTICE "arcmsr%d: \ 2133 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2136 scsi id = %d lun = %d ccb = '0x%p' poll command abort successfully \n" 2134 " poll command abort successfully \n"
2137 ,acb->host->host_no 2135 ,acb->host->host_no
2138 ,ccb->pcmd->device->id 2136 ,ccb->pcmd->device->id
2139 ,ccb->pcmd->device->lun 2137 ,ccb->pcmd->device->lun
2140 ,ccb); 2138 ,ccb);
2141 ccb->pcmd->result = DID_ABORT << 16; 2139 ccb->pcmd->result = DID_ABORT << 16;
2142 arcmsr_ccb_complete(ccb, 1); 2140 arcmsr_ccb_complete(ccb);
2143 continue; 2141 continue;
2144 } 2142 }
2145 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2143 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
@@ -2149,30 +2147,34 @@ static void arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
2149 , ccb 2147 , ccb
2150 , atomic_read(&acb->ccboutstandingcount)); 2148 , atomic_read(&acb->ccboutstandingcount));
2151 continue; 2149 continue;
2152 } 2150 } else {
2153 arcmsr_report_ccb_state(acb, ccb, flag_ccb); 2151 arcmsr_report_ccb_state(acb, ccb, flag_ccb);
2152 }
2154 } /*drain reply FIFO*/ 2153 } /*drain reply FIFO*/
2154 return rtn;
2155} 2155}
2156 2156
2157static void arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, 2157static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
2158 struct CommandControlBlock *poll_ccb) 2158 struct CommandControlBlock *poll_ccb)
2159{ 2159{
2160 int rtn = 0;
2160 switch (acb->adapter_type) { 2161 switch (acb->adapter_type) {
2161 2162
2162 case ACB_ADAPTER_TYPE_A: { 2163 case ACB_ADAPTER_TYPE_A: {
2163 arcmsr_polling_hba_ccbdone(acb,poll_ccb); 2164 rtn = arcmsr_polling_hba_ccbdone(acb, poll_ccb);
2164 } 2165 }
2165 break; 2166 break;
2166 2167
2167 case ACB_ADAPTER_TYPE_B: { 2168 case ACB_ADAPTER_TYPE_B: {
2168 arcmsr_polling_hbb_ccbdone(acb,poll_ccb); 2169 rtn = arcmsr_polling_hbb_ccbdone(acb, poll_ccb);
2169 } 2170 }
2170 } 2171 }
2172 return rtn;
2171} 2173}
2172 2174
2173static int arcmsr_iop_confirm(struct AdapterControlBlock *acb) 2175static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
2174{ 2176{
2175 uint32_t cdb_phyaddr, ccb_phyaddr_hi32; 2177 uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
2176 dma_addr_t dma_coherent_handle; 2178 dma_addr_t dma_coherent_handle;
2177 /* 2179 /*
2178 ******************************************************************** 2180 ********************************************************************
@@ -2182,7 +2184,7 @@ static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
2182 */ 2184 */
2183 dma_coherent_handle = acb->dma_coherent_handle; 2185 dma_coherent_handle = acb->dma_coherent_handle;
2184 cdb_phyaddr = (uint32_t)(dma_coherent_handle); 2186 cdb_phyaddr = (uint32_t)(dma_coherent_handle);
2185 ccb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16); 2187 cdb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16);
2186 /* 2188 /*
2187 *********************************************************************** 2189 ***********************************************************************
2188 ** if adapter type B, set window of "post command Q" 2190 ** if adapter type B, set window of "post command Q"
@@ -2191,13 +2193,13 @@ static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
2191 switch (acb->adapter_type) { 2193 switch (acb->adapter_type) {
2192 2194
2193 case ACB_ADAPTER_TYPE_A: { 2195 case ACB_ADAPTER_TYPE_A: {
2194 if (ccb_phyaddr_hi32 != 0) { 2196 if (cdb_phyaddr_hi32 != 0) {
2195 struct MessageUnit_A __iomem *reg = acb->pmuA; 2197 struct MessageUnit_A __iomem *reg = acb->pmuA;
2196 uint32_t intmask_org; 2198 uint32_t intmask_org;
2197 intmask_org = arcmsr_disable_outbound_ints(acb); 2199 intmask_org = arcmsr_disable_outbound_ints(acb);
2198 writel(ARCMSR_SIGNATURE_SET_CONFIG, \ 2200 writel(ARCMSR_SIGNATURE_SET_CONFIG, \
2199 &reg->message_rwbuffer[0]); 2201 &reg->message_rwbuffer[0]);
2200 writel(ccb_phyaddr_hi32, &reg->message_rwbuffer[1]); 2202 writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
2201 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \ 2203 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
2202 &reg->inbound_msgaddr0); 2204 &reg->inbound_msgaddr0);
2203 if (arcmsr_hba_wait_msgint_ready(acb)) { 2205 if (arcmsr_hba_wait_msgint_ready(acb)) {
@@ -2220,19 +2222,18 @@ static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
2220 intmask_org = arcmsr_disable_outbound_ints(acb); 2222 intmask_org = arcmsr_disable_outbound_ints(acb);
2221 reg->postq_index = 0; 2223 reg->postq_index = 0;
2222 reg->doneq_index = 0; 2224 reg->doneq_index = 0;
2223 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell_reg); 2225 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
2224 if (arcmsr_hbb_wait_msgint_ready(acb)) { 2226 if (arcmsr_hbb_wait_msgint_ready(acb)) {
2225 printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \ 2227 printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \
2226 acb->host->host_no); 2228 acb->host->host_no);
2227 return 1; 2229 return 1;
2228 } 2230 }
2229 post_queue_phyaddr = cdb_phyaddr + ARCMSR_MAX_FREECCB_NUM * \ 2231 post_queue_phyaddr = acb->dma_coherent_handle_hbb_mu;
2230 sizeof(struct CommandControlBlock) + offsetof(struct MessageUnit_B, post_qbuffer) ; 2232 rwbuffer = reg->message_rwbuffer;
2231 rwbuffer = reg->msgcode_rwbuffer_reg;
2232 /* driver "set config" signature */ 2233 /* driver "set config" signature */
2233 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); 2234 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
2234 /* normal should be zero */ 2235 /* normal should be zero */
2235 writel(ccb_phyaddr_hi32, rwbuffer++); 2236 writel(cdb_phyaddr_hi32, rwbuffer++);
2236 /* postQ size (256 + 8)*4 */ 2237 /* postQ size (256 + 8)*4 */
2237 writel(post_queue_phyaddr, rwbuffer++); 2238 writel(post_queue_phyaddr, rwbuffer++);
2238 /* doneQ size (256 + 8)*4 */ 2239 /* doneQ size (256 + 8)*4 */
@@ -2240,19 +2241,13 @@ static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
2240 /* ccb maxQ size must be --> [(256 + 8)*4]*/ 2241 /* ccb maxQ size must be --> [(256 + 8)*4]*/
2241 writel(1056, rwbuffer); 2242 writel(1056, rwbuffer);
2242 2243
2243 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell_reg); 2244 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
2244 if (arcmsr_hbb_wait_msgint_ready(acb)) { 2245 if (arcmsr_hbb_wait_msgint_ready(acb)) {
2245 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 2246 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
2246 timeout \n",acb->host->host_no); 2247 timeout \n",acb->host->host_no);
2247 return 1; 2248 return 1;
2248 } 2249 }
2249 2250 arcmsr_hbb_enable_driver_mode(acb);
2250 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell_reg);
2251 if (arcmsr_hbb_wait_msgint_ready(acb)) {
2252 printk(KERN_NOTICE "arcmsr%d: 'can not set diver mode \n"\
2253 ,acb->host->host_no);
2254 return 1;
2255 }
2256 arcmsr_enable_outbound_ints(acb, intmask_org); 2251 arcmsr_enable_outbound_ints(acb, intmask_org);
2257 } 2252 }
2258 break; 2253 break;
@@ -2277,9 +2272,9 @@ static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
2277 case ACB_ADAPTER_TYPE_B: { 2272 case ACB_ADAPTER_TYPE_B: {
2278 struct MessageUnit_B *reg = acb->pmuB; 2273 struct MessageUnit_B *reg = acb->pmuB;
2279 do { 2274 do {
2280 firmware_state = readl(reg->iop2drv_doorbell_reg); 2275 firmware_state = readl(reg->iop2drv_doorbell);
2281 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0); 2276 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
2282 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell_reg); 2277 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
2283 } 2278 }
2284 break; 2279 break;
2285 } 2280 }
@@ -2288,22 +2283,19 @@ static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
2288static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb) 2283static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb)
2289{ 2284{
2290 struct MessageUnit_A __iomem *reg = acb->pmuA; 2285 struct MessageUnit_A __iomem *reg = acb->pmuA;
2291 2286 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) {
2292 if (unlikely(atomic_read(&acb->rq_map_token) == 0)) { 2287 return;
2293 acb->fw_state = false;
2294 } else { 2288 } else {
2295 /*to prevent rq_map_token from changing by other interrupt, then 2289 acb->fw_flag = FW_NORMAL;
2296 avoid the dead-lock*/ 2290 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
2297 acb->fw_state = true;
2298 atomic_dec(&acb->rq_map_token);
2299 if (!(acb->fw_state) ||
2300 (acb->ante_token_value == atomic_read(&acb->rq_map_token))) {
2301 atomic_set(&acb->rq_map_token, 16); 2291 atomic_set(&acb->rq_map_token, 16);
2302 } 2292 }
2303 acb->ante_token_value = atomic_read(&acb->rq_map_token); 2293 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
2294 if (atomic_dec_and_test(&acb->rq_map_token))
2295 return;
2304 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0); 2296 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2297 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
2305 } 2298 }
2306 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6000));
2307 return; 2299 return;
2308} 2300}
2309 2301
@@ -2311,21 +2303,19 @@ static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb)
2311{ 2303{
2312 struct MessageUnit_B __iomem *reg = acb->pmuB; 2304 struct MessageUnit_B __iomem *reg = acb->pmuB;
2313 2305
2314 if (unlikely(atomic_read(&acb->rq_map_token) == 0)) { 2306 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) {
2315 acb->fw_state = false; 2307 return;
2316 } else { 2308 } else {
2317 /*to prevent rq_map_token from changing by other interrupt, then 2309 acb->fw_flag = FW_NORMAL;
2318 avoid the dead-lock*/ 2310 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
2319 acb->fw_state = true;
2320 atomic_dec(&acb->rq_map_token);
2321 if (!(acb->fw_state) ||
2322 (acb->ante_token_value == atomic_read(&acb->rq_map_token))) {
2323 atomic_set(&acb->rq_map_token, 16); 2311 atomic_set(&acb->rq_map_token, 16);
2324 } 2312 }
2325 acb->ante_token_value = atomic_read(&acb->rq_map_token); 2313 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
2326 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell_reg); 2314 if (atomic_dec_and_test(&acb->rq_map_token))
2315 return;
2316 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
2317 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
2327 } 2318 }
2328 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6000));
2329 return; 2319 return;
2330} 2320}
2331 2321
@@ -2360,7 +2350,7 @@ static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb)
2360{ 2350{
2361 struct MessageUnit_B *reg = acb->pmuB; 2351 struct MessageUnit_B *reg = acb->pmuB;
2362 acb->acb_flags |= ACB_F_MSG_START_BGRB; 2352 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2363 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell_reg); 2353 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
2364 if (arcmsr_hbb_wait_msgint_ready(acb)) { 2354 if (arcmsr_hbb_wait_msgint_ready(acb)) {
2365 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 2355 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2366 rebulid' timeout \n",acb->host->host_no); 2356 rebulid' timeout \n",acb->host->host_no);
@@ -2396,8 +2386,8 @@ static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
2396 case ACB_ADAPTER_TYPE_B: { 2386 case ACB_ADAPTER_TYPE_B: {
2397 struct MessageUnit_B *reg = acb->pmuB; 2387 struct MessageUnit_B *reg = acb->pmuB;
2398 /*clear interrupt and message state*/ 2388 /*clear interrupt and message state*/
2399 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell_reg); 2389 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2400 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell_reg); 2390 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
2401 /* let IOP know data has been read */ 2391 /* let IOP know data has been read */
2402 } 2392 }
2403 break; 2393 break;
@@ -2412,7 +2402,7 @@ static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
2412 case ACB_ADAPTER_TYPE_B: 2402 case ACB_ADAPTER_TYPE_B:
2413 { 2403 {
2414 struct MessageUnit_B *reg = acb->pmuB; 2404 struct MessageUnit_B *reg = acb->pmuB;
2415 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell_reg); 2405 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
2416 if(arcmsr_hbb_wait_msgint_ready(acb)) { 2406 if(arcmsr_hbb_wait_msgint_ready(acb)) {
2417 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT"); 2407 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
2418 return; 2408 return;
@@ -2427,13 +2417,19 @@ static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
2427{ 2417{
2428 uint8_t value[64]; 2418 uint8_t value[64];
2429 int i; 2419 int i;
2420 struct MessageUnit_A __iomem *reg = acb->pmuA;
2430 2421
2431 /* backup pci config data */ 2422 /* backup pci config data */
2423 printk(KERN_ERR "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
2432 for (i = 0; i < 64; i++) { 2424 for (i = 0; i < 64; i++) {
2433 pci_read_config_byte(acb->pdev, i, &value[i]); 2425 pci_read_config_byte(acb->pdev, i, &value[i]);
2434 } 2426 }
2435 /* hardware reset signal */ 2427 /* hardware reset signal */
2428 if ((acb->dev_id == 0x1680)) {
2429 writel(ARCMSR_ARC1680_BUS_RESET, &reg->reserved1[0]);
2430 } else {
2436 pci_write_config_byte(acb->pdev, 0x84, 0x20); 2431 pci_write_config_byte(acb->pdev, 0x84, 0x20);
2432 }
2437 msleep(1000); 2433 msleep(1000);
2438 /* write back pci config data */ 2434 /* write back pci config data */
2439 for (i = 0; i < 64; i++) { 2435 for (i = 0; i < 64; i++) {
@@ -2446,37 +2442,25 @@ static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
2446**************************************************************************** 2442****************************************************************************
2447**************************************************************************** 2443****************************************************************************
2448*/ 2444*/
2449#ifdef CONFIG_SCSI_ARCMSR_RESET
2450 int arcmsr_sleep_for_bus_reset(struct scsi_cmnd *cmd) 2445 int arcmsr_sleep_for_bus_reset(struct scsi_cmnd *cmd)
2451 { 2446 {
2452 struct Scsi_Host *shost = NULL; 2447 struct Scsi_Host *shost = NULL;
2453 spinlock_t *host_lock = NULL;
2454 int i, isleep; 2448 int i, isleep;
2455 2449
2456 shost = cmd->device->host; 2450 shost = cmd->device->host;
2457 host_lock = shost->host_lock;
2458
2459 printk(KERN_NOTICE "Host %d bus reset over, sleep %d seconds (busy %d, can queue %d) ...........\n",
2460 shost->host_no, sleeptime, shost->host_busy, shost->can_queue);
2461 isleep = sleeptime / 10; 2451 isleep = sleeptime / 10;
2462 spin_unlock_irq(host_lock);
2463 if (isleep > 0) { 2452 if (isleep > 0) {
2464 for (i = 0; i < isleep; i++) { 2453 for (i = 0; i < isleep; i++) {
2465 msleep(10000); 2454 msleep(10000);
2466 printk(KERN_NOTICE "^%d^\n", i);
2467 } 2455 }
2468 } 2456 }
2469 2457
2470 isleep = sleeptime % 10; 2458 isleep = sleeptime % 10;
2471 if (isleep > 0) { 2459 if (isleep > 0) {
2472 msleep(isleep * 1000); 2460 msleep(isleep * 1000);
2473 printk(KERN_NOTICE "^v^\n");
2474 } 2461 }
2475 spin_lock_irq(host_lock);
2476 printk(KERN_NOTICE "***** wake up *****\n");
2477 return 0; 2462 return 0;
2478 } 2463 }
2479#endif
2480static void arcmsr_iop_init(struct AdapterControlBlock *acb) 2464static void arcmsr_iop_init(struct AdapterControlBlock *acb)
2481{ 2465{
2482 uint32_t intmask_org; 2466 uint32_t intmask_org;
@@ -2485,7 +2469,6 @@ static void arcmsr_iop_init(struct AdapterControlBlock *acb)
2485 intmask_org = arcmsr_disable_outbound_ints(acb); 2469 intmask_org = arcmsr_disable_outbound_ints(acb);
2486 arcmsr_wait_firmware_ready(acb); 2470 arcmsr_wait_firmware_ready(acb);
2487 arcmsr_iop_confirm(acb); 2471 arcmsr_iop_confirm(acb);
2488 arcmsr_get_firmware_spec(acb, 1);
2489 /*start background rebuild*/ 2472 /*start background rebuild*/
2490 arcmsr_start_adapter_bgrb(acb); 2473 arcmsr_start_adapter_bgrb(acb);
2491 /* empty doorbell Qbuffer if door bell ringed */ 2474 /* empty doorbell Qbuffer if door bell ringed */
@@ -2508,14 +2491,12 @@ static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
2508 intmask_org = arcmsr_disable_outbound_ints(acb); 2491 intmask_org = arcmsr_disable_outbound_ints(acb);
2509 /* talk to iop 331 outstanding command aborted */ 2492 /* talk to iop 331 outstanding command aborted */
2510 rtnval = arcmsr_abort_allcmd(acb); 2493 rtnval = arcmsr_abort_allcmd(acb);
2511 /* wait for 3 sec for all command aborted*/
2512 ssleep(3);
2513 /* clear all outbound posted Q */ 2494 /* clear all outbound posted Q */
2514 arcmsr_done4abort_postqueue(acb); 2495 arcmsr_done4abort_postqueue(acb);
2515 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 2496 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2516 ccb = acb->pccb_pool[i]; 2497 ccb = acb->pccb_pool[i];
2517 if (ccb->startdone == ARCMSR_CCB_START) { 2498 if (ccb->startdone == ARCMSR_CCB_START) {
2518 arcmsr_ccb_complete(ccb, 1); 2499 arcmsr_ccb_complete(ccb);
2519 } 2500 }
2520 } 2501 }
2521 atomic_set(&acb->ccboutstandingcount, 0); 2502 atomic_set(&acb->ccboutstandingcount, 0);
@@ -2530,54 +2511,49 @@ static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
2530{ 2511{
2531 struct AdapterControlBlock *acb = 2512 struct AdapterControlBlock *acb =
2532 (struct AdapterControlBlock *)cmd->device->host->hostdata; 2513 (struct AdapterControlBlock *)cmd->device->host->hostdata;
2533 int retry = 0; 2514 uint32_t intmask_org, outbound_doorbell;
2534 2515 int retry_count = 0;
2535 if (acb->acb_flags & ACB_F_BUS_RESET) 2516 int rtn = FAILED;
2536 return SUCCESS;
2537 2517
2538 printk(KERN_NOTICE "arcmsr%d: bus reset ..... \n", acb->adapter_index); 2518 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
2539 acb->acb_flags |= ACB_F_BUS_RESET; 2519 printk(KERN_ERR "arcmsr: executing eh bus reset .....num_resets = %d, \
2520 num_aborts = %d \n", acb->num_resets, acb->num_aborts);
2540 acb->num_resets++; 2521 acb->num_resets++;
2541 while (atomic_read(&acb->ccboutstandingcount) != 0 && retry < 4) {
2542 arcmsr_interrupt(acb);
2543 retry++;
2544 }
2545 2522
2546 if (arcmsr_iop_reset(acb)) {
2547 switch (acb->adapter_type) { 2523 switch (acb->adapter_type) {
2548 case ACB_ADAPTER_TYPE_A: { 2524 case ACB_ADAPTER_TYPE_A: {
2549 printk(KERN_NOTICE "arcmsr%d: do hardware bus reset, num_resets = %d num_aborts = %d \n", 2525 if (acb->acb_flags & ACB_F_BUS_RESET) {
2550 acb->adapter_index, acb->num_resets, acb->num_aborts); 2526 long timeout;
2527 timeout = wait_event_timeout(wait_q,
2528 (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
2529 if (timeout) {
2530 return SUCCESS;
2531 }
2532 }
2533 acb->acb_flags |= ACB_F_BUS_RESET;
2534 if (arcmsr_iop_reset(acb)) {
2535 struct MessageUnit_A __iomem *reg;
2536 reg = acb->pmuA;
2551 arcmsr_hardware_reset(acb); 2537 arcmsr_hardware_reset(acb);
2552 acb->acb_flags |= ACB_F_FIRMWARE_TRAP;
2553 acb->acb_flags &= ~ACB_F_IOP_INITED; 2538 acb->acb_flags &= ~ACB_F_IOP_INITED;
2554 #ifdef CONFIG_SCSI_ARCMSR_RESET
2555 struct MessageUnit_A __iomem *reg = acb->pmuA;
2556 uint32_t intmask_org, outbound_doorbell;
2557 int retry_count = 0;
2558sleep_again: 2539sleep_again:
2559 arcmsr_sleep_for_bus_reset(cmd); 2540 arcmsr_sleep_for_bus_reset(cmd);
2560 if ((readl(&reg->outbound_msgaddr1) & 2541 if ((readl(&reg->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) {
2561 ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) { 2542 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, \
2562 printk(KERN_NOTICE "arcmsr%d: hardware bus reset and return busy, retry=%d \n", 2543 retry=%d \n", acb->host->host_no, retry_count);
2563 acb->host->host_no, retry_count);
2564 if (retry_count > retrycount) { 2544 if (retry_count > retrycount) {
2565 printk(KERN_NOTICE "arcmsr%d: hardware bus reset and return busy, retry aborted \n", 2545 acb->fw_flag = FW_DEADLOCK;
2566 acb->host->host_no); 2546 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, \
2567 return SUCCESS; 2547 RETRY TERMINATED!! \n", acb->host->host_no);
2548 return FAILED;
2568 } 2549 }
2569 retry_count++; 2550 retry_count++;
2570 goto sleep_again; 2551 goto sleep_again;
2571 } 2552 }
2572 acb->acb_flags &= ~ACB_F_FIRMWARE_TRAP;
2573 acb->acb_flags |= ACB_F_IOP_INITED; 2553 acb->acb_flags |= ACB_F_IOP_INITED;
2574 acb->acb_flags &= ~ACB_F_BUS_RESET;
2575 printk(KERN_NOTICE "arcmsr%d: hardware bus reset and reset ok \n",
2576 acb->host->host_no);
2577 /* disable all outbound interrupt */ 2554 /* disable all outbound interrupt */
2578 intmask_org = arcmsr_disable_outbound_ints(acb); 2555 intmask_org = arcmsr_disable_outbound_ints(acb);
2579 arcmsr_get_firmware_spec(acb, 1); 2556 arcmsr_get_firmware_spec(acb);
2580 /*start background rebuild*/
2581 arcmsr_start_adapter_bgrb(acb); 2557 arcmsr_start_adapter_bgrb(acb);
2582 /* clear Qbuffer if door bell ringed */ 2558 /* clear Qbuffer if door bell ringed */
2583 outbound_doorbell = readl(&reg->outbound_doorbell); 2559 outbound_doorbell = readl(&reg->outbound_doorbell);
@@ -2586,38 +2562,74 @@ sleep_again:
2586 /* enable outbound Post Queue,outbound doorbell Interrupt */ 2562 /* enable outbound Post Queue,outbound doorbell Interrupt */
2587 arcmsr_enable_outbound_ints(acb, intmask_org); 2563 arcmsr_enable_outbound_ints(acb, intmask_org);
2588 atomic_set(&acb->rq_map_token, 16); 2564 atomic_set(&acb->rq_map_token, 16);
2565 atomic_set(&acb->ante_token_value, 16);
2566 acb->fw_flag = FW_NORMAL;
2567 init_timer(&acb->eternal_timer);
2568 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ);
2569 acb->eternal_timer.data = (unsigned long) acb;
2570 acb->eternal_timer.function = &arcmsr_request_device_map;
2571 add_timer(&acb->eternal_timer);
2572 acb->acb_flags &= ~ACB_F_BUS_RESET;
2573 rtn = SUCCESS;
2574 printk(KERN_ERR "arcmsr: scsi eh bus reset succeeds\n");
2575 } else {
2576 acb->acb_flags &= ~ACB_F_BUS_RESET;
2577 if (atomic_read(&acb->rq_map_token) == 0) {
2578 atomic_set(&acb->rq_map_token, 16);
2579 atomic_set(&acb->ante_token_value, 16);
2580 acb->fw_flag = FW_NORMAL;
2589 init_timer(&acb->eternal_timer); 2581 init_timer(&acb->eternal_timer);
2590 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(20*HZ); 2582 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ);
2591 acb->eternal_timer.data = (unsigned long) acb; 2583 acb->eternal_timer.data = (unsigned long) acb;
2592 acb->eternal_timer.function = &arcmsr_request_device_map; 2584 acb->eternal_timer.function = &arcmsr_request_device_map;
2593 add_timer(&acb->eternal_timer); 2585 add_timer(&acb->eternal_timer);
2594 #endif 2586 } else {
2587 atomic_set(&acb->rq_map_token, 16);
2588 atomic_set(&acb->ante_token_value, 16);
2589 acb->fw_flag = FW_NORMAL;
2590 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
2595 } 2591 }
2596 break; 2592 rtn = SUCCESS;
2597 case ACB_ADAPTER_TYPE_B: {
2598 } 2593 }
2594 break;
2599 } 2595 }
2596 case ACB_ADAPTER_TYPE_B:{
2597 acb->acb_flags |= ACB_F_BUS_RESET;
2598 if (arcmsr_iop_reset(acb)) {
2599 acb->acb_flags &= ~ACB_F_BUS_RESET;
2600 rtn = FAILED;
2600 } else { 2601 } else {
2601 acb->acb_flags &= ~ACB_F_BUS_RESET; 2602 acb->acb_flags &= ~ACB_F_BUS_RESET;
2603 if (atomic_read(&acb->rq_map_token) == 0) {
2604 atomic_set(&acb->rq_map_token, 16);
2605 atomic_set(&acb->ante_token_value, 16);
2606 acb->fw_flag = FW_NORMAL;
2607 init_timer(&acb->eternal_timer);
2608 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ);
2609 acb->eternal_timer.data = (unsigned long) acb;
2610 acb->eternal_timer.function = &arcmsr_request_device_map;
2611 add_timer(&acb->eternal_timer);
2612 } else {
2613 atomic_set(&acb->rq_map_token, 16);
2614 atomic_set(&acb->ante_token_value, 16);
2615 acb->fw_flag = FW_NORMAL;
2616 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
2617 }
2618 rtn = SUCCESS;
2602 } 2619 }
2603 return SUCCESS; 2620 }
2621 }
2622 return rtn;
2604} 2623}
2605 2624
2606static void arcmsr_abort_one_cmd(struct AdapterControlBlock *acb, 2625static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
2607 struct CommandControlBlock *ccb) 2626 struct CommandControlBlock *ccb)
2608{ 2627{
2609 u32 intmask; 2628 int rtn;
2610 2629 spin_lock_irq(&acb->eh_lock);
2611 ccb->startdone = ARCMSR_CCB_ABORTED; 2630 rtn = arcmsr_polling_ccbdone(acb, ccb);
2612 2631 spin_unlock_irq(&acb->eh_lock);
2613 /* 2632 return rtn;
2614 ** Wait for 3 sec for all command done.
2615 */
2616 ssleep(3);
2617
2618 intmask = arcmsr_disable_outbound_ints(acb);
2619 arcmsr_polling_ccbdone(acb, ccb);
2620 arcmsr_enable_outbound_ints(acb, intmask);
2621} 2633}
2622 2634
2623static int arcmsr_abort(struct scsi_cmnd *cmd) 2635static int arcmsr_abort(struct scsi_cmnd *cmd)
@@ -2625,10 +2637,12 @@ static int arcmsr_abort(struct scsi_cmnd *cmd)
2625 struct AdapterControlBlock *acb = 2637 struct AdapterControlBlock *acb =
2626 (struct AdapterControlBlock *)cmd->device->host->hostdata; 2638 (struct AdapterControlBlock *)cmd->device->host->hostdata;
2627 int i = 0; 2639 int i = 0;
2640 int rtn = FAILED;
2628 2641
2629 printk(KERN_NOTICE 2642 printk(KERN_NOTICE
2630 "arcmsr%d: abort device command of scsi id = %d lun = %d \n", 2643 "arcmsr%d: abort device command of scsi id = %d lun = %d \n",
2631 acb->host->host_no, cmd->device->id, cmd->device->lun); 2644 acb->host->host_no, cmd->device->id, cmd->device->lun);
2645 acb->acb_flags |= ACB_F_ABORT;
2632 acb->num_aborts++; 2646 acb->num_aborts++;
2633 /* 2647 /*
2634 ************************************************ 2648 ************************************************
@@ -2637,17 +2651,18 @@ static int arcmsr_abort(struct scsi_cmnd *cmd)
2637 ************************************************ 2651 ************************************************
2638 */ 2652 */
2639 if (!atomic_read(&acb->ccboutstandingcount)) 2653 if (!atomic_read(&acb->ccboutstandingcount))
2640 return SUCCESS; 2654 return rtn;
2641 2655
2642 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 2656 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2643 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 2657 struct CommandControlBlock *ccb = acb->pccb_pool[i];
2644 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) { 2658 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
2645 arcmsr_abort_one_cmd(acb, ccb); 2659 ccb->startdone = ARCMSR_CCB_ABORTED;
2660 rtn = arcmsr_abort_one_cmd(acb, ccb);
2646 break; 2661 break;
2647 } 2662 }
2648 } 2663 }
2649 2664 acb->acb_flags &= ~ACB_F_ABORT;
2650 return SUCCESS; 2665 return rtn;
2651} 2666}
2652 2667
2653static const char *arcmsr_info(struct Scsi_Host *host) 2668static const char *arcmsr_info(struct Scsi_Host *host)
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-17 00:24:10 -0500