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authorHannes Reinecke <hare@suse.de>2008-04-25 09:01:41 -0400
committerJames Bottomley <James.Bottomley@HansenPartnership.com>2008-04-27 13:20:00 -0400
commit3dbd10f3d8b00dad35d3fac95e91c066ae71d9a8 (patch)
treecbd020e0d4e9911afc88dbfc725f66139fb30129 /drivers/scsi/aic7xxx/aic7xxx.reg
parenta198c3d0393faa1fa9f0e6e917ce980d3638f8df (diff)
[SCSI] aic7xxx: teach aicasm to not emit unused debug code/data
Add a 'count' variable to each symbol which gets increased every time the symbol is referenced. And then modify the register definition to include counts for symbols which are referenced from the source code only and not from the sequencer code. This will give us an automatic usage count for the symbols with only minimal hand-crafting. Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Diffstat (limited to 'drivers/scsi/aic7xxx/aic7xxx.reg')
-rw-r--r--drivers/scsi/aic7xxx/aic7xxx.reg43
1 files changed, 43 insertions, 0 deletions
diff --git a/drivers/scsi/aic7xxx/aic7xxx.reg b/drivers/scsi/aic7xxx/aic7xxx.reg
index 2a103534df9f..0d2f763c3427 100644
--- a/drivers/scsi/aic7xxx/aic7xxx.reg
+++ b/drivers/scsi/aic7xxx/aic7xxx.reg
@@ -238,6 +238,7 @@ register SXFRCTL2 {
238register OPTIONMODE { 238register OPTIONMODE {
239 address 0x008 239 address 0x008
240 access_mode RW 240 access_mode RW
241 count 2
241 field AUTORATEEN 0x80 242 field AUTORATEEN 0x80
242 field AUTOACKEN 0x40 243 field AUTOACKEN 0x40
243 field ATNMGMNTEN 0x20 244 field ATNMGMNTEN 0x20
@@ -254,6 +255,7 @@ register TARGCRCCNT {
254 address 0x00a 255 address 0x00a
255 size 2 256 size 2
256 access_mode RW 257 access_mode RW
258 count 2
257} 259}
258 260
259/* 261/*
@@ -344,6 +346,7 @@ register SSTAT2 {
344register SSTAT3 { 346register SSTAT3 {
345 address 0x00e 347 address 0x00e
346 access_mode RO 348 access_mode RO
349 count 2
347 mask SCSICNT 0xf0 350 mask SCSICNT 0xf0
348 mask OFFCNT 0x0f 351 mask OFFCNT 0x0f
349 mask U2OFFCNT 0x7f 352 mask U2OFFCNT 0x7f
@@ -367,6 +370,7 @@ register SCSIID_ULTRA2 {
367register SIMODE0 { 370register SIMODE0 {
368 address 0x010 371 address 0x010
369 access_mode RW 372 access_mode RW
373 count 2
370 field ENSELDO 0x40 374 field ENSELDO 0x40
371 field ENSELDI 0x20 375 field ENSELDI 0x20
372 field ENSELINGO 0x10 376 field ENSELINGO 0x10
@@ -429,6 +433,7 @@ register SHADDR {
429register SELTIMER { 433register SELTIMER {
430 address 0x018 434 address 0x018
431 access_mode RW 435 access_mode RW
436 count 1
432 field STAGE6 0x20 437 field STAGE6 0x20
433 field STAGE5 0x10 438 field STAGE5 0x10
434 field STAGE4 0x08 439 field STAGE4 0x08
@@ -467,6 +472,7 @@ register TARGID {
467 address 0x01b 472 address 0x01b
468 size 2 473 size 2
469 access_mode RW 474 access_mode RW
475 count 14
470} 476}
471 477
472/* 478/*
@@ -480,6 +486,7 @@ register TARGID {
480register SPIOCAP { 486register SPIOCAP {
481 address 0x01b 487 address 0x01b
482 access_mode RW 488 access_mode RW
489 count 10
483 field SOFT1 0x80 490 field SOFT1 0x80
484 field SOFT0 0x40 491 field SOFT0 0x40
485 field SOFTCMDEN 0x20 492 field SOFTCMDEN 0x20
@@ -492,6 +499,7 @@ register SPIOCAP {
492 499
493register BRDCTL { 500register BRDCTL {
494 address 0x01d 501 address 0x01d
502 count 11
495 field BRDDAT7 0x80 503 field BRDDAT7 0x80
496 field BRDDAT6 0x40 504 field BRDDAT6 0x40
497 field BRDDAT5 0x20 505 field BRDDAT5 0x20
@@ -534,6 +542,7 @@ register BRDCTL {
534 */ 542 */
535register SEECTL { 543register SEECTL {
536 address 0x01e 544 address 0x01e
545 count 11
537 field EXTARBACK 0x80 546 field EXTARBACK 0x80
538 field EXTARBREQ 0x40 547 field EXTARBREQ 0x40
539 field SEEMS 0x20 548 field SEEMS 0x20
@@ -570,6 +579,7 @@ register SBLKCTL {
570register SEQCTL { 579register SEQCTL {
571 address 0x060 580 address 0x060
572 access_mode RW 581 access_mode RW
582 count 15
573 field PERRORDIS 0x80 583 field PERRORDIS 0x80
574 field PAUSEDIS 0x40 584 field PAUSEDIS 0x40
575 field FAILDIS 0x20 585 field FAILDIS 0x20
@@ -590,6 +600,7 @@ register SEQCTL {
590register SEQRAM { 600register SEQRAM {
591 address 0x061 601 address 0x061
592 access_mode RW 602 access_mode RW
603 count 2
593} 604}
594 605
595/* 606/*
@@ -604,6 +615,7 @@ register SEQADDR0 {
604register SEQADDR1 { 615register SEQADDR1 {
605 address 0x063 616 address 0x063
606 access_mode RW 617 access_mode RW
618 count 8
607 mask SEQADDR1_MASK 0x01 619 mask SEQADDR1_MASK 0x01
608} 620}
609 621
@@ -649,6 +661,7 @@ register NONE {
649register FLAGS { 661register FLAGS {
650 address 0x06b 662 address 0x06b
651 access_mode RO 663 access_mode RO
664 count 18
652 field ZERO 0x02 665 field ZERO 0x02
653 field CARRY 0x01 666 field CARRY 0x01
654} 667}
@@ -671,6 +684,7 @@ register FUNCTION1 {
671register STACK { 684register STACK {
672 address 0x06f 685 address 0x06f
673 access_mode RO 686 access_mode RO
687 count 5
674} 688}
675 689
676const STACK_SIZE 4 690const STACK_SIZE 4
@@ -692,6 +706,7 @@ register BCTL {
692register DSCOMMAND0 { 706register DSCOMMAND0 {
693 address 0x084 707 address 0x084
694 access_mode RW 708 access_mode RW
709 count 7
695 field CACHETHEN 0x80 /* Cache Threshold enable */ 710 field CACHETHEN 0x80 /* Cache Threshold enable */
696 field DPARCKEN 0x40 /* Data Parity Check Enable */ 711 field DPARCKEN 0x40 /* Data Parity Check Enable */
697 field MPARCKEN 0x20 /* Memory Parity Check Enable */ 712 field MPARCKEN 0x20 /* Memory Parity Check Enable */
@@ -717,6 +732,7 @@ register DSCOMMAND1 {
717register BUSTIME { 732register BUSTIME {
718 address 0x085 733 address 0x085
719 access_mode RW 734 access_mode RW
735 count 2
720 mask BOFF 0xf0 736 mask BOFF 0xf0
721 mask BON 0x0f 737 mask BON 0x0f
722} 738}
@@ -727,6 +743,7 @@ register BUSTIME {
727register BUSSPD { 743register BUSSPD {
728 address 0x086 744 address 0x086
729 access_mode RW 745 access_mode RW
746 count 2
730 mask DFTHRSH 0xc0 747 mask DFTHRSH 0xc0
731 mask STBOFF 0x38 748 mask STBOFF 0x38
732 mask STBON 0x07 749 mask STBON 0x07
@@ -737,6 +754,7 @@ register BUSSPD {
737/* aic7850/55/60/70/80/95 only */ 754/* aic7850/55/60/70/80/95 only */
738register DSPCISTATUS { 755register DSPCISTATUS {
739 address 0x086 756 address 0x086
757 count 4
740 mask DFTHRSH_100 0xc0 758 mask DFTHRSH_100 0xc0
741} 759}
742 760
@@ -758,6 +776,7 @@ const SEQ_MAILBOX_SHIFT 0
758register HCNTRL { 776register HCNTRL {
759 address 0x087 777 address 0x087
760 access_mode RW 778 access_mode RW
779 count 14
761 field POWRDN 0x40 780 field POWRDN 0x40
762 field SWINT 0x10 781 field SWINT 0x10
763 field IRQMS 0x08 782 field IRQMS 0x08
@@ -869,6 +888,7 @@ register INTSTAT {
869register ERROR { 888register ERROR {
870 address 0x092 889 address 0x092
871 access_mode RO 890 access_mode RO
891 count 26
872 field CIOPARERR 0x80 /* Ultra2 only */ 892 field CIOPARERR 0x80 /* Ultra2 only */
873 field PCIERRSTAT 0x40 /* PCI only */ 893 field PCIERRSTAT 0x40 /* PCI only */
874 field MPARERR 0x20 /* PCI only */ 894 field MPARERR 0x20 /* PCI only */
@@ -885,6 +905,7 @@ register ERROR {
885register CLRINT { 905register CLRINT {
886 address 0x092 906 address 0x092
887 access_mode WO 907 access_mode WO
908 count 24
888 field CLRPARERR 0x10 /* PCI only */ 909 field CLRPARERR 0x10 /* PCI only */
889 field CLRBRKADRINT 0x08 910 field CLRBRKADRINT 0x08
890 field CLRSCSIINT 0x04 911 field CLRSCSIINT 0x04
@@ -943,6 +964,7 @@ register DFDAT {
943register SCBCNT { 964register SCBCNT {
944 address 0x09a 965 address 0x09a
945 access_mode RW 966 access_mode RW
967 count 1
946 field SCBAUTO 0x80 968 field SCBAUTO 0x80
947 mask SCBCNT_MASK 0x1f 969 mask SCBCNT_MASK 0x1f
948} 970}
@@ -954,6 +976,7 @@ register SCBCNT {
954register QINFIFO { 976register QINFIFO {
955 address 0x09b 977 address 0x09b
956 access_mode RW 978 access_mode RW
979 count 12
957} 980}
958 981
959/* 982/*
@@ -972,11 +995,13 @@ register QINCNT {
972register QOUTFIFO { 995register QOUTFIFO {
973 address 0x09d 996 address 0x09d
974 access_mode WO 997 access_mode WO
998 count 7
975} 999}
976 1000
977register CRCCONTROL1 { 1001register CRCCONTROL1 {
978 address 0x09d 1002 address 0x09d
979 access_mode RW 1003 access_mode RW
1004 count 3
980 field CRCONSEEN 0x80 1005 field CRCONSEEN 0x80
981 field CRCVALCHKEN 0x40 1006 field CRCVALCHKEN 0x40
982 field CRCENDCHKEN 0x20 1007 field CRCENDCHKEN 0x20
@@ -1013,6 +1038,7 @@ register SCSIPHASE {
1013register SFUNCT { 1038register SFUNCT {
1014 address 0x09f 1039 address 0x09f
1015 access_mode RW 1040 access_mode RW
1041 count 4
1016 field ALT_MODE 0x80 1042 field ALT_MODE 0x80
1017} 1043}
1018 1044
@@ -1095,6 +1121,7 @@ scb {
1095 } 1121 }
1096 SCB_SCSIOFFSET { 1122 SCB_SCSIOFFSET {
1097 size 1 1123 size 1
1124 count 1
1098 } 1125 }
1099 SCB_NEXT { 1126 SCB_NEXT {
1100 size 1 1127 size 1
@@ -1118,6 +1145,7 @@ const SG_SIZEOF 0x08 /* sizeof(struct ahc_dma) */
1118register SEECTL_2840 { 1145register SEECTL_2840 {
1119 address 0x0c0 1146 address 0x0c0
1120 access_mode RW 1147 access_mode RW
1148 count 2
1121 field CS_2840 0x04 1149 field CS_2840 0x04
1122 field CK_2840 0x02 1150 field CK_2840 0x02
1123 field DO_2840 0x01 1151 field DO_2840 0x01
@@ -1126,6 +1154,7 @@ register SEECTL_2840 {
1126register STATUS_2840 { 1154register STATUS_2840 {
1127 address 0x0c1 1155 address 0x0c1
1128 access_mode RW 1156 access_mode RW
1157 count 4
1129 field EEPROM_TF 0x80 1158 field EEPROM_TF 0x80
1130 mask BIOS_SEL 0x60 1159 mask BIOS_SEL 0x60
1131 mask ADSEL 0x1e 1160 mask ADSEL 0x1e
@@ -1161,6 +1190,7 @@ register CCSGCTL {
1161 1190
1162register CCSCBCNT { 1191register CCSCBCNT {
1163 address 0xEF 1192 address 0xEF
1193 count 1
1164} 1194}
1165 1195
1166register CCSCBCTL { 1196register CCSCBCTL {
@@ -1187,6 +1217,7 @@ register CCSCBRAM {
1187register SCBBADDR { 1217register SCBBADDR {
1188 address 0x0F0 1218 address 0x0F0
1189 access_mode RW 1219 access_mode RW
1220 count 3
1190} 1221}
1191 1222
1192register CCSCBPTR { 1223register CCSCBPTR {
@@ -1195,6 +1226,7 @@ register CCSCBPTR {
1195 1226
1196register HNSCB_QOFF { 1227register HNSCB_QOFF {
1197 address 0x0F4 1228 address 0x0F4
1229 count 4
1198} 1230}
1199 1231
1200register SNSCB_QOFF { 1232register SNSCB_QOFF {
@@ -1234,6 +1266,7 @@ register DFF_THRSH {
1234 mask WR_DFTHRSH_85 0x50 1266 mask WR_DFTHRSH_85 0x50
1235 mask WR_DFTHRSH_90 0x60 1267 mask WR_DFTHRSH_90 0x60
1236 mask WR_DFTHRSH_MAX 0x70 1268 mask WR_DFTHRSH_MAX 0x70
1269 count 4
1237} 1270}
1238 1271
1239register SG_CACHE_PRE { 1272register SG_CACHE_PRE {
@@ -1287,6 +1320,7 @@ scratch_ram {
1287 ULTRA_ENB { 1320 ULTRA_ENB {
1288 alias CMDSIZE_TABLE 1321 alias CMDSIZE_TABLE
1289 size 2 1322 size 2
1323 count 2
1290 } 1324 }
1291 /* 1325 /*
1292 * Bit vector of targets that have disconnection disabled as set by 1326 * Bit vector of targets that have disconnection disabled as set by
@@ -1296,6 +1330,7 @@ scratch_ram {
1296 */ 1330 */
1297 DISC_DSB { 1331 DISC_DSB {
1298 size 2 1332 size 2
1333 count 6
1299 } 1334 }
1300 CMDSIZE_TABLE_TAIL { 1335 CMDSIZE_TABLE_TAIL {
1301 size 4 1336 size 4
@@ -1323,6 +1358,7 @@ scratch_ram {
1323 /* Parameters for DMA Logic */ 1358 /* Parameters for DMA Logic */
1324 DMAPARAMS { 1359 DMAPARAMS {
1325 size 1 1360 size 1
1361 count 12
1326 field PRELOADEN 0x80 1362 field PRELOADEN 0x80
1327 field WIDEODD 0x40 1363 field WIDEODD 0x40
1328 field SCSIEN 0x20 1364 field SCSIEN 0x20
@@ -1441,6 +1477,7 @@ scratch_ram {
1441 } 1477 }
1442 ARG_1 { 1478 ARG_1 {
1443 size 1 1479 size 1
1480 count 1
1444 mask SEND_MSG 0x80 1481 mask SEND_MSG 0x80
1445 mask SEND_SENSE 0x40 1482 mask SEND_SENSE 0x40
1446 mask SEND_REJ 0x20 1483 mask SEND_REJ 0x20
@@ -1495,6 +1532,7 @@ scratch_ram {
1495 size 1 1532 size 1
1496 field HA_274_EXTENDED_TRANS 0x01 1533 field HA_274_EXTENDED_TRANS 0x01
1497 alias INITIATOR_TAG 1534 alias INITIATOR_TAG
1535 count 1
1498 } 1536 }
1499 1537
1500 SEQ_FLAGS2 { 1538 SEQ_FLAGS2 {
@@ -1518,6 +1556,7 @@ scratch_ram {
1518 */ 1556 */
1519 SCSICONF { 1557 SCSICONF {
1520 size 1 1558 size 1
1559 count 12
1521 field TERM_ENB 0x80 1560 field TERM_ENB 0x80
1522 field RESET_SCSI 0x40 1561 field RESET_SCSI 0x40
1523 field ENSPCHK 0x20 1562 field ENSPCHK 0x20
@@ -1527,16 +1566,19 @@ scratch_ram {
1527 INTDEF { 1566 INTDEF {
1528 address 0x05c 1567 address 0x05c
1529 size 1 1568 size 1
1569 count 1
1530 field EDGE_TRIG 0x80 1570 field EDGE_TRIG 0x80
1531 mask VECTOR 0x0f 1571 mask VECTOR 0x0f
1532 } 1572 }
1533 HOSTCONF { 1573 HOSTCONF {
1534 address 0x05d 1574 address 0x05d
1535 size 1 1575 size 1
1576 count 1
1536 } 1577 }
1537 HA_274_BIOSCTRL { 1578 HA_274_BIOSCTRL {
1538 address 0x05f 1579 address 0x05f
1539 size 1 1580 size 1
1581 count 1
1540 mask BIOSMODE 0x30 1582 mask BIOSMODE 0x30
1541 mask BIOSDISABLED 0x30 1583 mask BIOSDISABLED 0x30
1542 field CHANNEL_B_PRIMARY 0x08 1584 field CHANNEL_B_PRIMARY 0x08
@@ -1552,6 +1594,7 @@ scratch_ram {
1552 */ 1594 */
1553 TARG_OFFSET { 1595 TARG_OFFSET {
1554 size 16 1596 size 16
1597 count 1
1555 } 1598 }
1556} 1599}
1557 1600
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-20 05:39:15 -0500