diff options
author | Denys Vlasenko <vda.linux@googlemail.com> | 2008-03-22 23:41:22 -0400 |
---|---|---|
committer | James Bottomley <James.Bottomley@HansenPartnership.com> | 2008-04-24 10:09:18 -0400 |
commit | be0d67680d524981dd65c661efe3c9cbd52a684f (patch) | |
tree | c9f48421ee7396bcc593c0a0ef8415dd18e1eaba /drivers/scsi/aic7xxx/aic79xx_inline.h | |
parent | 93c20a59af4624aedf53f8320606b355aa951bc1 (diff) |
[SCSI] aic7xxx, aic79xx: deinline functions
Deinlines and moves big functions from .h to .c files.
Adds prototypes for ahc_lookup_scb and ahd_lookup_scb to .h files.
Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Diffstat (limited to 'drivers/scsi/aic7xxx/aic79xx_inline.h')
-rw-r--r-- | drivers/scsi/aic7xxx/aic79xx_inline.h | 903 |
1 files changed, 86 insertions, 817 deletions
diff --git a/drivers/scsi/aic7xxx/aic79xx_inline.h b/drivers/scsi/aic7xxx/aic79xx_inline.h index 45e55575a0fa..875137262156 100644 --- a/drivers/scsi/aic7xxx/aic79xx_inline.h +++ b/drivers/scsi/aic7xxx/aic79xx_inline.h | |||
@@ -63,18 +63,19 @@ static __inline ahd_mode_state ahd_build_mode_state(struct ahd_softc *ahd, | |||
63 | static __inline void ahd_extract_mode_state(struct ahd_softc *ahd, | 63 | static __inline void ahd_extract_mode_state(struct ahd_softc *ahd, |
64 | ahd_mode_state state, | 64 | ahd_mode_state state, |
65 | ahd_mode *src, ahd_mode *dst); | 65 | ahd_mode *src, ahd_mode *dst); |
66 | static __inline void ahd_set_modes(struct ahd_softc *ahd, ahd_mode src, | 66 | |
67 | ahd_mode dst); | 67 | void ahd_set_modes(struct ahd_softc *ahd, ahd_mode src, |
68 | static __inline void ahd_update_modes(struct ahd_softc *ahd); | 68 | ahd_mode dst); |
69 | static __inline void ahd_assert_modes(struct ahd_softc *ahd, ahd_mode srcmode, | 69 | void ahd_update_modes(struct ahd_softc *ahd); |
70 | ahd_mode dstmode, const char *file, | 70 | void ahd_assert_modes(struct ahd_softc *ahd, ahd_mode srcmode, |
71 | int line); | 71 | ahd_mode dstmode, const char *file, |
72 | static __inline ahd_mode_state ahd_save_modes(struct ahd_softc *ahd); | 72 | int line); |
73 | static __inline void ahd_restore_modes(struct ahd_softc *ahd, | 73 | ahd_mode_state ahd_save_modes(struct ahd_softc *ahd); |
74 | ahd_mode_state state); | 74 | void ahd_restore_modes(struct ahd_softc *ahd, |
75 | static __inline int ahd_is_paused(struct ahd_softc *ahd); | 75 | ahd_mode_state state); |
76 | static __inline void ahd_pause(struct ahd_softc *ahd); | 76 | int ahd_is_paused(struct ahd_softc *ahd); |
77 | static __inline void ahd_unpause(struct ahd_softc *ahd); | 77 | void ahd_pause(struct ahd_softc *ahd); |
78 | void ahd_unpause(struct ahd_softc *ahd); | ||
78 | 79 | ||
79 | static __inline void | 80 | static __inline void |
80 | ahd_known_modes(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst) | 81 | ahd_known_modes(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst) |
@@ -99,256 +100,37 @@ ahd_extract_mode_state(struct ahd_softc *ahd, ahd_mode_state state, | |||
99 | *dst = (state & DST_MODE) >> DST_MODE_SHIFT; | 100 | *dst = (state & DST_MODE) >> DST_MODE_SHIFT; |
100 | } | 101 | } |
101 | 102 | ||
102 | static __inline void | ||
103 | ahd_set_modes(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst) | ||
104 | { | ||
105 | if (ahd->src_mode == src && ahd->dst_mode == dst) | ||
106 | return; | ||
107 | #ifdef AHD_DEBUG | ||
108 | if (ahd->src_mode == AHD_MODE_UNKNOWN | ||
109 | || ahd->dst_mode == AHD_MODE_UNKNOWN) | ||
110 | panic("Setting mode prior to saving it.\n"); | ||
111 | if ((ahd_debug & AHD_SHOW_MODEPTR) != 0) | ||
112 | printf("%s: Setting mode 0x%x\n", ahd_name(ahd), | ||
113 | ahd_build_mode_state(ahd, src, dst)); | ||
114 | #endif | ||
115 | ahd_outb(ahd, MODE_PTR, ahd_build_mode_state(ahd, src, dst)); | ||
116 | ahd->src_mode = src; | ||
117 | ahd->dst_mode = dst; | ||
118 | } | ||
119 | |||
120 | static __inline void | ||
121 | ahd_update_modes(struct ahd_softc *ahd) | ||
122 | { | ||
123 | ahd_mode_state mode_ptr; | ||
124 | ahd_mode src; | ||
125 | ahd_mode dst; | ||
126 | |||
127 | mode_ptr = ahd_inb(ahd, MODE_PTR); | ||
128 | #ifdef AHD_DEBUG | ||
129 | if ((ahd_debug & AHD_SHOW_MODEPTR) != 0) | ||
130 | printf("Reading mode 0x%x\n", mode_ptr); | ||
131 | #endif | ||
132 | ahd_extract_mode_state(ahd, mode_ptr, &src, &dst); | ||
133 | ahd_known_modes(ahd, src, dst); | ||
134 | } | ||
135 | |||
136 | static __inline void | ||
137 | ahd_assert_modes(struct ahd_softc *ahd, ahd_mode srcmode, | ||
138 | ahd_mode dstmode, const char *file, int line) | ||
139 | { | ||
140 | #ifdef AHD_DEBUG | ||
141 | if ((srcmode & AHD_MK_MSK(ahd->src_mode)) == 0 | ||
142 | || (dstmode & AHD_MK_MSK(ahd->dst_mode)) == 0) { | ||
143 | panic("%s:%s:%d: Mode assertion failed.\n", | ||
144 | ahd_name(ahd), file, line); | ||
145 | } | ||
146 | #endif | ||
147 | } | ||
148 | |||
149 | static __inline ahd_mode_state | ||
150 | ahd_save_modes(struct ahd_softc *ahd) | ||
151 | { | ||
152 | if (ahd->src_mode == AHD_MODE_UNKNOWN | ||
153 | || ahd->dst_mode == AHD_MODE_UNKNOWN) | ||
154 | ahd_update_modes(ahd); | ||
155 | |||
156 | return (ahd_build_mode_state(ahd, ahd->src_mode, ahd->dst_mode)); | ||
157 | } | ||
158 | |||
159 | static __inline void | ||
160 | ahd_restore_modes(struct ahd_softc *ahd, ahd_mode_state state) | ||
161 | { | ||
162 | ahd_mode src; | ||
163 | ahd_mode dst; | ||
164 | |||
165 | ahd_extract_mode_state(ahd, state, &src, &dst); | ||
166 | ahd_set_modes(ahd, src, dst); | ||
167 | } | ||
168 | |||
169 | #define AHD_ASSERT_MODES(ahd, source, dest) \ | ||
170 | ahd_assert_modes(ahd, source, dest, __FILE__, __LINE__); | ||
171 | |||
172 | /* | ||
173 | * Determine whether the sequencer has halted code execution. | ||
174 | * Returns non-zero status if the sequencer is stopped. | ||
175 | */ | ||
176 | static __inline int | ||
177 | ahd_is_paused(struct ahd_softc *ahd) | ||
178 | { | ||
179 | return ((ahd_inb(ahd, HCNTRL) & PAUSE) != 0); | ||
180 | } | ||
181 | |||
182 | /* | ||
183 | * Request that the sequencer stop and wait, indefinitely, for it | ||
184 | * to stop. The sequencer will only acknowledge that it is paused | ||
185 | * once it has reached an instruction boundary and PAUSEDIS is | ||
186 | * cleared in the SEQCTL register. The sequencer may use PAUSEDIS | ||
187 | * for critical sections. | ||
188 | */ | ||
189 | static __inline void | ||
190 | ahd_pause(struct ahd_softc *ahd) | ||
191 | { | ||
192 | ahd_outb(ahd, HCNTRL, ahd->pause); | ||
193 | |||
194 | /* | ||
195 | * Since the sequencer can disable pausing in a critical section, we | ||
196 | * must loop until it actually stops. | ||
197 | */ | ||
198 | while (ahd_is_paused(ahd) == 0) | ||
199 | ; | ||
200 | } | ||
201 | |||
202 | /* | ||
203 | * Allow the sequencer to continue program execution. | ||
204 | * We check here to ensure that no additional interrupt | ||
205 | * sources that would cause the sequencer to halt have been | ||
206 | * asserted. If, for example, a SCSI bus reset is detected | ||
207 | * while we are fielding a different, pausing, interrupt type, | ||
208 | * we don't want to release the sequencer before going back | ||
209 | * into our interrupt handler and dealing with this new | ||
210 | * condition. | ||
211 | */ | ||
212 | static __inline void | ||
213 | ahd_unpause(struct ahd_softc *ahd) | ||
214 | { | ||
215 | /* | ||
216 | * Automatically restore our modes to those saved | ||
217 | * prior to the first change of the mode. | ||
218 | */ | ||
219 | if (ahd->saved_src_mode != AHD_MODE_UNKNOWN | ||
220 | && ahd->saved_dst_mode != AHD_MODE_UNKNOWN) { | ||
221 | if ((ahd->flags & AHD_UPDATE_PEND_CMDS) != 0) | ||
222 | ahd_reset_cmds_pending(ahd); | ||
223 | ahd_set_modes(ahd, ahd->saved_src_mode, ahd->saved_dst_mode); | ||
224 | } | ||
225 | |||
226 | if ((ahd_inb(ahd, INTSTAT) & ~CMDCMPLT) == 0) | ||
227 | ahd_outb(ahd, HCNTRL, ahd->unpause); | ||
228 | |||
229 | ahd_known_modes(ahd, AHD_MODE_UNKNOWN, AHD_MODE_UNKNOWN); | ||
230 | } | ||
231 | |||
232 | /*********************** Scatter Gather List Handling *************************/ | 103 | /*********************** Scatter Gather List Handling *************************/ |
233 | static __inline void *ahd_sg_setup(struct ahd_softc *ahd, struct scb *scb, | 104 | void *ahd_sg_setup(struct ahd_softc *ahd, struct scb *scb, |
234 | void *sgptr, dma_addr_t addr, | 105 | void *sgptr, dma_addr_t addr, |
235 | bus_size_t len, int last); | 106 | bus_size_t len, int last); |
236 | static __inline void ahd_setup_scb_common(struct ahd_softc *ahd, | 107 | void ahd_setup_scb_common(struct ahd_softc *ahd, |
237 | struct scb *scb); | 108 | struct scb *scb); |
238 | static __inline void ahd_setup_data_scb(struct ahd_softc *ahd, | 109 | void ahd_setup_data_scb(struct ahd_softc *ahd, |
239 | struct scb *scb); | 110 | struct scb *scb); |
240 | static __inline void ahd_setup_noxfer_scb(struct ahd_softc *ahd, | 111 | void ahd_setup_noxfer_scb(struct ahd_softc *ahd, |
241 | struct scb *scb); | 112 | struct scb *scb); |
242 | |||
243 | static __inline void * | ||
244 | ahd_sg_setup(struct ahd_softc *ahd, struct scb *scb, | ||
245 | void *sgptr, dma_addr_t addr, bus_size_t len, int last) | ||
246 | { | ||
247 | scb->sg_count++; | ||
248 | if (sizeof(dma_addr_t) > 4 | ||
249 | && (ahd->flags & AHD_64BIT_ADDRESSING) != 0) { | ||
250 | struct ahd_dma64_seg *sg; | ||
251 | |||
252 | sg = (struct ahd_dma64_seg *)sgptr; | ||
253 | sg->addr = ahd_htole64(addr); | ||
254 | sg->len = ahd_htole32(len | (last ? AHD_DMA_LAST_SEG : 0)); | ||
255 | return (sg + 1); | ||
256 | } else { | ||
257 | struct ahd_dma_seg *sg; | ||
258 | |||
259 | sg = (struct ahd_dma_seg *)sgptr; | ||
260 | sg->addr = ahd_htole32(addr & 0xFFFFFFFF); | ||
261 | sg->len = ahd_htole32(len | ((addr >> 8) & 0x7F000000) | ||
262 | | (last ? AHD_DMA_LAST_SEG : 0)); | ||
263 | return (sg + 1); | ||
264 | } | ||
265 | } | ||
266 | |||
267 | static __inline void | ||
268 | ahd_setup_scb_common(struct ahd_softc *ahd, struct scb *scb) | ||
269 | { | ||
270 | /* XXX Handle target mode SCBs. */ | ||
271 | scb->crc_retry_count = 0; | ||
272 | if ((scb->flags & SCB_PACKETIZED) != 0) { | ||
273 | /* XXX what about ACA?? It is type 4, but TAG_TYPE == 0x3. */ | ||
274 | scb->hscb->task_attribute = scb->hscb->control & SCB_TAG_TYPE; | ||
275 | } else { | ||
276 | if (ahd_get_transfer_length(scb) & 0x01) | ||
277 | scb->hscb->task_attribute = SCB_XFERLEN_ODD; | ||
278 | else | ||
279 | scb->hscb->task_attribute = 0; | ||
280 | } | ||
281 | |||
282 | if (scb->hscb->cdb_len <= MAX_CDB_LEN_WITH_SENSE_ADDR | ||
283 | || (scb->hscb->cdb_len & SCB_CDB_LEN_PTR) != 0) | ||
284 | scb->hscb->shared_data.idata.cdb_plus_saddr.sense_addr = | ||
285 | ahd_htole32(scb->sense_busaddr); | ||
286 | } | ||
287 | |||
288 | static __inline void | ||
289 | ahd_setup_data_scb(struct ahd_softc *ahd, struct scb *scb) | ||
290 | { | ||
291 | /* | ||
292 | * Copy the first SG into the "current" data ponter area. | ||
293 | */ | ||
294 | if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0) { | ||
295 | struct ahd_dma64_seg *sg; | ||
296 | |||
297 | sg = (struct ahd_dma64_seg *)scb->sg_list; | ||
298 | scb->hscb->dataptr = sg->addr; | ||
299 | scb->hscb->datacnt = sg->len; | ||
300 | } else { | ||
301 | struct ahd_dma_seg *sg; | ||
302 | uint32_t *dataptr_words; | ||
303 | |||
304 | sg = (struct ahd_dma_seg *)scb->sg_list; | ||
305 | dataptr_words = (uint32_t*)&scb->hscb->dataptr; | ||
306 | dataptr_words[0] = sg->addr; | ||
307 | dataptr_words[1] = 0; | ||
308 | if ((ahd->flags & AHD_39BIT_ADDRESSING) != 0) { | ||
309 | uint64_t high_addr; | ||
310 | |||
311 | high_addr = ahd_le32toh(sg->len) & 0x7F000000; | ||
312 | scb->hscb->dataptr |= ahd_htole64(high_addr << 8); | ||
313 | } | ||
314 | scb->hscb->datacnt = sg->len; | ||
315 | } | ||
316 | /* | ||
317 | * Note where to find the SG entries in bus space. | ||
318 | * We also set the full residual flag which the | ||
319 | * sequencer will clear as soon as a data transfer | ||
320 | * occurs. | ||
321 | */ | ||
322 | scb->hscb->sgptr = ahd_htole32(scb->sg_list_busaddr|SG_FULL_RESID); | ||
323 | } | ||
324 | |||
325 | static __inline void | ||
326 | ahd_setup_noxfer_scb(struct ahd_softc *ahd, struct scb *scb) | ||
327 | { | ||
328 | scb->hscb->sgptr = ahd_htole32(SG_LIST_NULL); | ||
329 | scb->hscb->dataptr = 0; | ||
330 | scb->hscb->datacnt = 0; | ||
331 | } | ||
332 | 113 | ||
333 | /************************** Memory mapping routines ***************************/ | 114 | /************************** Memory mapping routines ***************************/ |
334 | static __inline size_t ahd_sg_size(struct ahd_softc *ahd); | 115 | static __inline size_t ahd_sg_size(struct ahd_softc *ahd); |
335 | static __inline void * | 116 | |
336 | ahd_sg_bus_to_virt(struct ahd_softc *ahd, | 117 | void * |
337 | struct scb *scb, | 118 | ahd_sg_bus_to_virt(struct ahd_softc *ahd, |
338 | uint32_t sg_busaddr); | 119 | struct scb *scb, |
339 | static __inline uint32_t | 120 | uint32_t sg_busaddr); |
340 | ahd_sg_virt_to_bus(struct ahd_softc *ahd, | 121 | uint32_t |
341 | struct scb *scb, | 122 | ahd_sg_virt_to_bus(struct ahd_softc *ahd, |
342 | void *sg); | 123 | struct scb *scb, |
343 | static __inline void ahd_sync_scb(struct ahd_softc *ahd, | 124 | void *sg); |
344 | struct scb *scb, int op); | 125 | void ahd_sync_scb(struct ahd_softc *ahd, |
345 | static __inline void ahd_sync_sglist(struct ahd_softc *ahd, | 126 | struct scb *scb, int op); |
346 | struct scb *scb, int op); | 127 | void ahd_sync_sglist(struct ahd_softc *ahd, |
347 | static __inline void ahd_sync_sense(struct ahd_softc *ahd, | 128 | struct scb *scb, int op); |
348 | struct scb *scb, int op); | 129 | void ahd_sync_sense(struct ahd_softc *ahd, |
349 | static __inline uint32_t | 130 | struct scb *scb, int op); |
350 | ahd_targetcmd_offset(struct ahd_softc *ahd, | 131 | uint32_t |
351 | u_int index); | 132 | ahd_targetcmd_offset(struct ahd_softc *ahd, |
133 | u_int index); | ||
352 | 134 | ||
353 | static __inline size_t | 135 | static __inline size_t |
354 | ahd_sg_size(struct ahd_softc *ahd) | 136 | ahd_sg_size(struct ahd_softc *ahd) |
@@ -358,104 +140,48 @@ ahd_sg_size(struct ahd_softc *ahd) | |||
358 | return (sizeof(struct ahd_dma_seg)); | 140 | return (sizeof(struct ahd_dma_seg)); |
359 | } | 141 | } |
360 | 142 | ||
361 | static __inline void * | ||
362 | ahd_sg_bus_to_virt(struct ahd_softc *ahd, struct scb *scb, uint32_t sg_busaddr) | ||
363 | { | ||
364 | dma_addr_t sg_offset; | ||
365 | |||
366 | /* sg_list_phys points to entry 1, not 0 */ | ||
367 | sg_offset = sg_busaddr - (scb->sg_list_busaddr - ahd_sg_size(ahd)); | ||
368 | return ((uint8_t *)scb->sg_list + sg_offset); | ||
369 | } | ||
370 | |||
371 | static __inline uint32_t | ||
372 | ahd_sg_virt_to_bus(struct ahd_softc *ahd, struct scb *scb, void *sg) | ||
373 | { | ||
374 | dma_addr_t sg_offset; | ||
375 | |||
376 | /* sg_list_phys points to entry 1, not 0 */ | ||
377 | sg_offset = ((uint8_t *)sg - (uint8_t *)scb->sg_list) | ||
378 | - ahd_sg_size(ahd); | ||
379 | |||
380 | return (scb->sg_list_busaddr + sg_offset); | ||
381 | } | ||
382 | |||
383 | static __inline void | ||
384 | ahd_sync_scb(struct ahd_softc *ahd, struct scb *scb, int op) | ||
385 | { | ||
386 | ahd_dmamap_sync(ahd, ahd->scb_data.hscb_dmat, | ||
387 | scb->hscb_map->dmamap, | ||
388 | /*offset*/(uint8_t*)scb->hscb - scb->hscb_map->vaddr, | ||
389 | /*len*/sizeof(*scb->hscb), op); | ||
390 | } | ||
391 | |||
392 | static __inline void | ||
393 | ahd_sync_sglist(struct ahd_softc *ahd, struct scb *scb, int op) | ||
394 | { | ||
395 | if (scb->sg_count == 0) | ||
396 | return; | ||
397 | |||
398 | ahd_dmamap_sync(ahd, ahd->scb_data.sg_dmat, | ||
399 | scb->sg_map->dmamap, | ||
400 | /*offset*/scb->sg_list_busaddr - ahd_sg_size(ahd), | ||
401 | /*len*/ahd_sg_size(ahd) * scb->sg_count, op); | ||
402 | } | ||
403 | |||
404 | static __inline void | ||
405 | ahd_sync_sense(struct ahd_softc *ahd, struct scb *scb, int op) | ||
406 | { | ||
407 | ahd_dmamap_sync(ahd, ahd->scb_data.sense_dmat, | ||
408 | scb->sense_map->dmamap, | ||
409 | /*offset*/scb->sense_busaddr, | ||
410 | /*len*/AHD_SENSE_BUFSIZE, op); | ||
411 | } | ||
412 | |||
413 | static __inline uint32_t | ||
414 | ahd_targetcmd_offset(struct ahd_softc *ahd, u_int index) | ||
415 | { | ||
416 | return (((uint8_t *)&ahd->targetcmds[index]) | ||
417 | - (uint8_t *)ahd->qoutfifo); | ||
418 | } | ||
419 | |||
420 | /*********************** Miscellaneous Support Functions ***********************/ | 143 | /*********************** Miscellaneous Support Functions ***********************/ |
421 | static __inline struct ahd_initiator_tinfo * | 144 | struct ahd_initiator_tinfo * |
422 | ahd_fetch_transinfo(struct ahd_softc *ahd, | 145 | ahd_fetch_transinfo(struct ahd_softc *ahd, |
423 | char channel, u_int our_id, | 146 | char channel, u_int our_id, |
424 | u_int remote_id, | 147 | u_int remote_id, |
425 | struct ahd_tmode_tstate **tstate); | 148 | struct ahd_tmode_tstate **tstate); |
426 | static __inline uint16_t | 149 | uint16_t |
427 | ahd_inw(struct ahd_softc *ahd, u_int port); | 150 | ahd_inw(struct ahd_softc *ahd, u_int port); |
428 | static __inline void ahd_outw(struct ahd_softc *ahd, u_int port, | 151 | void ahd_outw(struct ahd_softc *ahd, u_int port, |
429 | u_int value); | 152 | u_int value); |
430 | static __inline uint32_t | 153 | uint32_t |
431 | ahd_inl(struct ahd_softc *ahd, u_int port); | 154 | ahd_inl(struct ahd_softc *ahd, u_int port); |
432 | static __inline void ahd_outl(struct ahd_softc *ahd, u_int port, | 155 | void ahd_outl(struct ahd_softc *ahd, u_int port, |
433 | uint32_t value); | 156 | uint32_t value); |
434 | static __inline uint64_t | 157 | uint64_t |
435 | ahd_inq(struct ahd_softc *ahd, u_int port); | 158 | ahd_inq(struct ahd_softc *ahd, u_int port); |
436 | static __inline void ahd_outq(struct ahd_softc *ahd, u_int port, | 159 | void ahd_outq(struct ahd_softc *ahd, u_int port, |
437 | uint64_t value); | 160 | uint64_t value); |
438 | static __inline u_int ahd_get_scbptr(struct ahd_softc *ahd); | 161 | u_int ahd_get_scbptr(struct ahd_softc *ahd); |
439 | static __inline void ahd_set_scbptr(struct ahd_softc *ahd, u_int scbptr); | 162 | void ahd_set_scbptr(struct ahd_softc *ahd, u_int scbptr); |
440 | static __inline u_int ahd_get_hnscb_qoff(struct ahd_softc *ahd); | 163 | u_int ahd_get_hnscb_qoff(struct ahd_softc *ahd); |
441 | static __inline void ahd_set_hnscb_qoff(struct ahd_softc *ahd, u_int value); | 164 | void ahd_set_hnscb_qoff(struct ahd_softc *ahd, u_int value); |
442 | static __inline u_int ahd_get_hescb_qoff(struct ahd_softc *ahd); | 165 | u_int ahd_get_hescb_qoff(struct ahd_softc *ahd); |
443 | static __inline void ahd_set_hescb_qoff(struct ahd_softc *ahd, u_int value); | 166 | void ahd_set_hescb_qoff(struct ahd_softc *ahd, u_int value); |
444 | static __inline u_int ahd_get_snscb_qoff(struct ahd_softc *ahd); | 167 | u_int ahd_get_snscb_qoff(struct ahd_softc *ahd); |
445 | static __inline void ahd_set_snscb_qoff(struct ahd_softc *ahd, u_int value); | 168 | void ahd_set_snscb_qoff(struct ahd_softc *ahd, u_int value); |
446 | static __inline u_int ahd_get_sescb_qoff(struct ahd_softc *ahd); | 169 | u_int ahd_get_sescb_qoff(struct ahd_softc *ahd); |
447 | static __inline void ahd_set_sescb_qoff(struct ahd_softc *ahd, u_int value); | 170 | void ahd_set_sescb_qoff(struct ahd_softc *ahd, u_int value); |
448 | static __inline u_int ahd_get_sdscb_qoff(struct ahd_softc *ahd); | 171 | u_int ahd_get_sdscb_qoff(struct ahd_softc *ahd); |
449 | static __inline void ahd_set_sdscb_qoff(struct ahd_softc *ahd, u_int value); | 172 | void ahd_set_sdscb_qoff(struct ahd_softc *ahd, u_int value); |
450 | static __inline u_int ahd_inb_scbram(struct ahd_softc *ahd, u_int offset); | 173 | u_int ahd_inb_scbram(struct ahd_softc *ahd, u_int offset); |
451 | static __inline u_int ahd_inw_scbram(struct ahd_softc *ahd, u_int offset); | 174 | u_int ahd_inw_scbram(struct ahd_softc *ahd, u_int offset); |
452 | static __inline uint32_t | 175 | uint32_t |
453 | ahd_inl_scbram(struct ahd_softc *ahd, u_int offset); | 176 | ahd_inl_scbram(struct ahd_softc *ahd, u_int offset); |
454 | static __inline uint64_t | 177 | uint64_t |
455 | ahd_inq_scbram(struct ahd_softc *ahd, u_int offset); | 178 | ahd_inq_scbram(struct ahd_softc *ahd, u_int offset); |
456 | static __inline void ahd_swap_with_next_hscb(struct ahd_softc *ahd, | 179 | struct scb * |
457 | struct scb *scb); | 180 | ahd_lookup_scb(struct ahd_softc *ahd, u_int tag); |
458 | static __inline void ahd_queue_scb(struct ahd_softc *ahd, struct scb *scb); | 181 | void ahd_swap_with_next_hscb(struct ahd_softc *ahd, |
182 | struct scb *scb); | ||
183 | void ahd_queue_scb(struct ahd_softc *ahd, struct scb *scb); | ||
184 | |||
459 | static __inline uint8_t * | 185 | static __inline uint8_t * |
460 | ahd_get_sense_buf(struct ahd_softc *ahd, | 186 | ahd_get_sense_buf(struct ahd_softc *ahd, |
461 | struct scb *scb); | 187 | struct scb *scb); |
@@ -463,25 +189,7 @@ static __inline uint32_t | |||
463 | ahd_get_sense_bufaddr(struct ahd_softc *ahd, | 189 | ahd_get_sense_bufaddr(struct ahd_softc *ahd, |
464 | struct scb *scb); | 190 | struct scb *scb); |
465 | 191 | ||
466 | /* | 192 | #if 0 /* unused */ |
467 | * Return pointers to the transfer negotiation information | ||
468 | * for the specified our_id/remote_id pair. | ||
469 | */ | ||
470 | static __inline struct ahd_initiator_tinfo * | ||
471 | ahd_fetch_transinfo(struct ahd_softc *ahd, char channel, u_int our_id, | ||
472 | u_int remote_id, struct ahd_tmode_tstate **tstate) | ||
473 | { | ||
474 | /* | ||
475 | * Transfer data structures are stored from the perspective | ||
476 | * of the target role. Since the parameters for a connection | ||
477 | * in the initiator role to a given target are the same as | ||
478 | * when the roles are reversed, we pretend we are the target. | ||
479 | */ | ||
480 | if (channel == 'B') | ||
481 | our_id += 8; | ||
482 | *tstate = ahd->enabled_targets[our_id]; | ||
483 | return (&(*tstate)->transinfo[remote_id]); | ||
484 | } | ||
485 | 193 | ||
486 | #define AHD_COPY_COL_IDX(dst, src) \ | 194 | #define AHD_COPY_COL_IDX(dst, src) \ |
487 | do { \ | 195 | do { \ |
@@ -489,304 +197,7 @@ do { \ | |||
489 | dst->hscb->lun = src->hscb->lun; \ | 197 | dst->hscb->lun = src->hscb->lun; \ |
490 | } while (0) | 198 | } while (0) |
491 | 199 | ||
492 | static __inline uint16_t | ||
493 | ahd_inw(struct ahd_softc *ahd, u_int port) | ||
494 | { | ||
495 | /* | ||
496 | * Read high byte first as some registers increment | ||
497 | * or have other side effects when the low byte is | ||
498 | * read. | ||
499 | */ | ||
500 | uint16_t r = ahd_inb(ahd, port+1) << 8; | ||
501 | return r | ahd_inb(ahd, port); | ||
502 | } | ||
503 | |||
504 | static __inline void | ||
505 | ahd_outw(struct ahd_softc *ahd, u_int port, u_int value) | ||
506 | { | ||
507 | /* | ||
508 | * Write low byte first to accomodate registers | ||
509 | * such as PRGMCNT where the order maters. | ||
510 | */ | ||
511 | ahd_outb(ahd, port, value & 0xFF); | ||
512 | ahd_outb(ahd, port+1, (value >> 8) & 0xFF); | ||
513 | } | ||
514 | |||
515 | static __inline uint32_t | ||
516 | ahd_inl(struct ahd_softc *ahd, u_int port) | ||
517 | { | ||
518 | return ((ahd_inb(ahd, port)) | ||
519 | | (ahd_inb(ahd, port+1) << 8) | ||
520 | | (ahd_inb(ahd, port+2) << 16) | ||
521 | | (ahd_inb(ahd, port+3) << 24)); | ||
522 | } | ||
523 | |||
524 | static __inline void | ||
525 | ahd_outl(struct ahd_softc *ahd, u_int port, uint32_t value) | ||
526 | { | ||
527 | ahd_outb(ahd, port, (value) & 0xFF); | ||
528 | ahd_outb(ahd, port+1, ((value) >> 8) & 0xFF); | ||
529 | ahd_outb(ahd, port+2, ((value) >> 16) & 0xFF); | ||
530 | ahd_outb(ahd, port+3, ((value) >> 24) & 0xFF); | ||
531 | } | ||
532 | |||
533 | static __inline uint64_t | ||
534 | ahd_inq(struct ahd_softc *ahd, u_int port) | ||
535 | { | ||
536 | return ((ahd_inb(ahd, port)) | ||
537 | | (ahd_inb(ahd, port+1) << 8) | ||
538 | | (ahd_inb(ahd, port+2) << 16) | ||
539 | | (ahd_inb(ahd, port+3) << 24) | ||
540 | | (((uint64_t)ahd_inb(ahd, port+4)) << 32) | ||
541 | | (((uint64_t)ahd_inb(ahd, port+5)) << 40) | ||
542 | | (((uint64_t)ahd_inb(ahd, port+6)) << 48) | ||
543 | | (((uint64_t)ahd_inb(ahd, port+7)) << 56)); | ||
544 | } | ||
545 | |||
546 | static __inline void | ||
547 | ahd_outq(struct ahd_softc *ahd, u_int port, uint64_t value) | ||
548 | { | ||
549 | ahd_outb(ahd, port, value & 0xFF); | ||
550 | ahd_outb(ahd, port+1, (value >> 8) & 0xFF); | ||
551 | ahd_outb(ahd, port+2, (value >> 16) & 0xFF); | ||
552 | ahd_outb(ahd, port+3, (value >> 24) & 0xFF); | ||
553 | ahd_outb(ahd, port+4, (value >> 32) & 0xFF); | ||
554 | ahd_outb(ahd, port+5, (value >> 40) & 0xFF); | ||
555 | ahd_outb(ahd, port+6, (value >> 48) & 0xFF); | ||
556 | ahd_outb(ahd, port+7, (value >> 56) & 0xFF); | ||
557 | } | ||
558 | |||
559 | static __inline u_int | ||
560 | ahd_get_scbptr(struct ahd_softc *ahd) | ||
561 | { | ||
562 | AHD_ASSERT_MODES(ahd, ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK), | ||
563 | ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK)); | ||
564 | return (ahd_inb(ahd, SCBPTR) | (ahd_inb(ahd, SCBPTR + 1) << 8)); | ||
565 | } | ||
566 | |||
567 | static __inline void | ||
568 | ahd_set_scbptr(struct ahd_softc *ahd, u_int scbptr) | ||
569 | { | ||
570 | AHD_ASSERT_MODES(ahd, ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK), | ||
571 | ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK)); | ||
572 | ahd_outb(ahd, SCBPTR, scbptr & 0xFF); | ||
573 | ahd_outb(ahd, SCBPTR+1, (scbptr >> 8) & 0xFF); | ||
574 | } | ||
575 | |||
576 | static __inline u_int | ||
577 | ahd_get_hnscb_qoff(struct ahd_softc *ahd) | ||
578 | { | ||
579 | return (ahd_inw_atomic(ahd, HNSCB_QOFF)); | ||
580 | } | ||
581 | |||
582 | static __inline void | ||
583 | ahd_set_hnscb_qoff(struct ahd_softc *ahd, u_int value) | ||
584 | { | ||
585 | ahd_outw_atomic(ahd, HNSCB_QOFF, value); | ||
586 | } | ||
587 | |||
588 | static __inline u_int | ||
589 | ahd_get_hescb_qoff(struct ahd_softc *ahd) | ||
590 | { | ||
591 | return (ahd_inb(ahd, HESCB_QOFF)); | ||
592 | } | ||
593 | |||
594 | static __inline void | ||
595 | ahd_set_hescb_qoff(struct ahd_softc *ahd, u_int value) | ||
596 | { | ||
597 | ahd_outb(ahd, HESCB_QOFF, value); | ||
598 | } | ||
599 | |||
600 | static __inline u_int | ||
601 | ahd_get_snscb_qoff(struct ahd_softc *ahd) | ||
602 | { | ||
603 | u_int oldvalue; | ||
604 | |||
605 | AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK); | ||
606 | oldvalue = ahd_inw(ahd, SNSCB_QOFF); | ||
607 | ahd_outw(ahd, SNSCB_QOFF, oldvalue); | ||
608 | return (oldvalue); | ||
609 | } | ||
610 | |||
611 | static __inline void | ||
612 | ahd_set_snscb_qoff(struct ahd_softc *ahd, u_int value) | ||
613 | { | ||
614 | AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK); | ||
615 | ahd_outw(ahd, SNSCB_QOFF, value); | ||
616 | } | ||
617 | |||
618 | static __inline u_int | ||
619 | ahd_get_sescb_qoff(struct ahd_softc *ahd) | ||
620 | { | ||
621 | AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK); | ||
622 | return (ahd_inb(ahd, SESCB_QOFF)); | ||
623 | } | ||
624 | |||
625 | static __inline void | ||
626 | ahd_set_sescb_qoff(struct ahd_softc *ahd, u_int value) | ||
627 | { | ||
628 | AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK); | ||
629 | ahd_outb(ahd, SESCB_QOFF, value); | ||
630 | } | ||
631 | |||
632 | static __inline u_int | ||
633 | ahd_get_sdscb_qoff(struct ahd_softc *ahd) | ||
634 | { | ||
635 | AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK); | ||
636 | return (ahd_inb(ahd, SDSCB_QOFF) | (ahd_inb(ahd, SDSCB_QOFF + 1) << 8)); | ||
637 | } | ||
638 | |||
639 | static __inline void | ||
640 | ahd_set_sdscb_qoff(struct ahd_softc *ahd, u_int value) | ||
641 | { | ||
642 | AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK); | ||
643 | ahd_outb(ahd, SDSCB_QOFF, value & 0xFF); | ||
644 | ahd_outb(ahd, SDSCB_QOFF+1, (value >> 8) & 0xFF); | ||
645 | } | ||
646 | |||
647 | static __inline u_int | ||
648 | ahd_inb_scbram(struct ahd_softc *ahd, u_int offset) | ||
649 | { | ||
650 | u_int value; | ||
651 | |||
652 | /* | ||
653 | * Workaround PCI-X Rev A. hardware bug. | ||
654 | * After a host read of SCB memory, the chip | ||
655 | * may become confused into thinking prefetch | ||
656 | * was required. This starts the discard timer | ||
657 | * running and can cause an unexpected discard | ||
658 | * timer interrupt. The work around is to read | ||
659 | * a normal register prior to the exhaustion of | ||
660 | * the discard timer. The mode pointer register | ||
661 | * has no side effects and so serves well for | ||
662 | * this purpose. | ||
663 | * | ||
664 | * Razor #528 | ||
665 | */ | ||
666 | value = ahd_inb(ahd, offset); | ||
667 | if ((ahd->bugs & AHD_PCIX_SCBRAM_RD_BUG) != 0) | ||
668 | ahd_inb(ahd, MODE_PTR); | ||
669 | return (value); | ||
670 | } | ||
671 | |||
672 | static __inline u_int | ||
673 | ahd_inw_scbram(struct ahd_softc *ahd, u_int offset) | ||
674 | { | ||
675 | return (ahd_inb_scbram(ahd, offset) | ||
676 | | (ahd_inb_scbram(ahd, offset+1) << 8)); | ||
677 | } | ||
678 | |||
679 | static __inline uint32_t | ||
680 | ahd_inl_scbram(struct ahd_softc *ahd, u_int offset) | ||
681 | { | ||
682 | return (ahd_inw_scbram(ahd, offset) | ||
683 | | (ahd_inw_scbram(ahd, offset+2) << 16)); | ||
684 | } | ||
685 | |||
686 | static __inline uint64_t | ||
687 | ahd_inq_scbram(struct ahd_softc *ahd, u_int offset) | ||
688 | { | ||
689 | return (ahd_inl_scbram(ahd, offset) | ||
690 | | ((uint64_t)ahd_inl_scbram(ahd, offset+4)) << 32); | ||
691 | } | ||
692 | |||
693 | static __inline struct scb * | ||
694 | ahd_lookup_scb(struct ahd_softc *ahd, u_int tag) | ||
695 | { | ||
696 | struct scb* scb; | ||
697 | |||
698 | if (tag >= AHD_SCB_MAX) | ||
699 | return (NULL); | ||
700 | scb = ahd->scb_data.scbindex[tag]; | ||
701 | if (scb != NULL) | ||
702 | ahd_sync_scb(ahd, scb, | ||
703 | BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); | ||
704 | return (scb); | ||
705 | } | ||
706 | |||
707 | static __inline void | ||
708 | ahd_swap_with_next_hscb(struct ahd_softc *ahd, struct scb *scb) | ||
709 | { | ||
710 | struct hardware_scb *q_hscb; | ||
711 | struct map_node *q_hscb_map; | ||
712 | uint32_t saved_hscb_busaddr; | ||
713 | |||
714 | /* | ||
715 | * Our queuing method is a bit tricky. The card | ||
716 | * knows in advance which HSCB (by address) to download, | ||
717 | * and we can't disappoint it. To achieve this, the next | ||
718 | * HSCB to download is saved off in ahd->next_queued_hscb. | ||
719 | * When we are called to queue "an arbitrary scb", | ||
720 | * we copy the contents of the incoming HSCB to the one | ||
721 | * the sequencer knows about, swap HSCB pointers and | ||
722 | * finally assign the SCB to the tag indexed location | ||
723 | * in the scb_array. This makes sure that we can still | ||
724 | * locate the correct SCB by SCB_TAG. | ||
725 | */ | ||
726 | q_hscb = ahd->next_queued_hscb; | ||
727 | q_hscb_map = ahd->next_queued_hscb_map; | ||
728 | saved_hscb_busaddr = q_hscb->hscb_busaddr; | ||
729 | memcpy(q_hscb, scb->hscb, sizeof(*scb->hscb)); | ||
730 | q_hscb->hscb_busaddr = saved_hscb_busaddr; | ||
731 | q_hscb->next_hscb_busaddr = scb->hscb->hscb_busaddr; | ||
732 | |||
733 | /* Now swap HSCB pointers. */ | ||
734 | ahd->next_queued_hscb = scb->hscb; | ||
735 | ahd->next_queued_hscb_map = scb->hscb_map; | ||
736 | scb->hscb = q_hscb; | ||
737 | scb->hscb_map = q_hscb_map; | ||
738 | |||
739 | /* Now define the mapping from tag to SCB in the scbindex */ | ||
740 | ahd->scb_data.scbindex[SCB_GET_TAG(scb)] = scb; | ||
741 | } | ||
742 | |||
743 | /* | ||
744 | * Tell the sequencer about a new transaction to execute. | ||
745 | */ | ||
746 | static __inline void | ||
747 | ahd_queue_scb(struct ahd_softc *ahd, struct scb *scb) | ||
748 | { | ||
749 | ahd_swap_with_next_hscb(ahd, scb); | ||
750 | |||
751 | if (SCBID_IS_NULL(SCB_GET_TAG(scb))) | ||
752 | panic("Attempt to queue invalid SCB tag %x\n", | ||
753 | SCB_GET_TAG(scb)); | ||
754 | |||
755 | /* | ||
756 | * Keep a history of SCBs we've downloaded in the qinfifo. | ||
757 | */ | ||
758 | ahd->qinfifo[AHD_QIN_WRAP(ahd->qinfifonext)] = SCB_GET_TAG(scb); | ||
759 | ahd->qinfifonext++; | ||
760 | |||
761 | if (scb->sg_count != 0) | ||
762 | ahd_setup_data_scb(ahd, scb); | ||
763 | else | ||
764 | ahd_setup_noxfer_scb(ahd, scb); | ||
765 | ahd_setup_scb_common(ahd, scb); | ||
766 | |||
767 | /* | ||
768 | * Make sure our data is consistent from the | ||
769 | * perspective of the adapter. | ||
770 | */ | ||
771 | ahd_sync_scb(ahd, scb, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); | ||
772 | |||
773 | #ifdef AHD_DEBUG | ||
774 | if ((ahd_debug & AHD_SHOW_QUEUE) != 0) { | ||
775 | uint64_t host_dataptr; | ||
776 | |||
777 | host_dataptr = ahd_le64toh(scb->hscb->dataptr); | ||
778 | printf("%s: Queueing SCB %d:0x%x bus addr 0x%x - 0x%x%x/0x%x\n", | ||
779 | ahd_name(ahd), | ||
780 | SCB_GET_TAG(scb), scb->hscb->scsiid, | ||
781 | ahd_le32toh(scb->hscb->hscb_busaddr), | ||
782 | (u_int)((host_dataptr >> 32) & 0xFFFFFFFF), | ||
783 | (u_int)(host_dataptr & 0xFFFFFFFF), | ||
784 | ahd_le32toh(scb->hscb->datacnt)); | ||
785 | } | ||
786 | #endif | 200 | #endif |
787 | /* Tell the adapter about the newly queued SCB */ | ||
788 | ahd_set_hnscb_qoff(ahd, ahd->qinfifonext); | ||
789 | } | ||
790 | 201 | ||
791 | static __inline uint8_t * | 202 | static __inline uint8_t * |
792 | ahd_get_sense_buf(struct ahd_softc *ahd, struct scb *scb) | 203 | ahd_get_sense_buf(struct ahd_softc *ahd, struct scb *scb) |
@@ -801,151 +212,9 @@ ahd_get_sense_bufaddr(struct ahd_softc *ahd, struct scb *scb) | |||
801 | } | 212 | } |
802 | 213 | ||
803 | /************************** Interrupt Processing ******************************/ | 214 | /************************** Interrupt Processing ******************************/ |
804 | static __inline void ahd_sync_qoutfifo(struct ahd_softc *ahd, int op); | 215 | void ahd_sync_qoutfifo(struct ahd_softc *ahd, int op); |
805 | static __inline void ahd_sync_tqinfifo(struct ahd_softc *ahd, int op); | 216 | void ahd_sync_tqinfifo(struct ahd_softc *ahd, int op); |
806 | static __inline u_int ahd_check_cmdcmpltqueues(struct ahd_softc *ahd); | 217 | u_int ahd_check_cmdcmpltqueues(struct ahd_softc *ahd); |
807 | static __inline int ahd_intr(struct ahd_softc *ahd); | 218 | int ahd_intr(struct ahd_softc *ahd); |
808 | |||
809 | static __inline void | ||
810 | ahd_sync_qoutfifo(struct ahd_softc *ahd, int op) | ||
811 | { | ||
812 | ahd_dmamap_sync(ahd, ahd->shared_data_dmat, ahd->shared_data_map.dmamap, | ||
813 | /*offset*/0, | ||
814 | /*len*/AHD_SCB_MAX * sizeof(struct ahd_completion), op); | ||
815 | } | ||
816 | |||
817 | static __inline void | ||
818 | ahd_sync_tqinfifo(struct ahd_softc *ahd, int op) | ||
819 | { | ||
820 | #ifdef AHD_TARGET_MODE | ||
821 | if ((ahd->flags & AHD_TARGETROLE) != 0) { | ||
822 | ahd_dmamap_sync(ahd, ahd->shared_data_dmat, | ||
823 | ahd->shared_data_map.dmamap, | ||
824 | ahd_targetcmd_offset(ahd, 0), | ||
825 | sizeof(struct target_cmd) * AHD_TMODE_CMDS, | ||
826 | op); | ||
827 | } | ||
828 | #endif | ||
829 | } | ||
830 | |||
831 | /* | ||
832 | * See if the firmware has posted any completed commands | ||
833 | * into our in-core command complete fifos. | ||
834 | */ | ||
835 | #define AHD_RUN_QOUTFIFO 0x1 | ||
836 | #define AHD_RUN_TQINFIFO 0x2 | ||
837 | static __inline u_int | ||
838 | ahd_check_cmdcmpltqueues(struct ahd_softc *ahd) | ||
839 | { | ||
840 | u_int retval; | ||
841 | |||
842 | retval = 0; | ||
843 | ahd_dmamap_sync(ahd, ahd->shared_data_dmat, ahd->shared_data_map.dmamap, | ||
844 | /*offset*/ahd->qoutfifonext * sizeof(*ahd->qoutfifo), | ||
845 | /*len*/sizeof(*ahd->qoutfifo), BUS_DMASYNC_POSTREAD); | ||
846 | if (ahd->qoutfifo[ahd->qoutfifonext].valid_tag | ||
847 | == ahd->qoutfifonext_valid_tag) | ||
848 | retval |= AHD_RUN_QOUTFIFO; | ||
849 | #ifdef AHD_TARGET_MODE | ||
850 | if ((ahd->flags & AHD_TARGETROLE) != 0 | ||
851 | && (ahd->flags & AHD_TQINFIFO_BLOCKED) == 0) { | ||
852 | ahd_dmamap_sync(ahd, ahd->shared_data_dmat, | ||
853 | ahd->shared_data_map.dmamap, | ||
854 | ahd_targetcmd_offset(ahd, ahd->tqinfifofnext), | ||
855 | /*len*/sizeof(struct target_cmd), | ||
856 | BUS_DMASYNC_POSTREAD); | ||
857 | if (ahd->targetcmds[ahd->tqinfifonext].cmd_valid != 0) | ||
858 | retval |= AHD_RUN_TQINFIFO; | ||
859 | } | ||
860 | #endif | ||
861 | return (retval); | ||
862 | } | ||
863 | |||
864 | /* | ||
865 | * Catch an interrupt from the adapter | ||
866 | */ | ||
867 | static __inline int | ||
868 | ahd_intr(struct ahd_softc *ahd) | ||
869 | { | ||
870 | u_int intstat; | ||
871 | |||
872 | if ((ahd->pause & INTEN) == 0) { | ||
873 | /* | ||
874 | * Our interrupt is not enabled on the chip | ||
875 | * and may be disabled for re-entrancy reasons, | ||
876 | * so just return. This is likely just a shared | ||
877 | * interrupt. | ||
878 | */ | ||
879 | return (0); | ||
880 | } | ||
881 | |||
882 | /* | ||
883 | * Instead of directly reading the interrupt status register, | ||
884 | * infer the cause of the interrupt by checking our in-core | ||
885 | * completion queues. This avoids a costly PCI bus read in | ||
886 | * most cases. | ||
887 | */ | ||
888 | if ((ahd->flags & AHD_ALL_INTERRUPTS) == 0 | ||
889 | && (ahd_check_cmdcmpltqueues(ahd) != 0)) | ||
890 | intstat = CMDCMPLT; | ||
891 | else | ||
892 | intstat = ahd_inb(ahd, INTSTAT); | ||
893 | |||
894 | if ((intstat & INT_PEND) == 0) | ||
895 | return (0); | ||
896 | |||
897 | if (intstat & CMDCMPLT) { | ||
898 | ahd_outb(ahd, CLRINT, CLRCMDINT); | ||
899 | |||
900 | /* | ||
901 | * Ensure that the chip sees that we've cleared | ||
902 | * this interrupt before we walk the output fifo. | ||
903 | * Otherwise, we may, due to posted bus writes, | ||
904 | * clear the interrupt after we finish the scan, | ||
905 | * and after the sequencer has added new entries | ||
906 | * and asserted the interrupt again. | ||
907 | */ | ||
908 | if ((ahd->bugs & AHD_INTCOLLISION_BUG) != 0) { | ||
909 | if (ahd_is_paused(ahd)) { | ||
910 | /* | ||
911 | * Potentially lost SEQINT. | ||
912 | * If SEQINTCODE is non-zero, | ||
913 | * simulate the SEQINT. | ||
914 | */ | ||
915 | if (ahd_inb(ahd, SEQINTCODE) != NO_SEQINT) | ||
916 | intstat |= SEQINT; | ||
917 | } | ||
918 | } else { | ||
919 | ahd_flush_device_writes(ahd); | ||
920 | } | ||
921 | ahd_run_qoutfifo(ahd); | ||
922 | ahd->cmdcmplt_counts[ahd->cmdcmplt_bucket]++; | ||
923 | ahd->cmdcmplt_total++; | ||
924 | #ifdef AHD_TARGET_MODE | ||
925 | if ((ahd->flags & AHD_TARGETROLE) != 0) | ||
926 | ahd_run_tqinfifo(ahd, /*paused*/FALSE); | ||
927 | #endif | ||
928 | } | ||
929 | |||
930 | /* | ||
931 | * Handle statuses that may invalidate our cached | ||
932 | * copy of INTSTAT separately. | ||
933 | */ | ||
934 | if (intstat == 0xFF && (ahd->features & AHD_REMOVABLE) != 0) { | ||
935 | /* Hot eject. Do nothing */ | ||
936 | } else if (intstat & HWERRINT) { | ||
937 | ahd_handle_hwerrint(ahd); | ||
938 | } else if ((intstat & (PCIINT|SPLTINT)) != 0) { | ||
939 | ahd->bus_intr(ahd); | ||
940 | } else { | ||
941 | |||
942 | if ((intstat & SEQINT) != 0) | ||
943 | ahd_handle_seqint(ahd, intstat); | ||
944 | |||
945 | if ((intstat & SCSIINT) != 0) | ||
946 | ahd_handle_scsiint(ahd, intstat); | ||
947 | } | ||
948 | return (1); | ||
949 | } | ||
950 | 219 | ||
951 | #endif /* _AIC79XX_INLINE_H_ */ | 220 | #endif /* _AIC79XX_INLINE_H_ */ |