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authorTejun Heo <htejun@gmail.com>2006-02-10 03:25:47 -0500
committerJeff Garzik <jgarzik@pobox.com>2006-02-10 07:04:31 -0500
commitcc9278ed5e992122a654a3f762561ee5e013810f (patch)
tree9a089a52a4afefd09fcc49cd9490acee2aa1289a /drivers/scsi/ahci.c
parentf63790201521ccadb63673ff121dac46ab300cf0 (diff)
[PATCH] ahci: separate out ahci_fill_cmd_slot()
Separate out ahci_fill_cmd_slot() from ahci_qc_prep(). ahci_fill_cmd_slot() can later be used to issue non-standard commands. (e.g. softreset) Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'drivers/scsi/ahci.c')
-rw-r--r--drivers/scsi/ahci.c44
1 files changed, 23 insertions, 21 deletions
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
index fa01894fc41b..98ce6bb62ff8 100644
--- a/drivers/scsi/ahci.c
+++ b/drivers/scsi/ahci.c
@@ -507,6 +507,15 @@ static unsigned int ahci_dev_classify(struct ata_port *ap)
507 return ata_dev_classify(&tf); 507 return ata_dev_classify(&tf);
508} 508}
509 509
510static void ahci_fill_cmd_slot(struct ata_port *ap, u32 opts)
511{
512 struct ahci_port_priv *pp = ap->private_data;
513 pp->cmd_slot[0].opts = cpu_to_le32(opts);
514 pp->cmd_slot[0].status = 0;
515 pp->cmd_slot[0].tbl_addr = cpu_to_le32(pp->cmd_tbl_dma & 0xffffffff);
516 pp->cmd_slot[0].tbl_addr_hi = cpu_to_le32((pp->cmd_tbl_dma >> 16) >> 16);
517}
518
510static void ahci_phy_reset(struct ata_port *ap) 519static void ahci_phy_reset(struct ata_port *ap)
511{ 520{
512 void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr; 521 void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
@@ -585,42 +594,35 @@ static void ahci_qc_prep(struct ata_queued_cmd *qc)
585{ 594{
586 struct ata_port *ap = qc->ap; 595 struct ata_port *ap = qc->ap;
587 struct ahci_port_priv *pp = ap->private_data; 596 struct ahci_port_priv *pp = ap->private_data;
597 int is_atapi = is_atapi_taskfile(&qc->tf);
588 u32 opts; 598 u32 opts;
589 const u32 cmd_fis_len = 5; /* five dwords */ 599 const u32 cmd_fis_len = 5; /* five dwords */
590 unsigned int n_elem; 600 unsigned int n_elem;
591 601
592 /* 602 /*
593 * Fill in command slot information (currently only one slot,
594 * slot 0, is currently since we don't do queueing)
595 */
596
597 opts = cmd_fis_len;
598 if (qc->tf.flags & ATA_TFLAG_WRITE)
599 opts |= AHCI_CMD_WRITE;
600 if (is_atapi_taskfile(&qc->tf))
601 opts |= AHCI_CMD_ATAPI;
602
603 pp->cmd_slot[0].opts = cpu_to_le32(opts);
604 pp->cmd_slot[0].status = 0;
605 pp->cmd_slot[0].tbl_addr = cpu_to_le32(pp->cmd_tbl_dma & 0xffffffff);
606 pp->cmd_slot[0].tbl_addr_hi = cpu_to_le32((pp->cmd_tbl_dma >> 16) >> 16);
607
608 /*
609 * Fill in command table information. First, the header, 603 * Fill in command table information. First, the header,
610 * a SATA Register - Host to Device command FIS. 604 * a SATA Register - Host to Device command FIS.
611 */ 605 */
612 ata_tf_to_fis(&qc->tf, pp->cmd_tbl, 0); 606 ata_tf_to_fis(&qc->tf, pp->cmd_tbl, 0);
613 if (opts & AHCI_CMD_ATAPI) { 607 if (is_atapi) {
614 memset(pp->cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32); 608 memset(pp->cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32);
615 memcpy(pp->cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, ap->cdb_len); 609 memcpy(pp->cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, ap->cdb_len);
616 } 610 }
617 611
618 if (!(qc->flags & ATA_QCFLAG_DMAMAP)) 612 n_elem = 0;
619 return; 613 if (qc->flags & ATA_QCFLAG_DMAMAP)
614 n_elem = ahci_fill_sg(qc);
620 615
621 n_elem = ahci_fill_sg(qc); 616 /*
617 * Fill in command slot information.
618 */
619 opts = cmd_fis_len | n_elem << 16;
620 if (qc->tf.flags & ATA_TFLAG_WRITE)
621 opts |= AHCI_CMD_WRITE;
622 if (is_atapi)
623 opts |= AHCI_CMD_ATAPI;
622 624
623 pp->cmd_slot[0].opts |= cpu_to_le32(n_elem << 16); 625 ahci_fill_cmd_slot(ap, opts);
624} 626}
625 627
626static void ahci_restart_port(struct ata_port *ap, u32 irq_stat) 628static void ahci_restart_port(struct ata_port *ap, u32 irq_stat)