diff options
author | Tejun Heo <htejun@gmail.com> | 2006-01-23 07:38:44 -0500 |
---|---|---|
committer | Jeff Garzik <jgarzik@pobox.com> | 2006-01-26 23:08:52 -0500 |
commit | 22b49985f526796471c074c0e56bcebfd633a6ff (patch) | |
tree | 4e4033c1d9e01b4f5338349dd40ad3a4868f69c6 /drivers/scsi/ahci.c | |
parent | e0bfd149973d22a4330dd6665b54d1dcca07174a (diff) |
[PATCH] ahci: add constants for SRST
Add constants needed to perform SRST. This is preparation for adding
softreset method.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'drivers/scsi/ahci.c')
-rw-r--r-- | drivers/scsi/ahci.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c index 2abc0aca5a8d..5caf6dec1d40 100644 --- a/drivers/scsi/ahci.c +++ b/drivers/scsi/ahci.c | |||
@@ -66,6 +66,8 @@ enum { | |||
66 | AHCI_IRQ_ON_SG = (1 << 31), | 66 | AHCI_IRQ_ON_SG = (1 << 31), |
67 | AHCI_CMD_ATAPI = (1 << 5), | 67 | AHCI_CMD_ATAPI = (1 << 5), |
68 | AHCI_CMD_WRITE = (1 << 6), | 68 | AHCI_CMD_WRITE = (1 << 6), |
69 | AHCI_CMD_RESET = (1 << 8), | ||
70 | AHCI_CMD_CLR_BUSY = (1 << 10), | ||
69 | 71 | ||
70 | RX_FIS_D2H_REG = 0x40, /* offset of D2H Register FIS data */ | 72 | RX_FIS_D2H_REG = 0x40, /* offset of D2H Register FIS data */ |
71 | 73 | ||
@@ -85,6 +87,7 @@ enum { | |||
85 | 87 | ||
86 | /* HOST_CAP bits */ | 88 | /* HOST_CAP bits */ |
87 | HOST_CAP_64 = (1 << 31), /* PCI DAC (64-bit DMA) support */ | 89 | HOST_CAP_64 = (1 << 31), /* PCI DAC (64-bit DMA) support */ |
90 | HOST_CAP_CLO = (1 << 24), /* Command List Override support */ | ||
88 | 91 | ||
89 | /* registers for each SATA port */ | 92 | /* registers for each SATA port */ |
90 | PORT_LST_ADDR = 0x00, /* command list DMA addr */ | 93 | PORT_LST_ADDR = 0x00, /* command list DMA addr */ |
@@ -138,6 +141,7 @@ enum { | |||
138 | PORT_CMD_LIST_ON = (1 << 15), /* cmd list DMA engine running */ | 141 | PORT_CMD_LIST_ON = (1 << 15), /* cmd list DMA engine running */ |
139 | PORT_CMD_FIS_ON = (1 << 14), /* FIS DMA engine running */ | 142 | PORT_CMD_FIS_ON = (1 << 14), /* FIS DMA engine running */ |
140 | PORT_CMD_FIS_RX = (1 << 4), /* Enable FIS receive DMA engine */ | 143 | PORT_CMD_FIS_RX = (1 << 4), /* Enable FIS receive DMA engine */ |
144 | PORT_CMD_CLO = (1 << 3), /* Command list override */ | ||
141 | PORT_CMD_POWER_ON = (1 << 2), /* Power up device */ | 145 | PORT_CMD_POWER_ON = (1 << 2), /* Power up device */ |
142 | PORT_CMD_SPIN_UP = (1 << 1), /* Spin up device */ | 146 | PORT_CMD_SPIN_UP = (1 << 1), /* Spin up device */ |
143 | PORT_CMD_START = (1 << 0), /* Enable port DMA engine */ | 147 | PORT_CMD_START = (1 << 0), /* Enable port DMA engine */ |