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authorUrsula Braun <ursula.braun@de.ibm.com>2010-08-11 21:58:28 -0400
committerDavid S. Miller <davem@davemloft.net>2010-08-12 19:04:23 -0400
commit3c09e2647b5e1f1f9fd383971468823c2505e1b0 (patch)
treedf40652d16193fb3e81742e7b94104e2227205df /drivers/s390/net
parent319cb083cc3a13a168dea0da00e11e52beb5043f (diff)
ctcm: rename READ/WRITE defines to avoid redefinitions
READ/WRITE seems to be a bit too generic for defines in a device driver. Just rename them to CTCM_READ/CTCM_WRITE to avoid warnings. Signed-off-by: Ursula Braun <ursula.braun@de.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/s390/net')
-rw-r--r--drivers/s390/net/ctcm_fsms.c60
-rw-r--r--drivers/s390/net/ctcm_main.c80
-rw-r--r--drivers/s390/net/ctcm_main.h4
-rw-r--r--drivers/s390/net/ctcm_mpc.c64
-rw-r--r--drivers/s390/net/ctcm_sysfs.c20
5 files changed, 118 insertions, 110 deletions
diff --git a/drivers/s390/net/ctcm_fsms.c b/drivers/s390/net/ctcm_fsms.c
index 70eb7f138414..8c921fc3511a 100644
--- a/drivers/s390/net/ctcm_fsms.c
+++ b/drivers/s390/net/ctcm_fsms.c
@@ -454,7 +454,7 @@ static void chx_firstio(fsm_instance *fi, int event, void *arg)
454 if ((fsmstate == CTC_STATE_SETUPWAIT) && 454 if ((fsmstate == CTC_STATE_SETUPWAIT) &&
455 (ch->protocol == CTCM_PROTO_OS390)) { 455 (ch->protocol == CTCM_PROTO_OS390)) {
456 /* OS/390 resp. z/OS */ 456 /* OS/390 resp. z/OS */
457 if (CHANNEL_DIRECTION(ch->flags) == READ) { 457 if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
458 *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN; 458 *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
459 fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, 459 fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC,
460 CTC_EVENT_TIMER, ch); 460 CTC_EVENT_TIMER, ch);
@@ -472,14 +472,14 @@ static void chx_firstio(fsm_instance *fi, int event, void *arg)
472 * if in compatibility mode, since VM TCP delays the initial 472 * if in compatibility mode, since VM TCP delays the initial
473 * frame until it has some data to send. 473 * frame until it has some data to send.
474 */ 474 */
475 if ((CHANNEL_DIRECTION(ch->flags) == WRITE) || 475 if ((CHANNEL_DIRECTION(ch->flags) == CTCM_WRITE) ||
476 (ch->protocol != CTCM_PROTO_S390)) 476 (ch->protocol != CTCM_PROTO_S390))
477 fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch); 477 fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
478 478
479 *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN; 479 *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
480 ch->ccw[1].count = 2; /* Transfer only length */ 480 ch->ccw[1].count = 2; /* Transfer only length */
481 481
482 fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == READ) 482 fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)
483 ? CTC_STATE_RXINIT : CTC_STATE_TXINIT); 483 ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
484 rc = ccw_device_start(ch->cdev, &ch->ccw[0], 484 rc = ccw_device_start(ch->cdev, &ch->ccw[0],
485 (unsigned long)ch, 0xff, 0); 485 (unsigned long)ch, 0xff, 0);
@@ -495,7 +495,7 @@ static void chx_firstio(fsm_instance *fi, int event, void *arg)
495 * reply from VM TCP which brings up the RX channel to it's 495 * reply from VM TCP which brings up the RX channel to it's
496 * final state. 496 * final state.
497 */ 497 */
498 if ((CHANNEL_DIRECTION(ch->flags) == READ) && 498 if ((CHANNEL_DIRECTION(ch->flags) == CTCM_READ) &&
499 (ch->protocol == CTCM_PROTO_S390)) { 499 (ch->protocol == CTCM_PROTO_S390)) {
500 struct net_device *dev = ch->netdev; 500 struct net_device *dev = ch->netdev;
501 struct ctcm_priv *priv = dev->ml_priv; 501 struct ctcm_priv *priv = dev->ml_priv;
@@ -600,15 +600,15 @@ static void ctcm_chx_start(fsm_instance *fi, int event, void *arg)
600 int rc; 600 int rc;
601 601
602 CTCM_DBF_TEXT_(SETUP, CTC_DBF_INFO, "%s(%s): %s", 602 CTCM_DBF_TEXT_(SETUP, CTC_DBF_INFO, "%s(%s): %s",
603 CTCM_FUNTAIL, ch->id, 603 CTCM_FUNTAIL, ch->id,
604 (CHANNEL_DIRECTION(ch->flags) == READ) ? "RX" : "TX"); 604 (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ? "RX" : "TX");
605 605
606 if (ch->trans_skb != NULL) { 606 if (ch->trans_skb != NULL) {
607 clear_normalized_cda(&ch->ccw[1]); 607 clear_normalized_cda(&ch->ccw[1]);
608 dev_kfree_skb(ch->trans_skb); 608 dev_kfree_skb(ch->trans_skb);
609 ch->trans_skb = NULL; 609 ch->trans_skb = NULL;
610 } 610 }
611 if (CHANNEL_DIRECTION(ch->flags) == READ) { 611 if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
612 ch->ccw[1].cmd_code = CCW_CMD_READ; 612 ch->ccw[1].cmd_code = CCW_CMD_READ;
613 ch->ccw[1].flags = CCW_FLAG_SLI; 613 ch->ccw[1].flags = CCW_FLAG_SLI;
614 ch->ccw[1].count = 0; 614 ch->ccw[1].count = 0;
@@ -622,7 +622,8 @@ static void ctcm_chx_start(fsm_instance *fi, int event, void *arg)
622 "%s(%s): %s trans_skb alloc delayed " 622 "%s(%s): %s trans_skb alloc delayed "
623 "until first transfer", 623 "until first transfer",
624 CTCM_FUNTAIL, ch->id, 624 CTCM_FUNTAIL, ch->id,
625 (CHANNEL_DIRECTION(ch->flags) == READ) ? "RX" : "TX"); 625 (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ?
626 "RX" : "TX");
626 } 627 }
627 ch->ccw[0].cmd_code = CCW_CMD_PREPARE; 628 ch->ccw[0].cmd_code = CCW_CMD_PREPARE;
628 ch->ccw[0].flags = CCW_FLAG_SLI | CCW_FLAG_CC; 629 ch->ccw[0].flags = CCW_FLAG_SLI | CCW_FLAG_CC;
@@ -720,7 +721,7 @@ static void ctcm_chx_cleanup(fsm_instance *fi, int state,
720 721
721 ch->th_seg = 0x00; 722 ch->th_seg = 0x00;
722 ch->th_seq_num = 0x00; 723 ch->th_seq_num = 0x00;
723 if (CHANNEL_DIRECTION(ch->flags) == READ) { 724 if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
724 skb_queue_purge(&ch->io_queue); 725 skb_queue_purge(&ch->io_queue);
725 fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev); 726 fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
726 } else { 727 } else {
@@ -799,7 +800,8 @@ static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg)
799 fsm_newstate(fi, CTC_STATE_STARTRETRY); 800 fsm_newstate(fi, CTC_STATE_STARTRETRY);
800 fsm_deltimer(&ch->timer); 801 fsm_deltimer(&ch->timer);
801 fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch); 802 fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
802 if (!IS_MPC(ch) && (CHANNEL_DIRECTION(ch->flags) == READ)) { 803 if (!IS_MPC(ch) &&
804 (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)) {
803 int rc = ccw_device_halt(ch->cdev, (unsigned long)ch); 805 int rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
804 if (rc != 0) 806 if (rc != 0)
805 ctcm_ccw_check_rc(ch, rc, 807 ctcm_ccw_check_rc(ch, rc,
@@ -811,10 +813,10 @@ static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg)
811 CTCM_DBF_TEXT_(ERROR, CTC_DBF_CRIT, 813 CTCM_DBF_TEXT_(ERROR, CTC_DBF_CRIT,
812 "%s(%s) : %s error during %s channel setup state=%s\n", 814 "%s(%s) : %s error during %s channel setup state=%s\n",
813 CTCM_FUNTAIL, dev->name, ctc_ch_event_names[event], 815 CTCM_FUNTAIL, dev->name, ctc_ch_event_names[event],
814 (CHANNEL_DIRECTION(ch->flags) == READ) ? "RX" : "TX", 816 (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ? "RX" : "TX",
815 fsm_getstate_str(fi)); 817 fsm_getstate_str(fi));
816 818
817 if (CHANNEL_DIRECTION(ch->flags) == READ) { 819 if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
818 fsm_newstate(fi, CTC_STATE_RXERR); 820 fsm_newstate(fi, CTC_STATE_RXERR);
819 fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev); 821 fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
820 } else { 822 } else {
@@ -945,7 +947,7 @@ static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg)
945 fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev); 947 fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
946 948
947 fsm_newstate(fi, CTC_STATE_DTERM); 949 fsm_newstate(fi, CTC_STATE_DTERM);
948 ch2 = priv->channel[WRITE]; 950 ch2 = priv->channel[CTCM_WRITE];
949 fsm_newstate(ch2->fsm, CTC_STATE_DTERM); 951 fsm_newstate(ch2->fsm, CTC_STATE_DTERM);
950 952
951 ccw_device_halt(ch->cdev, (unsigned long)ch); 953 ccw_device_halt(ch->cdev, (unsigned long)ch);
@@ -1074,13 +1076,13 @@ static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg)
1074 fsm_deltimer(&ch->timer); 1076 fsm_deltimer(&ch->timer);
1075 CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR, 1077 CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
1076 "%s: %s: %s unrecoverable channel error", 1078 "%s: %s: %s unrecoverable channel error",
1077 CTCM_FUNTAIL, ch->id, rd == READ ? "RX" : "TX"); 1079 CTCM_FUNTAIL, ch->id, rd == CTCM_READ ? "RX" : "TX");
1078 1080
1079 if (IS_MPC(ch)) { 1081 if (IS_MPC(ch)) {
1080 priv->stats.tx_dropped++; 1082 priv->stats.tx_dropped++;
1081 priv->stats.tx_errors++; 1083 priv->stats.tx_errors++;
1082 } 1084 }
1083 if (rd == READ) { 1085 if (rd == CTCM_READ) {
1084 fsm_newstate(fi, CTC_STATE_RXERR); 1086 fsm_newstate(fi, CTC_STATE_RXERR);
1085 fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev); 1087 fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
1086 } else { 1088 } else {
@@ -1503,7 +1505,7 @@ static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg)
1503 switch (fsm_getstate(fi)) { 1505 switch (fsm_getstate(fi)) {
1504 case CTC_STATE_STARTRETRY: 1506 case CTC_STATE_STARTRETRY:
1505 case CTC_STATE_SETUPWAIT: 1507 case CTC_STATE_SETUPWAIT:
1506 if (CHANNEL_DIRECTION(ch->flags) == READ) { 1508 if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
1507 ctcmpc_chx_rxidle(fi, event, arg); 1509 ctcmpc_chx_rxidle(fi, event, arg);
1508 } else { 1510 } else {
1509 fsm_newstate(fi, CTC_STATE_TXIDLE); 1511 fsm_newstate(fi, CTC_STATE_TXIDLE);
@@ -1514,7 +1516,7 @@ static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg)
1514 break; 1516 break;
1515 }; 1517 };
1516 1518
1517 fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == READ) 1519 fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)
1518 ? CTC_STATE_RXINIT : CTC_STATE_TXINIT); 1520 ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
1519 1521
1520done: 1522done:
@@ -1753,8 +1755,8 @@ static void ctcmpc_chx_send_sweep(fsm_instance *fsm, int event, void *arg)
1753 struct net_device *dev = ach->netdev; 1755 struct net_device *dev = ach->netdev;
1754 struct ctcm_priv *priv = dev->ml_priv; 1756 struct ctcm_priv *priv = dev->ml_priv;
1755 struct mpc_group *grp = priv->mpcg; 1757 struct mpc_group *grp = priv->mpcg;
1756 struct channel *wch = priv->channel[WRITE]; 1758 struct channel *wch = priv->channel[CTCM_WRITE];
1757 struct channel *rch = priv->channel[READ]; 1759 struct channel *rch = priv->channel[CTCM_READ];
1758 struct sk_buff *skb; 1760 struct sk_buff *skb;
1759 struct th_sweep *header; 1761 struct th_sweep *header;
1760 int rc = 0; 1762 int rc = 0;
@@ -2070,7 +2072,7 @@ static void dev_action_start(fsm_instance *fi, int event, void *arg)
2070 fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX); 2072 fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
2071 if (IS_MPC(priv)) 2073 if (IS_MPC(priv))
2072 priv->mpcg->channels_terminating = 0; 2074 priv->mpcg->channels_terminating = 0;
2073 for (direction = READ; direction <= WRITE; direction++) { 2075 for (direction = CTCM_READ; direction <= CTCM_WRITE; direction++) {
2074 struct channel *ch = priv->channel[direction]; 2076 struct channel *ch = priv->channel[direction];
2075 fsm_event(ch->fsm, CTC_EVENT_START, ch); 2077 fsm_event(ch->fsm, CTC_EVENT_START, ch);
2076 } 2078 }
@@ -2092,7 +2094,7 @@ static void dev_action_stop(fsm_instance *fi, int event, void *arg)
2092 CTCMY_DBF_DEV_NAME(SETUP, dev, ""); 2094 CTCMY_DBF_DEV_NAME(SETUP, dev, "");
2093 2095
2094 fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX); 2096 fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
2095 for (direction = READ; direction <= WRITE; direction++) { 2097 for (direction = CTCM_READ; direction <= CTCM_WRITE; direction++) {
2096 struct channel *ch = priv->channel[direction]; 2098 struct channel *ch = priv->channel[direction];
2097 fsm_event(ch->fsm, CTC_EVENT_STOP, ch); 2099 fsm_event(ch->fsm, CTC_EVENT_STOP, ch);
2098 ch->th_seq_num = 0x00; 2100 ch->th_seq_num = 0x00;
@@ -2183,11 +2185,11 @@ static void dev_action_chup(fsm_instance *fi, int event, void *arg)
2183 2185
2184 if (IS_MPC(priv)) { 2186 if (IS_MPC(priv)) {
2185 if (event == DEV_EVENT_RXUP) 2187 if (event == DEV_EVENT_RXUP)
2186 mpc_channel_action(priv->channel[READ], 2188 mpc_channel_action(priv->channel[CTCM_READ],
2187 READ, MPC_CHANNEL_ADD); 2189 CTCM_READ, MPC_CHANNEL_ADD);
2188 else 2190 else
2189 mpc_channel_action(priv->channel[WRITE], 2191 mpc_channel_action(priv->channel[CTCM_WRITE],
2190 WRITE, MPC_CHANNEL_ADD); 2192 CTCM_WRITE, MPC_CHANNEL_ADD);
2191 } 2193 }
2192} 2194}
2193 2195
@@ -2239,11 +2241,11 @@ static void dev_action_chdown(fsm_instance *fi, int event, void *arg)
2239 } 2241 }
2240 if (IS_MPC(priv)) { 2242 if (IS_MPC(priv)) {
2241 if (event == DEV_EVENT_RXDOWN) 2243 if (event == DEV_EVENT_RXDOWN)
2242 mpc_channel_action(priv->channel[READ], 2244 mpc_channel_action(priv->channel[CTCM_READ],
2243 READ, MPC_CHANNEL_REMOVE); 2245 CTCM_READ, MPC_CHANNEL_REMOVE);
2244 else 2246 else
2245 mpc_channel_action(priv->channel[WRITE], 2247 mpc_channel_action(priv->channel[CTCM_WRITE],
2246 WRITE, MPC_CHANNEL_REMOVE); 2248 CTCM_WRITE, MPC_CHANNEL_REMOVE);
2247 } 2249 }
2248} 2250}
2249 2251
diff --git a/drivers/s390/net/ctcm_main.c b/drivers/s390/net/ctcm_main.c
index 4ecafbf91211..6edf20b62de5 100644
--- a/drivers/s390/net/ctcm_main.c
+++ b/drivers/s390/net/ctcm_main.c
@@ -267,7 +267,7 @@ static struct channel *channel_get(enum ctcm_channel_types type,
267 else { 267 else {
268 ch->flags |= CHANNEL_FLAGS_INUSE; 268 ch->flags |= CHANNEL_FLAGS_INUSE;
269 ch->flags &= ~CHANNEL_FLAGS_RWMASK; 269 ch->flags &= ~CHANNEL_FLAGS_RWMASK;
270 ch->flags |= (direction == WRITE) 270 ch->flags |= (direction == CTCM_WRITE)
271 ? CHANNEL_FLAGS_WRITE : CHANNEL_FLAGS_READ; 271 ? CHANNEL_FLAGS_WRITE : CHANNEL_FLAGS_READ;
272 fsm_newstate(ch->fsm, CTC_STATE_STOPPED); 272 fsm_newstate(ch->fsm, CTC_STATE_STOPPED);
273 } 273 }
@@ -388,7 +388,8 @@ int ctcm_ch_alloc_buffer(struct channel *ch)
388 CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR, 388 CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
389 "%s(%s): %s trans_skb allocation error", 389 "%s(%s): %s trans_skb allocation error",
390 CTCM_FUNTAIL, ch->id, 390 CTCM_FUNTAIL, ch->id,
391 (CHANNEL_DIRECTION(ch->flags) == READ) ? "RX" : "TX"); 391 (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ?
392 "RX" : "TX");
392 return -ENOMEM; 393 return -ENOMEM;
393 } 394 }
394 395
@@ -399,7 +400,8 @@ int ctcm_ch_alloc_buffer(struct channel *ch)
399 CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR, 400 CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
400 "%s(%s): %s set norm_cda failed", 401 "%s(%s): %s set norm_cda failed",
401 CTCM_FUNTAIL, ch->id, 402 CTCM_FUNTAIL, ch->id,
402 (CHANNEL_DIRECTION(ch->flags) == READ) ? "RX" : "TX"); 403 (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ?
404 "RX" : "TX");
403 return -ENOMEM; 405 return -ENOMEM;
404 } 406 }
405 407
@@ -603,14 +605,14 @@ static void ctcmpc_send_sweep_req(struct channel *rch)
603 605
604 priv = dev->ml_priv; 606 priv = dev->ml_priv;
605 grp = priv->mpcg; 607 grp = priv->mpcg;
606 ch = priv->channel[WRITE]; 608 ch = priv->channel[CTCM_WRITE];
607 609
608 /* sweep processing is not complete until response and request */ 610 /* sweep processing is not complete until response and request */
609 /* has completed for all read channels in group */ 611 /* has completed for all read channels in group */
610 if (grp->in_sweep == 0) { 612 if (grp->in_sweep == 0) {
611 grp->in_sweep = 1; 613 grp->in_sweep = 1;
612 grp->sweep_rsp_pend_num = grp->active_channels[READ]; 614 grp->sweep_rsp_pend_num = grp->active_channels[CTCM_READ];
613 grp->sweep_req_pend_num = grp->active_channels[READ]; 615 grp->sweep_req_pend_num = grp->active_channels[CTCM_READ];
614 } 616 }
615 617
616 sweep_skb = __dev_alloc_skb(MPC_BUFSIZE_DEFAULT, GFP_ATOMIC|GFP_DMA); 618 sweep_skb = __dev_alloc_skb(MPC_BUFSIZE_DEFAULT, GFP_ATOMIC|GFP_DMA);
@@ -911,7 +913,7 @@ static int ctcm_tx(struct sk_buff *skb, struct net_device *dev)
911 return NETDEV_TX_BUSY; 913 return NETDEV_TX_BUSY;
912 914
913 dev->trans_start = jiffies; 915 dev->trans_start = jiffies;
914 if (ctcm_transmit_skb(priv->channel[WRITE], skb) != 0) 916 if (ctcm_transmit_skb(priv->channel[CTCM_WRITE], skb) != 0)
915 return NETDEV_TX_BUSY; 917 return NETDEV_TX_BUSY;
916 return NETDEV_TX_OK; 918 return NETDEV_TX_OK;
917} 919}
@@ -994,7 +996,7 @@ static int ctcmpc_tx(struct sk_buff *skb, struct net_device *dev)
994 } 996 }
995 997
996 dev->trans_start = jiffies; 998 dev->trans_start = jiffies;
997 if (ctcmpc_transmit_skb(priv->channel[WRITE], skb) != 0) { 999 if (ctcmpc_transmit_skb(priv->channel[CTCM_WRITE], skb) != 0) {
998 CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR, 1000 CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
999 "%s(%s): device error - dropped", 1001 "%s(%s): device error - dropped",
1000 CTCM_FUNTAIL, dev->name); 1002 CTCM_FUNTAIL, dev->name);
@@ -1035,7 +1037,7 @@ static int ctcm_change_mtu(struct net_device *dev, int new_mtu)
1035 return -EINVAL; 1037 return -EINVAL;
1036 1038
1037 priv = dev->ml_priv; 1039 priv = dev->ml_priv;
1038 max_bufsize = priv->channel[READ]->max_bufsize; 1040 max_bufsize = priv->channel[CTCM_READ]->max_bufsize;
1039 1041
1040 if (IS_MPC(priv)) { 1042 if (IS_MPC(priv)) {
1041 if (new_mtu > max_bufsize - TH_HEADER_LENGTH) 1043 if (new_mtu > max_bufsize - TH_HEADER_LENGTH)
@@ -1226,10 +1228,10 @@ static void ctcm_irq_handler(struct ccw_device *cdev,
1226 priv = dev_get_drvdata(&cgdev->dev); 1228 priv = dev_get_drvdata(&cgdev->dev);
1227 1229
1228 /* Try to extract channel from driver data. */ 1230 /* Try to extract channel from driver data. */
1229 if (priv->channel[READ]->cdev == cdev) 1231 if (priv->channel[CTCM_READ]->cdev == cdev)
1230 ch = priv->channel[READ]; 1232 ch = priv->channel[CTCM_READ];
1231 else if (priv->channel[WRITE]->cdev == cdev) 1233 else if (priv->channel[CTCM_WRITE]->cdev == cdev)
1232 ch = priv->channel[WRITE]; 1234 ch = priv->channel[CTCM_WRITE];
1233 else { 1235 else {
1234 dev_err(&cdev->dev, 1236 dev_err(&cdev->dev,
1235 "%s: Internal error: Can't determine channel for " 1237 "%s: Internal error: Can't determine channel for "
@@ -1587,13 +1589,13 @@ static int ctcm_new_device(struct ccwgroup_device *cgdev)
1587 goto out_ccw2; 1589 goto out_ccw2;
1588 } 1590 }
1589 1591
1590 for (direction = READ; direction <= WRITE; direction++) { 1592 for (direction = CTCM_READ; direction <= CTCM_WRITE; direction++) {
1591 priv->channel[direction] = 1593 priv->channel[direction] =
1592 channel_get(type, direction == READ ? read_id : write_id, 1594 channel_get(type, direction == CTCM_READ ?
1593 direction); 1595 read_id : write_id, direction);
1594 if (priv->channel[direction] == NULL) { 1596 if (priv->channel[direction] == NULL) {
1595 if (direction == WRITE) 1597 if (direction == CTCM_WRITE)
1596 channel_free(priv->channel[READ]); 1598 channel_free(priv->channel[CTCM_READ]);
1597 goto out_dev; 1599 goto out_dev;
1598 } 1600 }
1599 priv->channel[direction]->netdev = dev; 1601 priv->channel[direction]->netdev = dev;
@@ -1617,13 +1619,13 @@ static int ctcm_new_device(struct ccwgroup_device *cgdev)
1617 1619
1618 dev_info(&dev->dev, 1620 dev_info(&dev->dev,
1619 "setup OK : r/w = %s/%s, protocol : %d\n", 1621 "setup OK : r/w = %s/%s, protocol : %d\n",
1620 priv->channel[READ]->id, 1622 priv->channel[CTCM_READ]->id,
1621 priv->channel[WRITE]->id, priv->protocol); 1623 priv->channel[CTCM_WRITE]->id, priv->protocol);
1622 1624
1623 CTCM_DBF_TEXT_(SETUP, CTC_DBF_INFO, 1625 CTCM_DBF_TEXT_(SETUP, CTC_DBF_INFO,
1624 "setup(%s) OK : r/w = %s/%s, protocol : %d", dev->name, 1626 "setup(%s) OK : r/w = %s/%s, protocol : %d", dev->name,
1625 priv->channel[READ]->id, 1627 priv->channel[CTCM_READ]->id,
1626 priv->channel[WRITE]->id, priv->protocol); 1628 priv->channel[CTCM_WRITE]->id, priv->protocol);
1627 1629
1628 return 0; 1630 return 0;
1629out_unregister: 1631out_unregister:
@@ -1635,10 +1637,10 @@ out_ccw2:
1635out_ccw1: 1637out_ccw1:
1636 ccw_device_set_offline(cgdev->cdev[0]); 1638 ccw_device_set_offline(cgdev->cdev[0]);
1637out_remove_channel2: 1639out_remove_channel2:
1638 readc = channel_get(type, read_id, READ); 1640 readc = channel_get(type, read_id, CTCM_READ);
1639 channel_remove(readc); 1641 channel_remove(readc);
1640out_remove_channel1: 1642out_remove_channel1:
1641 writec = channel_get(type, write_id, WRITE); 1643 writec = channel_get(type, write_id, CTCM_WRITE);
1642 channel_remove(writec); 1644 channel_remove(writec);
1643out_err_result: 1645out_err_result:
1644 return result; 1646 return result;
@@ -1660,19 +1662,19 @@ static int ctcm_shutdown_device(struct ccwgroup_device *cgdev)
1660 if (!priv) 1662 if (!priv)
1661 return -ENODEV; 1663 return -ENODEV;
1662 1664
1663 if (priv->channel[READ]) { 1665 if (priv->channel[CTCM_READ]) {
1664 dev = priv->channel[READ]->netdev; 1666 dev = priv->channel[CTCM_READ]->netdev;
1665 CTCM_DBF_DEV(SETUP, dev, ""); 1667 CTCM_DBF_DEV(SETUP, dev, "");
1666 /* Close the device */ 1668 /* Close the device */
1667 ctcm_close(dev); 1669 ctcm_close(dev);
1668 dev->flags &= ~IFF_RUNNING; 1670 dev->flags &= ~IFF_RUNNING;
1669 ctcm_remove_attributes(&cgdev->dev); 1671 ctcm_remove_attributes(&cgdev->dev);
1670 channel_free(priv->channel[READ]); 1672 channel_free(priv->channel[CTCM_READ]);
1671 } else 1673 } else
1672 dev = NULL; 1674 dev = NULL;
1673 1675
1674 if (priv->channel[WRITE]) 1676 if (priv->channel[CTCM_WRITE])
1675 channel_free(priv->channel[WRITE]); 1677 channel_free(priv->channel[CTCM_WRITE]);
1676 1678
1677 if (dev) { 1679 if (dev) {
1678 unregister_netdev(dev); 1680 unregister_netdev(dev);
@@ -1685,11 +1687,11 @@ static int ctcm_shutdown_device(struct ccwgroup_device *cgdev)
1685 ccw_device_set_offline(cgdev->cdev[1]); 1687 ccw_device_set_offline(cgdev->cdev[1]);
1686 ccw_device_set_offline(cgdev->cdev[0]); 1688 ccw_device_set_offline(cgdev->cdev[0]);
1687 1689
1688 if (priv->channel[READ]) 1690 if (priv->channel[CTCM_READ])
1689 channel_remove(priv->channel[READ]); 1691 channel_remove(priv->channel[CTCM_READ]);
1690 if (priv->channel[WRITE]) 1692 if (priv->channel[CTCM_WRITE])
1691 channel_remove(priv->channel[WRITE]); 1693 channel_remove(priv->channel[CTCM_WRITE]);
1692 priv->channel[READ] = priv->channel[WRITE] = NULL; 1694 priv->channel[CTCM_READ] = priv->channel[CTCM_WRITE] = NULL;
1693 1695
1694 return 0; 1696 return 0;
1695 1697
@@ -1720,11 +1722,11 @@ static int ctcm_pm_suspend(struct ccwgroup_device *gdev)
1720 1722
1721 if (gdev->state == CCWGROUP_OFFLINE) 1723 if (gdev->state == CCWGROUP_OFFLINE)
1722 return 0; 1724 return 0;
1723 netif_device_detach(priv->channel[READ]->netdev); 1725 netif_device_detach(priv->channel[CTCM_READ]->netdev);
1724 ctcm_close(priv->channel[READ]->netdev); 1726 ctcm_close(priv->channel[CTCM_READ]->netdev);
1725 if (!wait_event_timeout(priv->fsm->wait_q, 1727 if (!wait_event_timeout(priv->fsm->wait_q,
1726 fsm_getstate(priv->fsm) == DEV_STATE_STOPPED, CTCM_TIME_5_SEC)) { 1728 fsm_getstate(priv->fsm) == DEV_STATE_STOPPED, CTCM_TIME_5_SEC)) {
1727 netif_device_attach(priv->channel[READ]->netdev); 1729 netif_device_attach(priv->channel[CTCM_READ]->netdev);
1728 return -EBUSY; 1730 return -EBUSY;
1729 } 1731 }
1730 ccw_device_set_offline(gdev->cdev[1]); 1732 ccw_device_set_offline(gdev->cdev[1]);
@@ -1745,9 +1747,9 @@ static int ctcm_pm_resume(struct ccwgroup_device *gdev)
1745 rc = ccw_device_set_online(gdev->cdev[0]); 1747 rc = ccw_device_set_online(gdev->cdev[0]);
1746 if (rc) 1748 if (rc)
1747 goto err_out; 1749 goto err_out;
1748 ctcm_open(priv->channel[READ]->netdev); 1750 ctcm_open(priv->channel[CTCM_READ]->netdev);
1749err_out: 1751err_out:
1750 netif_device_attach(priv->channel[READ]->netdev); 1752 netif_device_attach(priv->channel[CTCM_READ]->netdev);
1751 return rc; 1753 return rc;
1752} 1754}
1753 1755
diff --git a/drivers/s390/net/ctcm_main.h b/drivers/s390/net/ctcm_main.h
index d34fa14f44e7..24d5215eb0c4 100644
--- a/drivers/s390/net/ctcm_main.h
+++ b/drivers/s390/net/ctcm_main.h
@@ -111,8 +111,8 @@ enum ctcm_channel_types {
111 111
112#define CTCM_INITIAL_BLOCKLEN 2 112#define CTCM_INITIAL_BLOCKLEN 2
113 113
114#define READ 0 114#define CTCM_READ 0
115#define WRITE 1 115#define CTCM_WRITE 1
116 116
117#define CTCM_ID_SIZE 20+3 117#define CTCM_ID_SIZE 20+3
118 118
diff --git a/drivers/s390/net/ctcm_mpc.c b/drivers/s390/net/ctcm_mpc.c
index 87c24d2936d6..2861e78773cb 100644
--- a/drivers/s390/net/ctcm_mpc.c
+++ b/drivers/s390/net/ctcm_mpc.c
@@ -419,8 +419,8 @@ void ctc_mpc_establish_connectivity(int port_num,
419 return; 419 return;
420 priv = dev->ml_priv; 420 priv = dev->ml_priv;
421 grp = priv->mpcg; 421 grp = priv->mpcg;
422 rch = priv->channel[READ]; 422 rch = priv->channel[CTCM_READ];
423 wch = priv->channel[WRITE]; 423 wch = priv->channel[CTCM_WRITE];
424 424
425 CTCM_DBF_TEXT_(MPC_SETUP, CTC_DBF_INFO, 425 CTCM_DBF_TEXT_(MPC_SETUP, CTC_DBF_INFO,
426 "%s(%s): state=%s", 426 "%s(%s): state=%s",
@@ -578,7 +578,7 @@ void ctc_mpc_flow_control(int port_num, int flowc)
578 "%s: %s: flowc = %d", 578 "%s: %s: flowc = %d",
579 CTCM_FUNTAIL, dev->name, flowc); 579 CTCM_FUNTAIL, dev->name, flowc);
580 580
581 rch = priv->channel[READ]; 581 rch = priv->channel[CTCM_READ];
582 582
583 mpcg_state = fsm_getstate(grp->fsm); 583 mpcg_state = fsm_getstate(grp->fsm);
584 switch (flowc) { 584 switch (flowc) {
@@ -622,7 +622,7 @@ static void mpc_rcvd_sweep_resp(struct mpcg_info *mpcginfo)
622 struct net_device *dev = rch->netdev; 622 struct net_device *dev = rch->netdev;
623 struct ctcm_priv *priv = dev->ml_priv; 623 struct ctcm_priv *priv = dev->ml_priv;
624 struct mpc_group *grp = priv->mpcg; 624 struct mpc_group *grp = priv->mpcg;
625 struct channel *ch = priv->channel[WRITE]; 625 struct channel *ch = priv->channel[CTCM_WRITE];
626 626
627 CTCM_PR_DEBUG("%s: ch=0x%p id=%s\n", __func__, ch, ch->id); 627 CTCM_PR_DEBUG("%s: ch=0x%p id=%s\n", __func__, ch, ch->id);
628 CTCM_D3_DUMP((char *)mpcginfo->sweep, TH_SWEEP_LENGTH); 628 CTCM_D3_DUMP((char *)mpcginfo->sweep, TH_SWEEP_LENGTH);
@@ -656,7 +656,7 @@ static void ctcmpc_send_sweep_resp(struct channel *rch)
656 int rc = 0; 656 int rc = 0;
657 struct th_sweep *header; 657 struct th_sweep *header;
658 struct sk_buff *sweep_skb; 658 struct sk_buff *sweep_skb;
659 struct channel *ch = priv->channel[WRITE]; 659 struct channel *ch = priv->channel[CTCM_WRITE];
660 660
661 CTCM_PR_DEBUG("%s: ch=0x%p id=%s\n", __func__, rch, rch->id); 661 CTCM_PR_DEBUG("%s: ch=0x%p id=%s\n", __func__, rch, rch->id);
662 662
@@ -712,7 +712,7 @@ static void mpc_rcvd_sweep_req(struct mpcg_info *mpcginfo)
712 struct net_device *dev = rch->netdev; 712 struct net_device *dev = rch->netdev;
713 struct ctcm_priv *priv = dev->ml_priv; 713 struct ctcm_priv *priv = dev->ml_priv;
714 struct mpc_group *grp = priv->mpcg; 714 struct mpc_group *grp = priv->mpcg;
715 struct channel *ch = priv->channel[WRITE]; 715 struct channel *ch = priv->channel[CTCM_WRITE];
716 716
717 if (do_debug) 717 if (do_debug)
718 CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_DEBUG, 718 CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_DEBUG,
@@ -721,8 +721,8 @@ static void mpc_rcvd_sweep_req(struct mpcg_info *mpcginfo)
721 if (grp->in_sweep == 0) { 721 if (grp->in_sweep == 0) {
722 grp->in_sweep = 1; 722 grp->in_sweep = 1;
723 ctcm_test_and_set_busy(dev); 723 ctcm_test_and_set_busy(dev);
724 grp->sweep_req_pend_num = grp->active_channels[READ]; 724 grp->sweep_req_pend_num = grp->active_channels[CTCM_READ];
725 grp->sweep_rsp_pend_num = grp->active_channels[READ]; 725 grp->sweep_rsp_pend_num = grp->active_channels[CTCM_READ];
726 } 726 }
727 727
728 CTCM_D3_DUMP((char *)mpcginfo->sweep, TH_SWEEP_LENGTH); 728 CTCM_D3_DUMP((char *)mpcginfo->sweep, TH_SWEEP_LENGTH);
@@ -906,14 +906,14 @@ void mpc_group_ready(unsigned long adev)
906 fsm_newstate(grp->fsm, MPCG_STATE_READY); 906 fsm_newstate(grp->fsm, MPCG_STATE_READY);
907 907
908 /* Put up a read on the channel */ 908 /* Put up a read on the channel */
909 ch = priv->channel[READ]; 909 ch = priv->channel[CTCM_READ];
910 ch->pdu_seq = 0; 910 ch->pdu_seq = 0;
911 CTCM_PR_DBGDATA("ctcmpc: %s() ToDCM_pdu_seq= %08x\n" , 911 CTCM_PR_DBGDATA("ctcmpc: %s() ToDCM_pdu_seq= %08x\n" ,
912 __func__, ch->pdu_seq); 912 __func__, ch->pdu_seq);
913 913
914 ctcmpc_chx_rxidle(ch->fsm, CTC_EVENT_START, ch); 914 ctcmpc_chx_rxidle(ch->fsm, CTC_EVENT_START, ch);
915 /* Put the write channel in idle state */ 915 /* Put the write channel in idle state */
916 ch = priv->channel[WRITE]; 916 ch = priv->channel[CTCM_WRITE];
917 if (ch->collect_len > 0) { 917 if (ch->collect_len > 0) {
918 spin_lock(&ch->collect_lock); 918 spin_lock(&ch->collect_lock);
919 ctcm_purge_skb_queue(&ch->collect_queue); 919 ctcm_purge_skb_queue(&ch->collect_queue);
@@ -960,7 +960,8 @@ void mpc_channel_action(struct channel *ch, int direction, int action)
960 "%s: %i / Grp:%s total_channels=%i, active_channels: " 960 "%s: %i / Grp:%s total_channels=%i, active_channels: "
961 "read=%i, write=%i\n", __func__, action, 961 "read=%i, write=%i\n", __func__, action,
962 fsm_getstate_str(grp->fsm), grp->num_channel_paths, 962 fsm_getstate_str(grp->fsm), grp->num_channel_paths,
963 grp->active_channels[READ], grp->active_channels[WRITE]); 963 grp->active_channels[CTCM_READ],
964 grp->active_channels[CTCM_WRITE]);
964 965
965 if ((action == MPC_CHANNEL_ADD) && (ch->in_mpcgroup == 0)) { 966 if ((action == MPC_CHANNEL_ADD) && (ch->in_mpcgroup == 0)) {
966 grp->num_channel_paths++; 967 grp->num_channel_paths++;
@@ -994,10 +995,11 @@ void mpc_channel_action(struct channel *ch, int direction, int action)
994 grp->xid_skb->data, 995 grp->xid_skb->data,
995 grp->xid_skb->len); 996 grp->xid_skb->len);
996 997
997 ch->xid->xid2_dlc_type = ((CHANNEL_DIRECTION(ch->flags) == READ) 998 ch->xid->xid2_dlc_type =
999 ((CHANNEL_DIRECTION(ch->flags) == CTCM_READ)
998 ? XID2_READ_SIDE : XID2_WRITE_SIDE); 1000 ? XID2_READ_SIDE : XID2_WRITE_SIDE);
999 1001
1000 if (CHANNEL_DIRECTION(ch->flags) == WRITE) 1002 if (CHANNEL_DIRECTION(ch->flags) == CTCM_WRITE)
1001 ch->xid->xid2_buf_len = 0x00; 1003 ch->xid->xid2_buf_len = 0x00;
1002 1004
1003 ch->xid_skb->data = ch->xid_skb_data; 1005 ch->xid_skb->data = ch->xid_skb_data;
@@ -1006,8 +1008,8 @@ void mpc_channel_action(struct channel *ch, int direction, int action)
1006 1008
1007 fsm_newstate(ch->fsm, CH_XID0_PENDING); 1009 fsm_newstate(ch->fsm, CH_XID0_PENDING);
1008 1010
1009 if ((grp->active_channels[READ] > 0) && 1011 if ((grp->active_channels[CTCM_READ] > 0) &&
1010 (grp->active_channels[WRITE] > 0) && 1012 (grp->active_channels[CTCM_WRITE] > 0) &&
1011 (fsm_getstate(grp->fsm) < MPCG_STATE_XID2INITW)) { 1013 (fsm_getstate(grp->fsm) < MPCG_STATE_XID2INITW)) {
1012 fsm_newstate(grp->fsm, MPCG_STATE_XID2INITW); 1014 fsm_newstate(grp->fsm, MPCG_STATE_XID2INITW);
1013 CTCM_DBF_TEXT_(MPC_SETUP, CTC_DBF_NOTICE, 1015 CTCM_DBF_TEXT_(MPC_SETUP, CTC_DBF_NOTICE,
@@ -1027,10 +1029,10 @@ void mpc_channel_action(struct channel *ch, int direction, int action)
1027 if (grp->channels_terminating) 1029 if (grp->channels_terminating)
1028 goto done; 1030 goto done;
1029 1031
1030 if (((grp->active_channels[READ] == 0) && 1032 if (((grp->active_channels[CTCM_READ] == 0) &&
1031 (grp->active_channels[WRITE] > 0)) 1033 (grp->active_channels[CTCM_WRITE] > 0))
1032 || ((grp->active_channels[WRITE] == 0) && 1034 || ((grp->active_channels[CTCM_WRITE] == 0) &&
1033 (grp->active_channels[READ] > 0))) 1035 (grp->active_channels[CTCM_READ] > 0)))
1034 fsm_event(grp->fsm, MPCG_EVENT_INOP, dev); 1036 fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
1035 } 1037 }
1036done: 1038done:
@@ -1038,7 +1040,8 @@ done:
1038 "exit %s: %i / Grp:%s total_channels=%i, active_channels: " 1040 "exit %s: %i / Grp:%s total_channels=%i, active_channels: "
1039 "read=%i, write=%i\n", __func__, action, 1041 "read=%i, write=%i\n", __func__, action,
1040 fsm_getstate_str(grp->fsm), grp->num_channel_paths, 1042 fsm_getstate_str(grp->fsm), grp->num_channel_paths,
1041 grp->active_channels[READ], grp->active_channels[WRITE]); 1043 grp->active_channels[CTCM_READ],
1044 grp->active_channels[CTCM_WRITE]);
1042 1045
1043 CTCM_PR_DEBUG("exit %s: ch=0x%p id=%s\n", __func__, ch, ch->id); 1046 CTCM_PR_DEBUG("exit %s: ch=0x%p id=%s\n", __func__, ch, ch->id);
1044} 1047}
@@ -1392,8 +1395,8 @@ static void mpc_action_go_inop(fsm_instance *fi, int event, void *arg)
1392 (grp->port_persist == 0)) 1395 (grp->port_persist == 0))
1393 fsm_deltimer(&priv->restart_timer); 1396 fsm_deltimer(&priv->restart_timer);
1394 1397
1395 wch = priv->channel[WRITE]; 1398 wch = priv->channel[CTCM_WRITE];
1396 rch = priv->channel[READ]; 1399 rch = priv->channel[CTCM_READ];
1397 1400
1398 switch (grp->saved_state) { 1401 switch (grp->saved_state) {
1399 case MPCG_STATE_RESET: 1402 case MPCG_STATE_RESET:
@@ -1480,8 +1483,8 @@ static void mpc_action_timeout(fsm_instance *fi, int event, void *arg)
1480 1483
1481 priv = dev->ml_priv; 1484 priv = dev->ml_priv;
1482 grp = priv->mpcg; 1485 grp = priv->mpcg;
1483 wch = priv->channel[WRITE]; 1486 wch = priv->channel[CTCM_WRITE];
1484 rch = priv->channel[READ]; 1487 rch = priv->channel[CTCM_READ];
1485 1488
1486 switch (fsm_getstate(grp->fsm)) { 1489 switch (fsm_getstate(grp->fsm)) {
1487 case MPCG_STATE_XID2INITW: 1490 case MPCG_STATE_XID2INITW:
@@ -1586,7 +1589,7 @@ static int mpc_validate_xid(struct mpcg_info *mpcginfo)
1586 CTCM_D3_DUMP((char *)xid, XID2_LENGTH); 1589 CTCM_D3_DUMP((char *)xid, XID2_LENGTH);
1587 1590
1588 /*the received direction should be the opposite of ours */ 1591 /*the received direction should be the opposite of ours */
1589 if (((CHANNEL_DIRECTION(ch->flags) == READ) ? XID2_WRITE_SIDE : 1592 if (((CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ? XID2_WRITE_SIDE :
1590 XID2_READ_SIDE) != xid->xid2_dlc_type) { 1593 XID2_READ_SIDE) != xid->xid2_dlc_type) {
1591 rc = 2; 1594 rc = 2;
1592 /* XID REJECTED: r/w channel pairing mismatch */ 1595 /* XID REJECTED: r/w channel pairing mismatch */
@@ -1912,7 +1915,7 @@ static void mpc_action_doxid7(fsm_instance *fsm, int event, void *arg)
1912 if (grp == NULL) 1915 if (grp == NULL)
1913 return; 1916 return;
1914 1917
1915 for (direction = READ; direction <= WRITE; direction++) { 1918 for (direction = CTCM_READ; direction <= CTCM_WRITE; direction++) {
1916 struct channel *ch = priv->channel[direction]; 1919 struct channel *ch = priv->channel[direction];
1917 struct xid2 *thisxid = ch->xid; 1920 struct xid2 *thisxid = ch->xid;
1918 ch->xid_skb->data = ch->xid_skb_data; 1921 ch->xid_skb->data = ch->xid_skb_data;
@@ -2152,14 +2155,15 @@ static int mpc_send_qllc_discontact(struct net_device *dev)
2152 return -ENOMEM; 2155 return -ENOMEM;
2153 } 2156 }
2154 2157
2155 *((__u32 *)skb_push(skb, 4)) = priv->channel[READ]->pdu_seq; 2158 *((__u32 *)skb_push(skb, 4)) =
2156 priv->channel[READ]->pdu_seq++; 2159 priv->channel[CTCM_READ]->pdu_seq;
2160 priv->channel[CTCM_READ]->pdu_seq++;
2157 CTCM_PR_DBGDATA("ctcmpc: %s ToDCM_pdu_seq= %08x\n", 2161 CTCM_PR_DBGDATA("ctcmpc: %s ToDCM_pdu_seq= %08x\n",
2158 __func__, priv->channel[READ]->pdu_seq); 2162 __func__, priv->channel[CTCM_READ]->pdu_seq);
2159 2163
2160 /* receipt of CC03 resets anticipated sequence number on 2164 /* receipt of CC03 resets anticipated sequence number on
2161 receiving side */ 2165 receiving side */
2162 priv->channel[READ]->pdu_seq = 0x00; 2166 priv->channel[CTCM_READ]->pdu_seq = 0x00;
2163 skb_reset_mac_header(skb); 2167 skb_reset_mac_header(skb);
2164 skb->dev = dev; 2168 skb->dev = dev;
2165 skb->protocol = htons(ETH_P_SNAP); 2169 skb->protocol = htons(ETH_P_SNAP);
diff --git a/drivers/s390/net/ctcm_sysfs.c b/drivers/s390/net/ctcm_sysfs.c
index 2b24550e865e..8305319b2a84 100644
--- a/drivers/s390/net/ctcm_sysfs.c
+++ b/drivers/s390/net/ctcm_sysfs.c
@@ -38,8 +38,8 @@ static ssize_t ctcm_buffer_write(struct device *dev,
38 int bs1; 38 int bs1;
39 struct ctcm_priv *priv = dev_get_drvdata(dev); 39 struct ctcm_priv *priv = dev_get_drvdata(dev);
40 40
41 if (!(priv && priv->channel[READ] && 41 ndev = priv->channel[CTCM_READ]->netdev;
42 (ndev = priv->channel[READ]->netdev))) { 42 if (!(priv && priv->channel[CTCM_READ] && ndev)) {
43 CTCM_DBF_TEXT(SETUP, CTC_DBF_ERROR, "bfnondev"); 43 CTCM_DBF_TEXT(SETUP, CTC_DBF_ERROR, "bfnondev");
44 return -ENODEV; 44 return -ENODEV;
45 } 45 }
@@ -55,12 +55,12 @@ static ssize_t ctcm_buffer_write(struct device *dev,
55 (bs1 < (ndev->mtu + LL_HEADER_LENGTH + 2))) 55 (bs1 < (ndev->mtu + LL_HEADER_LENGTH + 2)))
56 goto einval; 56 goto einval;
57 57
58 priv->channel[READ]->max_bufsize = bs1; 58 priv->channel[CTCM_READ]->max_bufsize = bs1;
59 priv->channel[WRITE]->max_bufsize = bs1; 59 priv->channel[CTCM_WRITE]->max_bufsize = bs1;
60 if (!(ndev->flags & IFF_RUNNING)) 60 if (!(ndev->flags & IFF_RUNNING))
61 ndev->mtu = bs1 - LL_HEADER_LENGTH - 2; 61 ndev->mtu = bs1 - LL_HEADER_LENGTH - 2;
62 priv->channel[READ]->flags |= CHANNEL_FLAGS_BUFSIZE_CHANGED; 62 priv->channel[CTCM_READ]->flags |= CHANNEL_FLAGS_BUFSIZE_CHANGED;
63 priv->channel[WRITE]->flags |= CHANNEL_FLAGS_BUFSIZE_CHANGED; 63 priv->channel[CTCM_WRITE]->flags |= CHANNEL_FLAGS_BUFSIZE_CHANGED;
64 64
65 CTCM_DBF_DEV(SETUP, ndev, buf); 65 CTCM_DBF_DEV(SETUP, ndev, buf);
66 return count; 66 return count;
@@ -85,9 +85,9 @@ static void ctcm_print_statistics(struct ctcm_priv *priv)
85 p += sprintf(p, " Device FSM state: %s\n", 85 p += sprintf(p, " Device FSM state: %s\n",
86 fsm_getstate_str(priv->fsm)); 86 fsm_getstate_str(priv->fsm));
87 p += sprintf(p, " RX channel FSM state: %s\n", 87 p += sprintf(p, " RX channel FSM state: %s\n",
88 fsm_getstate_str(priv->channel[READ]->fsm)); 88 fsm_getstate_str(priv->channel[CTCM_READ]->fsm));
89 p += sprintf(p, " TX channel FSM state: %s\n", 89 p += sprintf(p, " TX channel FSM state: %s\n",
90 fsm_getstate_str(priv->channel[WRITE]->fsm)); 90 fsm_getstate_str(priv->channel[CTCM_WRITE]->fsm));
91 p += sprintf(p, " Max. TX buffer used: %ld\n", 91 p += sprintf(p, " Max. TX buffer used: %ld\n",
92 priv->channel[WRITE]->prof.maxmulti); 92 priv->channel[WRITE]->prof.maxmulti);
93 p += sprintf(p, " Max. chained SKBs: %ld\n", 93 p += sprintf(p, " Max. chained SKBs: %ld\n",
@@ -102,7 +102,7 @@ static void ctcm_print_statistics(struct ctcm_priv *priv)
102 priv->channel[WRITE]->prof.tx_time); 102 priv->channel[WRITE]->prof.tx_time);
103 103
104 printk(KERN_INFO "Statistics for %s:\n%s", 104 printk(KERN_INFO "Statistics for %s:\n%s",
105 priv->channel[WRITE]->netdev->name, sbuf); 105 priv->channel[CTCM_WRITE]->netdev->name, sbuf);
106 kfree(sbuf); 106 kfree(sbuf);
107 return; 107 return;
108} 108}
@@ -125,7 +125,7 @@ static ssize_t stats_write(struct device *dev, struct device_attribute *attr,
125 return -ENODEV; 125 return -ENODEV;
126 /* Reset statistics */ 126 /* Reset statistics */
127 memset(&priv->channel[WRITE]->prof, 0, 127 memset(&priv->channel[WRITE]->prof, 0,
128 sizeof(priv->channel[WRITE]->prof)); 128 sizeof(priv->channel[CTCM_WRITE]->prof));
129 return count; 129 return count;
130} 130}
131 131