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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/s390/crypto
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'drivers/s390/crypto')
-rw-r--r--drivers/s390/crypto/Makefile6
-rw-r--r--drivers/s390/crypto/z90common.h168
-rw-r--r--drivers/s390/crypto/z90crypt.h258
-rw-r--r--drivers/s390/crypto/z90hardware.c2243
-rw-r--r--drivers/s390/crypto/z90main.c3563
5 files changed, 6238 insertions, 0 deletions
diff --git a/drivers/s390/crypto/Makefile b/drivers/s390/crypto/Makefile
new file mode 100644
index 000000000000..15edebbead7f
--- /dev/null
+++ b/drivers/s390/crypto/Makefile
@@ -0,0 +1,6 @@
1#
2# S/390 crypto devices
3#
4
5z90crypt-objs := z90main.o z90hardware.o
6obj-$(CONFIG_Z90CRYPT) += z90crypt.o
diff --git a/drivers/s390/crypto/z90common.h b/drivers/s390/crypto/z90common.h
new file mode 100644
index 000000000000..bcabac7a7c46
--- /dev/null
+++ b/drivers/s390/crypto/z90common.h
@@ -0,0 +1,168 @@
1/*
2 * linux/drivers/s390/crypto/z90common.h
3 *
4 * z90crypt 1.3.2
5 *
6 * Copyright (C) 2001, 2004 IBM Corporation
7 * Author(s): Robert Burroughs (burrough@us.ibm.com)
8 * Eric Rossman (edrossma@us.ibm.com)
9 *
10 * Hotplug & misc device support: Jochen Roehrig (roehrig@de.ibm.com)
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#ifndef _Z90COMMON_H_
28#define _Z90COMMON_H_
29
30#define VERSION_Z90COMMON_H "$Revision: 1.16 $"
31
32
33#define RESPBUFFSIZE 256
34#define PCI_FUNC_KEY_DECRYPT 0x5044
35#define PCI_FUNC_KEY_ENCRYPT 0x504B
36extern int ext_bitlens;
37
38enum devstat {
39 DEV_GONE,
40 DEV_ONLINE,
41 DEV_QUEUE_FULL,
42 DEV_EMPTY,
43 DEV_NO_WORK,
44 DEV_BAD_MESSAGE,
45 DEV_TSQ_EXCEPTION,
46 DEV_RSQ_EXCEPTION,
47 DEV_SEN_EXCEPTION,
48 DEV_REC_EXCEPTION
49};
50
51enum hdstat {
52 HD_NOT_THERE,
53 HD_BUSY,
54 HD_DECONFIGURED,
55 HD_CHECKSTOPPED,
56 HD_ONLINE,
57 HD_TSQ_EXCEPTION
58};
59
60#define Z90C_NO_DEVICES 1
61#define Z90C_AMBIGUOUS_DOMAIN 2
62#define Z90C_INCORRECT_DOMAIN 3
63#define ENOTINIT 4
64
65#define SEN_BUSY 7
66#define SEN_USER_ERROR 8
67#define SEN_QUEUE_FULL 11
68#define SEN_NOT_AVAIL 16
69#define SEN_PAD_ERROR 17
70#define SEN_RETRY 18
71#define SEN_RELEASED 24
72
73#define REC_EMPTY 4
74#define REC_BUSY 6
75#define REC_OPERAND_INV 8
76#define REC_OPERAND_SIZE 9
77#define REC_EVEN_MOD 10
78#define REC_NO_WORK 11
79#define REC_HARDWAR_ERR 12
80#define REC_NO_RESPONSE 13
81#define REC_RETRY_DEV 14
82#define REC_USER_GONE 15
83#define REC_BAD_MESSAGE 16
84#define REC_INVALID_PAD 17
85#define REC_USE_PCICA 18
86
87#define WRONG_DEVICE_TYPE 20
88
89#define REC_FATAL_ERROR 32
90#define SEN_FATAL_ERROR 33
91#define TSQ_FATAL_ERROR 34
92#define RSQ_FATAL_ERROR 35
93
94#define Z90CRYPT_NUM_TYPES 5
95#define PCICA 0
96#define PCICC 1
97#define PCIXCC_MCL2 2
98#define PCIXCC_MCL3 3
99#define CEX2C 4
100#define NILDEV -1
101#define ANYDEV -1
102#define PCIXCC_UNK -2
103
104enum hdevice_type {
105 PCICC_HW = 3,
106 PCICA_HW = 4,
107 PCIXCC_HW = 5,
108 OTHER_HW = 6,
109 CEX2C_HW = 7
110};
111
112struct CPRBX {
113 unsigned short cprb_len;
114 unsigned char cprb_ver_id;
115 unsigned char pad_000[3];
116 unsigned char func_id[2];
117 unsigned char cprb_flags[4];
118 unsigned int req_parml;
119 unsigned int req_datal;
120 unsigned int rpl_msgbl;
121 unsigned int rpld_parml;
122 unsigned int rpl_datal;
123 unsigned int rpld_datal;
124 unsigned int req_extbl;
125 unsigned char pad_001[4];
126 unsigned int rpld_extbl;
127 unsigned char req_parmb[16];
128 unsigned char req_datab[16];
129 unsigned char rpl_parmb[16];
130 unsigned char rpl_datab[16];
131 unsigned char req_extb[16];
132 unsigned char rpl_extb[16];
133 unsigned short ccp_rtcode;
134 unsigned short ccp_rscode;
135 unsigned int mac_data_len;
136 unsigned char logon_id[8];
137 unsigned char mac_value[8];
138 unsigned char mac_content_flgs;
139 unsigned char pad_002;
140 unsigned short domain;
141 unsigned char pad_003[12];
142 unsigned char pad_004[36];
143};
144
145#ifndef DEV_NAME
146#define DEV_NAME "z90crypt"
147#endif
148#define PRINTK(fmt, args...) \
149 printk(KERN_DEBUG DEV_NAME ": %s -> " fmt, __FUNCTION__ , ## args)
150#define PRINTKN(fmt, args...) \
151 printk(KERN_DEBUG DEV_NAME ": " fmt, ## args)
152#define PRINTKW(fmt, args...) \
153 printk(KERN_WARNING DEV_NAME ": %s -> " fmt, __FUNCTION__ , ## args)
154#define PRINTKC(fmt, args...) \
155 printk(KERN_CRIT DEV_NAME ": %s -> " fmt, __FUNCTION__ , ## args)
156
157#ifdef Z90CRYPT_DEBUG
158#define PDEBUG(fmt, args...) \
159 printk(KERN_DEBUG DEV_NAME ": %s -> " fmt, __FUNCTION__ , ## args)
160#else
161#define PDEBUG(fmt, args...) do {} while (0)
162#endif
163
164#define UMIN(a,b) ((a) < (b) ? (a) : (b))
165#define IS_EVEN(x) ((x) == (2 * ((x) / 2)))
166
167
168#endif
diff --git a/drivers/s390/crypto/z90crypt.h b/drivers/s390/crypto/z90crypt.h
new file mode 100644
index 000000000000..82a1d97001d7
--- /dev/null
+++ b/drivers/s390/crypto/z90crypt.h
@@ -0,0 +1,258 @@
1/*
2 * linux/drivers/s390/crypto/z90crypt.h
3 *
4 * z90crypt 1.3.2
5 *
6 * Copyright (C) 2001, 2004 IBM Corporation
7 * Author(s): Robert Burroughs (burrough@us.ibm.com)
8 * Eric Rossman (edrossma@us.ibm.com)
9 *
10 * Hotplug & misc device support: Jochen Roehrig (roehrig@de.ibm.com)
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#ifndef _Z90CRYPT_H_
28#define _Z90CRYPT_H_
29
30#include <linux/ioctl.h>
31
32#define VERSION_Z90CRYPT_H "$Revision: 1.11 $"
33
34#define z90crypt_VERSION 1
35#define z90crypt_RELEASE 3 // 2 = PCIXCC, 3 = rewrite for coding standards
36#define z90crypt_VARIANT 2 // 2 = added PCIXCC MCL3 and CEX2C support
37
38/**
39 * If we are not using the sparse checker, __user has no use.
40 */
41#ifdef __CHECKER__
42# define __user __attribute__((noderef, address_space(1)))
43#else
44# define __user
45#endif
46
47/**
48 * struct ica_rsa_modexpo
49 *
50 * Requirements:
51 * - outputdatalength is at least as large as inputdatalength.
52 * - All key parts are right justified in their fields, padded on
53 * the left with zeroes.
54 * - length(b_key) = inputdatalength
55 * - length(n_modulus) = inputdatalength
56 */
57struct ica_rsa_modexpo {
58 char __user * inputdata;
59 unsigned int inputdatalength;
60 char __user * outputdata;
61 unsigned int outputdatalength;
62 char __user * b_key;
63 char __user * n_modulus;
64};
65
66/**
67 * struct ica_rsa_modexpo_crt
68 *
69 * Requirements:
70 * - inputdatalength is even.
71 * - outputdatalength is at least as large as inputdatalength.
72 * - All key parts are right justified in their fields, padded on
73 * the left with zeroes.
74 * - length(bp_key) = inputdatalength/2 + 8
75 * - length(bq_key) = inputdatalength/2
76 * - length(np_key) = inputdatalength/2 + 8
77 * - length(nq_key) = inputdatalength/2
78 * - length(u_mult_inv) = inputdatalength/2 + 8
79 */
80struct ica_rsa_modexpo_crt {
81 char __user * inputdata;
82 unsigned int inputdatalength;
83 char __user * outputdata;
84 unsigned int outputdatalength;
85 char __user * bp_key;
86 char __user * bq_key;
87 char __user * np_prime;
88 char __user * nq_prime;
89 char __user * u_mult_inv;
90};
91
92#define Z90_IOCTL_MAGIC 'z' // NOTE: Need to allocate from linux folks
93
94/**
95 * Interface notes:
96 *
97 * The ioctl()s which are implemented (along with relevant details)
98 * are:
99 *
100 * ICARSAMODEXPO
101 * Perform an RSA operation using a Modulus-Exponent pair
102 * This takes an ica_rsa_modexpo struct as its arg.
103 *
104 * NOTE: please refer to the comments preceding this structure
105 * for the implementation details for the contents of the
106 * block
107 *
108 * ICARSACRT
109 * Perform an RSA operation using a Chinese-Remainder Theorem key
110 * This takes an ica_rsa_modexpo_crt struct as its arg.
111 *
112 * NOTE: please refer to the comments preceding this structure
113 * for the implementation details for the contents of the
114 * block
115 *
116 * Z90STAT_TOTALCOUNT
117 * Return an integer count of all device types together.
118 *
119 * Z90STAT_PCICACOUNT
120 * Return an integer count of all PCICAs.
121 *
122 * Z90STAT_PCICCCOUNT
123 * Return an integer count of all PCICCs.
124 *
125 * Z90STAT_PCIXCCMCL2COUNT
126 * Return an integer count of all MCL2 PCIXCCs.
127 *
128 * Z90STAT_PCIXCCMCL3COUNT
129 * Return an integer count of all MCL3 PCIXCCs.
130 *
131 * Z90STAT_CEX2CCOUNT
132 * Return an integer count of all CEX2Cs.
133 *
134 * Z90STAT_REQUESTQ_COUNT
135 * Return an integer count of the number of entries waiting to be
136 * sent to a device.
137 *
138 * Z90STAT_PENDINGQ_COUNT
139 * Return an integer count of the number of entries sent to a
140 * device awaiting the reply.
141 *
142 * Z90STAT_TOTALOPEN_COUNT
143 * Return an integer count of the number of open file handles.
144 *
145 * Z90STAT_DOMAIN_INDEX
146 * Return the integer value of the Cryptographic Domain.
147 *
148 * Z90STAT_STATUS_MASK
149 * Return an 64 element array of unsigned chars for the status of
150 * all devices.
151 * 0x01: PCICA
152 * 0x02: PCICC
153 * 0x03: PCIXCC_MCL2
154 * 0x04: PCIXCC_MCL3
155 * 0x05: CEX2C
156 * 0x0d: device is disabled via the proc filesystem
157 *
158 * Z90STAT_QDEPTH_MASK
159 * Return an 64 element array of unsigned chars for the queue
160 * depth of all devices.
161 *
162 * Z90STAT_PERDEV_REQCNT
163 * Return an 64 element array of unsigned integers for the number
164 * of successfully completed requests per device since the device
165 * was detected and made available.
166 *
167 * ICAZ90STATUS (deprecated)
168 * Return some device driver status in a ica_z90_status struct
169 * This takes an ica_z90_status struct as its arg.
170 *
171 * NOTE: this ioctl() is deprecated, and has been replaced with
172 * single ioctl()s for each type of status being requested
173 *
174 * Z90STAT_PCIXCCCOUNT (deprecated)
175 * Return an integer count of all PCIXCCs (MCL2 + MCL3).
176 * This is DEPRECATED now that MCL3 PCIXCCs are treated differently from
177 * MCL2 PCIXCCs.
178 *
179 * Z90QUIESCE (not recommended)
180 * Quiesce the driver. This is intended to stop all new
181 * requests from being processed. Its use is NOT recommended,
182 * except in circumstances where there is no other way to stop
183 * callers from accessing the driver. Its original use was to
184 * allow the driver to be "drained" of work in preparation for
185 * a system shutdown.
186 *
187 * NOTE: once issued, this ban on new work cannot be undone
188 * except by unloading and reloading the driver.
189 */
190
191/**
192 * Supported ioctl calls
193 */
194#define ICARSAMODEXPO _IOC(_IOC_READ|_IOC_WRITE, Z90_IOCTL_MAGIC, 0x05, 0)
195#define ICARSACRT _IOC(_IOC_READ|_IOC_WRITE, Z90_IOCTL_MAGIC, 0x06, 0)
196
197/* DEPRECATED status calls (bound for removal at some point) */
198#define ICAZ90STATUS _IOR(Z90_IOCTL_MAGIC, 0x10, struct ica_z90_status)
199#define Z90STAT_PCIXCCCOUNT _IOR(Z90_IOCTL_MAGIC, 0x43, int)
200
201/* unrelated to ICA callers */
202#define Z90QUIESCE _IO(Z90_IOCTL_MAGIC, 0x11)
203
204/* New status calls */
205#define Z90STAT_TOTALCOUNT _IOR(Z90_IOCTL_MAGIC, 0x40, int)
206#define Z90STAT_PCICACOUNT _IOR(Z90_IOCTL_MAGIC, 0x41, int)
207#define Z90STAT_PCICCCOUNT _IOR(Z90_IOCTL_MAGIC, 0x42, int)
208#define Z90STAT_PCIXCCMCL2COUNT _IOR(Z90_IOCTL_MAGIC, 0x4b, int)
209#define Z90STAT_PCIXCCMCL3COUNT _IOR(Z90_IOCTL_MAGIC, 0x4c, int)
210#define Z90STAT_CEX2CCOUNT _IOR(Z90_IOCTL_MAGIC, 0x4d, int)
211#define Z90STAT_REQUESTQ_COUNT _IOR(Z90_IOCTL_MAGIC, 0x44, int)
212#define Z90STAT_PENDINGQ_COUNT _IOR(Z90_IOCTL_MAGIC, 0x45, int)
213#define Z90STAT_TOTALOPEN_COUNT _IOR(Z90_IOCTL_MAGIC, 0x46, int)
214#define Z90STAT_DOMAIN_INDEX _IOR(Z90_IOCTL_MAGIC, 0x47, int)
215#define Z90STAT_STATUS_MASK _IOR(Z90_IOCTL_MAGIC, 0x48, char[64])
216#define Z90STAT_QDEPTH_MASK _IOR(Z90_IOCTL_MAGIC, 0x49, char[64])
217#define Z90STAT_PERDEV_REQCNT _IOR(Z90_IOCTL_MAGIC, 0x4a, int[64])
218
219/**
220 * local errno definitions
221 */
222#define ENOBUFF 129 // filp->private_data->...>work_elem_p->buffer is NULL
223#define EWORKPEND 130 // user issues ioctl while another pending
224#define ERELEASED 131 // user released while ioctl pending
225#define EQUIESCE 132 // z90crypt quiescing (no more work allowed)
226#define ETIMEOUT 133 // request timed out
227#define EUNKNOWN 134 // some unrecognized error occured (retry may succeed)
228#define EGETBUFF 135 // Error getting buffer or hardware lacks capability
229 // (retry in software)
230
231/**
232 * DEPRECATED STRUCTURES
233 */
234
235/**
236 * This structure is DEPRECATED and the corresponding ioctl() has been
237 * replaced with individual ioctl()s for each piece of data!
238 * This structure will NOT survive past version 1.3.1, so switch to the
239 * new ioctl()s.
240 */
241#define MASK_LENGTH 64 // mask length
242struct ica_z90_status {
243 int totalcount;
244 int leedslitecount; // PCICA
245 int leeds2count; // PCICC
246 // int PCIXCCCount; is not in struct for backward compatibility
247 int requestqWaitCount;
248 int pendingqWaitCount;
249 int totalOpenCount;
250 int cryptoDomain;
251 // status: 0=not there, 1=PCICA, 2=PCICC, 3=PCIXCC_MCL2, 4=PCIXCC_MCL3,
252 // 5=CEX2C
253 unsigned char status[MASK_LENGTH];
254 // qdepth: # work elements waiting for each device
255 unsigned char qdepth[MASK_LENGTH];
256};
257
258#endif /* _Z90CRYPT_H_ */
diff --git a/drivers/s390/crypto/z90hardware.c b/drivers/s390/crypto/z90hardware.c
new file mode 100644
index 000000000000..beb6a5e0da22
--- /dev/null
+++ b/drivers/s390/crypto/z90hardware.c
@@ -0,0 +1,2243 @@
1/*
2 * linux/drivers/s390/crypto/z90hardware.c
3 *
4 * z90crypt 1.3.2
5 *
6 * Copyright (C) 2001, 2004 IBM Corporation
7 * Author(s): Robert Burroughs (burrough@us.ibm.com)
8 * Eric Rossman (edrossma@us.ibm.com)
9 *
10 * Hotplug & misc device support: Jochen Roehrig (roehrig@de.ibm.com)
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#include <asm/uaccess.h>
28#include <linux/compiler.h>
29#include <linux/delay.h>
30#include <linux/init.h>
31#include <linux/module.h>
32#include "z90crypt.h"
33#include "z90common.h"
34
35#define VERSION_Z90HARDWARE_C "$Revision: 1.33 $"
36
37char z90hardware_version[] __initdata =
38 "z90hardware.o (" VERSION_Z90HARDWARE_C "/"
39 VERSION_Z90COMMON_H "/" VERSION_Z90CRYPT_H ")";
40
41struct cca_token_hdr {
42 unsigned char token_identifier;
43 unsigned char version;
44 unsigned short token_length;
45 unsigned char reserved[4];
46};
47
48#define CCA_TKN_HDR_ID_EXT 0x1E
49
50struct cca_private_ext_ME_sec {
51 unsigned char section_identifier;
52 unsigned char version;
53 unsigned short section_length;
54 unsigned char private_key_hash[20];
55 unsigned char reserved1[4];
56 unsigned char key_format;
57 unsigned char reserved2;
58 unsigned char key_name_hash[20];
59 unsigned char key_use_flags[4];
60 unsigned char reserved3[6];
61 unsigned char reserved4[24];
62 unsigned char confounder[24];
63 unsigned char exponent[128];
64 unsigned char modulus[128];
65};
66
67#define CCA_PVT_USAGE_ALL 0x80
68
69struct cca_public_sec {
70 unsigned char section_identifier;
71 unsigned char version;
72 unsigned short section_length;
73 unsigned char reserved[2];
74 unsigned short exponent_len;
75 unsigned short modulus_bit_len;
76 unsigned short modulus_byte_len;
77 unsigned char exponent[3];
78};
79
80struct cca_private_ext_ME {
81 struct cca_token_hdr pvtMEHdr;
82 struct cca_private_ext_ME_sec pvtMESec;
83 struct cca_public_sec pubMESec;
84};
85
86struct cca_public_key {
87 struct cca_token_hdr pubHdr;
88 struct cca_public_sec pubSec;
89};
90
91struct cca_pvt_ext_CRT_sec {
92 unsigned char section_identifier;
93 unsigned char version;
94 unsigned short section_length;
95 unsigned char private_key_hash[20];
96 unsigned char reserved1[4];
97 unsigned char key_format;
98 unsigned char reserved2;
99 unsigned char key_name_hash[20];
100 unsigned char key_use_flags[4];
101 unsigned short p_len;
102 unsigned short q_len;
103 unsigned short dp_len;
104 unsigned short dq_len;
105 unsigned short u_len;
106 unsigned short mod_len;
107 unsigned char reserved3[4];
108 unsigned short pad_len;
109 unsigned char reserved4[52];
110 unsigned char confounder[8];
111};
112
113#define CCA_PVT_EXT_CRT_SEC_ID_PVT 0x08
114#define CCA_PVT_EXT_CRT_SEC_FMT_CL 0x40
115
116struct cca_private_ext_CRT {
117 struct cca_token_hdr pvtCrtHdr;
118 struct cca_pvt_ext_CRT_sec pvtCrtSec;
119 struct cca_public_sec pubCrtSec;
120};
121
122struct ap_status_word {
123 unsigned char q_stat_flags;
124 unsigned char response_code;
125 unsigned char reserved[2];
126};
127
128#define AP_Q_STATUS_EMPTY 0x80
129#define AP_Q_STATUS_REPLIES_WAITING 0x40
130#define AP_Q_STATUS_ARRAY_FULL 0x20
131
132#define AP_RESPONSE_NORMAL 0x00
133#define AP_RESPONSE_Q_NOT_AVAIL 0x01
134#define AP_RESPONSE_RESET_IN_PROGRESS 0x02
135#define AP_RESPONSE_DECONFIGURED 0x03
136#define AP_RESPONSE_CHECKSTOPPED 0x04
137#define AP_RESPONSE_BUSY 0x05
138#define AP_RESPONSE_Q_FULL 0x10
139#define AP_RESPONSE_NO_PENDING_REPLY 0x10
140#define AP_RESPONSE_INDEX_TOO_BIG 0x11
141#define AP_RESPONSE_NO_FIRST_PART 0x13
142#define AP_RESPONSE_MESSAGE_TOO_BIG 0x15
143
144#define AP_MAX_CDX_BITL 4
145#define AP_RQID_RESERVED_BITL 4
146#define SKIP_BITL (AP_MAX_CDX_BITL + AP_RQID_RESERVED_BITL)
147
148struct type4_hdr {
149 unsigned char reserved1;
150 unsigned char msg_type_code;
151 unsigned short msg_len;
152 unsigned char request_code;
153 unsigned char msg_fmt;
154 unsigned short reserved2;
155};
156
157#define TYPE4_TYPE_CODE 0x04
158#define TYPE4_REQU_CODE 0x40
159
160#define TYPE4_SME_LEN 0x0188
161#define TYPE4_LME_LEN 0x0308
162#define TYPE4_SCR_LEN 0x01E0
163#define TYPE4_LCR_LEN 0x03A0
164
165#define TYPE4_SME_FMT 0x00
166#define TYPE4_LME_FMT 0x10
167#define TYPE4_SCR_FMT 0x40
168#define TYPE4_LCR_FMT 0x50
169
170struct type4_sme {
171 struct type4_hdr header;
172 unsigned char message[128];
173 unsigned char exponent[128];
174 unsigned char modulus[128];
175};
176
177struct type4_lme {
178 struct type4_hdr header;
179 unsigned char message[256];
180 unsigned char exponent[256];
181 unsigned char modulus[256];
182};
183
184struct type4_scr {
185 struct type4_hdr header;
186 unsigned char message[128];
187 unsigned char dp[72];
188 unsigned char dq[64];
189 unsigned char p[72];
190 unsigned char q[64];
191 unsigned char u[72];
192};
193
194struct type4_lcr {
195 struct type4_hdr header;
196 unsigned char message[256];
197 unsigned char dp[136];
198 unsigned char dq[128];
199 unsigned char p[136];
200 unsigned char q[128];
201 unsigned char u[136];
202};
203
204union type4_msg {
205 struct type4_sme sme;
206 struct type4_lme lme;
207 struct type4_scr scr;
208 struct type4_lcr lcr;
209};
210
211struct type84_hdr {
212 unsigned char reserved1;
213 unsigned char code;
214 unsigned short len;
215 unsigned char reserved2[4];
216};
217
218#define TYPE84_RSP_CODE 0x84
219
220struct type6_hdr {
221 unsigned char reserved1;
222 unsigned char type;
223 unsigned char reserved2[2];
224 unsigned char right[4];
225 unsigned char reserved3[2];
226 unsigned char reserved4[2];
227 unsigned char apfs[4];
228 unsigned int offset1;
229 unsigned int offset2;
230 unsigned int offset3;
231 unsigned int offset4;
232 unsigned char agent_id[16];
233 unsigned char rqid[2];
234 unsigned char reserved5[2];
235 unsigned char function_code[2];
236 unsigned char reserved6[2];
237 unsigned int ToCardLen1;
238 unsigned int ToCardLen2;
239 unsigned int ToCardLen3;
240 unsigned int ToCardLen4;
241 unsigned int FromCardLen1;
242 unsigned int FromCardLen2;
243 unsigned int FromCardLen3;
244 unsigned int FromCardLen4;
245};
246
247struct CPRB {
248 unsigned char cprb_len[2];
249 unsigned char cprb_ver_id;
250 unsigned char pad_000;
251 unsigned char srpi_rtcode[4];
252 unsigned char srpi_verb;
253 unsigned char flags;
254 unsigned char func_id[2];
255 unsigned char checkpoint_flag;
256 unsigned char resv2;
257 unsigned char req_parml[2];
258 unsigned char req_parmp[4];
259 unsigned char req_datal[4];
260 unsigned char req_datap[4];
261 unsigned char rpl_parml[2];
262 unsigned char pad_001[2];
263 unsigned char rpl_parmp[4];
264 unsigned char rpl_datal[4];
265 unsigned char rpl_datap[4];
266 unsigned char ccp_rscode[2];
267 unsigned char ccp_rtcode[2];
268 unsigned char repd_parml[2];
269 unsigned char mac_data_len[2];
270 unsigned char repd_datal[4];
271 unsigned char req_pc[2];
272 unsigned char res_origin[8];
273 unsigned char mac_value[8];
274 unsigned char logon_id[8];
275 unsigned char usage_domain[2];
276 unsigned char resv3[18];
277 unsigned char svr_namel[2];
278 unsigned char svr_name[8];
279};
280
281struct type6_msg {
282 struct type6_hdr header;
283 struct CPRB CPRB;
284};
285
286union request_msg {
287 union type4_msg t4msg;
288 struct type6_msg t6msg;
289};
290
291struct request_msg_ext {
292 int q_nr;
293 unsigned char *psmid;
294 union request_msg reqMsg;
295};
296
297struct type82_hdr {
298 unsigned char reserved1;
299 unsigned char type;
300 unsigned char reserved2[2];
301 unsigned char reply_code;
302 unsigned char reserved3[3];
303};
304
305#define TYPE82_RSP_CODE 0x82
306
307#define REPLY_ERROR_MACHINE_FAILURE 0x10
308#define REPLY_ERROR_PREEMPT_FAILURE 0x12
309#define REPLY_ERROR_CHECKPT_FAILURE 0x14
310#define REPLY_ERROR_MESSAGE_TYPE 0x20
311#define REPLY_ERROR_INVALID_COMM_CD 0x21
312#define REPLY_ERROR_INVALID_MSG_LEN 0x23
313#define REPLY_ERROR_RESERVD_FIELD 0x24
314#define REPLY_ERROR_FORMAT_FIELD 0x29
315#define REPLY_ERROR_INVALID_COMMAND 0x30
316#define REPLY_ERROR_MALFORMED_MSG 0x40
317#define REPLY_ERROR_RESERVED_FIELDO 0x50
318#define REPLY_ERROR_WORD_ALIGNMENT 0x60
319#define REPLY_ERROR_MESSAGE_LENGTH 0x80
320#define REPLY_ERROR_OPERAND_INVALID 0x82
321#define REPLY_ERROR_OPERAND_SIZE 0x84
322#define REPLY_ERROR_EVEN_MOD_IN_OPND 0x85
323#define REPLY_ERROR_RESERVED_FIELD 0x88
324#define REPLY_ERROR_TRANSPORT_FAIL 0x90
325#define REPLY_ERROR_PACKET_TRUNCATED 0xA0
326#define REPLY_ERROR_ZERO_BUFFER_LEN 0xB0
327
328struct type86_hdr {
329 unsigned char reserved1;
330 unsigned char type;
331 unsigned char format;
332 unsigned char reserved2;
333 unsigned char reply_code;
334 unsigned char reserved3[3];
335};
336
337#define TYPE86_RSP_CODE 0x86
338#define TYPE86_FMT2 0x02
339
340struct type86_fmt2_msg {
341 struct type86_hdr hdr;
342 unsigned char reserved[4];
343 unsigned char apfs[4];
344 unsigned int count1;
345 unsigned int offset1;
346 unsigned int count2;
347 unsigned int offset2;
348 unsigned int count3;
349 unsigned int offset3;
350 unsigned int count4;
351 unsigned int offset4;
352};
353
354static struct type6_hdr static_type6_hdr = {
355 0x00,
356 0x06,
357 {0x00,0x00},
358 {0x00,0x00,0x00,0x00},
359 {0x00,0x00},
360 {0x00,0x00},
361 {0x00,0x00,0x00,0x00},
362 0x00000058,
363 0x00000000,
364 0x00000000,
365 0x00000000,
366 {0x01,0x00,0x43,0x43,0x41,0x2D,0x41,0x50,
367 0x50,0x4C,0x20,0x20,0x20,0x01,0x01,0x01},
368 {0x00,0x00},
369 {0x00,0x00},
370 {0x50,0x44},
371 {0x00,0x00},
372 0x00000000,
373 0x00000000,
374 0x00000000,
375 0x00000000,
376 0x00000000,
377 0x00000000,
378 0x00000000,
379 0x00000000
380};
381
382static struct type6_hdr static_type6_hdrX = {
383 0x00,
384 0x06,
385 {0x00,0x00},
386 {0x00,0x00,0x00,0x00},
387 {0x00,0x00},
388 {0x00,0x00},
389 {0x00,0x00,0x00,0x00},
390 0x00000058,
391 0x00000000,
392 0x00000000,
393 0x00000000,
394 {0x43,0x41,0x00,0x00,0x00,0x00,0x00,0x00,
395 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
396 {0x00,0x00},
397 {0x00,0x00},
398 {0x50,0x44},
399 {0x00,0x00},
400 0x00000000,
401 0x00000000,
402 0x00000000,
403 0x00000000,
404 0x00000000,
405 0x00000000,
406 0x00000000,
407 0x00000000
408};
409
410static struct CPRB static_cprb = {
411 {0x70,0x00},
412 0x41,
413 0x00,
414 {0x00,0x00,0x00,0x00},
415 0x00,
416 0x00,
417 {0x54,0x32},
418 0x01,
419 0x00,
420 {0x00,0x00},
421 {0x00,0x00,0x00,0x00},
422 {0x00,0x00,0x00,0x00},
423 {0x00,0x00,0x00,0x00},
424 {0x00,0x00},
425 {0x00,0x00},
426 {0x00,0x00,0x00,0x00},
427 {0x00,0x00,0x00,0x00},
428 {0x00,0x00,0x00,0x00},
429 {0x00,0x00},
430 {0x00,0x00},
431 {0x00,0x00},
432 {0x00,0x00},
433 {0x00,0x00,0x00,0x00},
434 {0x00,0x00},
435 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
436 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
437 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
438 {0x00,0x00},
439 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
440 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
441 0x00,0x00},
442 {0x08,0x00},
443 {0x49,0x43,0x53,0x46,0x20,0x20,0x20,0x20}
444};
445
446struct function_and_rules_block {
447 unsigned char function_code[2];
448 unsigned char ulen[2];
449 unsigned char only_rule[8];
450};
451
452static struct function_and_rules_block static_pkd_function_and_rules = {
453 {0x50,0x44},
454 {0x0A,0x00},
455 {'P','K','C','S','-','1','.','2'}
456};
457
458static struct function_and_rules_block static_pke_function_and_rules = {
459 {0x50,0x4B},
460 {0x0A,0x00},
461 {'P','K','C','S','-','1','.','2'}
462};
463
464struct T6_keyBlock_hdr {
465 unsigned char blen[2];
466 unsigned char ulen[2];
467 unsigned char flags[2];
468};
469
470static struct T6_keyBlock_hdr static_T6_keyBlock_hdr = {
471 {0x89,0x01},
472 {0x87,0x01},
473 {0x00}
474};
475
476static struct CPRBX static_cprbx = {
477 0x00DC,
478 0x02,
479 {0x00,0x00,0x00},
480 {0x54,0x32},
481 {0x00,0x00,0x00,0x00},
482 0x00000000,
483 0x00000000,
484 0x00000000,
485 0x00000000,
486 0x00000000,
487 0x00000000,
488 0x00000000,
489 {0x00,0x00,0x00,0x00},
490 0x00000000,
491 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
492 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
493 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
494 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
495 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
496 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
497 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
498 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
499 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
500 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
501 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
502 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
503 0x0000,
504 0x0000,
505 0x00000000,
506 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
507 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
508 0x00,
509 0x00,
510 0x0000,
511 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
512 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
513 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
514 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
515};
516
517static struct function_and_rules_block static_pkd_function_and_rulesX_MCL2 = {
518 {0x50,0x44},
519 {0x00,0x0A},
520 {'P','K','C','S','-','1','.','2'}
521};
522
523static struct function_and_rules_block static_pke_function_and_rulesX_MCL2 = {
524 {0x50,0x4B},
525 {0x00,0x0A},
526 {'Z','E','R','O','-','P','A','D'}
527};
528
529static struct function_and_rules_block static_pkd_function_and_rulesX = {
530 {0x50,0x44},
531 {0x00,0x0A},
532 {'Z','E','R','O','-','P','A','D'}
533};
534
535static struct function_and_rules_block static_pke_function_and_rulesX = {
536 {0x50,0x4B},
537 {0x00,0x0A},
538 {'M','R','P',' ',' ',' ',' ',' '}
539};
540
541struct T6_keyBlock_hdrX {
542 unsigned short blen;
543 unsigned short ulen;
544 unsigned char flags[2];
545};
546
547static unsigned char static_pad[256] = {
5480x1B,0x7B,0x5D,0xB5,0x75,0x01,0x3D,0xFD,0x8D,0xD1,0xC7,0x03,0x2D,0x09,0x23,0x57,
5490x89,0x49,0xB9,0x3F,0xBB,0x99,0x41,0x5B,0x75,0x21,0x7B,0x9D,0x3B,0x6B,0x51,0x39,
5500xBB,0x0D,0x35,0xB9,0x89,0x0F,0x93,0xA5,0x0B,0x47,0xF1,0xD3,0xBB,0xCB,0xF1,0x9D,
5510x23,0x73,0x71,0xFF,0xF3,0xF5,0x45,0xFB,0x61,0x29,0x23,0xFD,0xF1,0x29,0x3F,0x7F,
5520x17,0xB7,0x1B,0xA9,0x19,0xBD,0x57,0xA9,0xD7,0x95,0xA3,0xCB,0xED,0x1D,0xDB,0x45,
5530x7D,0x11,0xD1,0x51,0x1B,0xED,0x71,0xE9,0xB1,0xD1,0xAB,0xAB,0x21,0x2B,0x1B,0x9F,
5540x3B,0x9F,0xF7,0xF7,0xBD,0x63,0xEB,0xAD,0xDF,0xB3,0x6F,0x5B,0xDB,0x8D,0xA9,0x5D,
5550xE3,0x7D,0x77,0x49,0x47,0xF5,0xA7,0xFD,0xAB,0x2F,0x27,0x35,0x77,0xD3,0x49,0xC9,
5560x09,0xEB,0xB1,0xF9,0xBF,0x4B,0xCB,0x2B,0xEB,0xEB,0x05,0xFF,0x7D,0xC7,0x91,0x8B,
5570x09,0x83,0xB9,0xB9,0x69,0x33,0x39,0x6B,0x79,0x75,0x19,0xBF,0xBB,0x07,0x1D,0xBD,
5580x29,0xBF,0x39,0x95,0x93,0x1D,0x35,0xC7,0xC9,0x4D,0xE5,0x97,0x0B,0x43,0x9B,0xF1,
5590x16,0x93,0x03,0x1F,0xA5,0xFB,0xDB,0xF3,0x27,0x4F,0x27,0x61,0x05,0x1F,0xB9,0x23,
5600x2F,0xC3,0x81,0xA9,0x23,0x71,0x55,0x55,0xEB,0xED,0x41,0xE5,0xF3,0x11,0xF1,0x43,
5610x69,0x03,0xBD,0x0B,0x37,0x0F,0x51,0x8F,0x0B,0xB5,0x89,0x5B,0x67,0xA9,0xD9,0x4F,
5620x01,0xF9,0x21,0x77,0x37,0x73,0x79,0xC5,0x7F,0x51,0xC1,0xCF,0x97,0xA1,0x75,0xAD,
5630x35,0x9D,0xD3,0xD3,0xA7,0x9D,0x5D,0x41,0x6F,0x65,0x1B,0xCF,0xA9,0x87,0x91,0x09
564};
565
566static struct cca_private_ext_ME static_pvt_me_key = {
567 {
568 0x1E,
569 0x00,
570 0x0183,
571 {0x00,0x00,0x00,0x00}
572 },
573
574 {
575 0x02,
576 0x00,
577 0x016C,
578 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
579 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
580 0x00,0x00,0x00,0x00},
581 {0x00,0x00,0x00,0x00},
582 0x00,
583 0x00,
584 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
585 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
586 0x00,0x00,0x00,0x00},
587 {0x80,0x00,0x00,0x00},
588 {0x00,0x00,0x00,0x00,0x00,0x00},
589 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
590 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
591 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
592 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
593 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
594 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
595 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
596 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
597 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
598 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
599 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
600 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
601 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
602 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
603 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
604 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
605 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
606 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
607 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
608 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
609 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
610 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
611 {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
612 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
613 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
614 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
615 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
616 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
617 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
618 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
619 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
620 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
621 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
622 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
623 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
624 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
625 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
626 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
627 },
628
629 {
630 0x04,
631 0x00,
632 0x000F,
633 {0x00,0x00},
634 0x0003,
635 0x0000,
636 0x0000,
637 {0x01,0x00,0x01}
638 }
639};
640
641static struct cca_public_key static_public_key = {
642 {
643 0x1E,
644 0x00,
645 0x0000,
646 {0x00,0x00,0x00,0x00}
647 },
648
649 {
650 0x04,
651 0x00,
652 0x0000,
653 {0x00,0x00},
654 0x0000,
655 0x0000,
656 0x0000,
657 {0x01,0x00,0x01}
658 }
659};
660
661#define FIXED_TYPE6_ME_LEN 0x0000025F
662
663#define FIXED_TYPE6_ME_EN_LEN 0x000000F0
664
665#define FIXED_TYPE6_ME_LENX 0x000002CB
666
667#define FIXED_TYPE6_ME_EN_LENX 0x0000015C
668
669static struct cca_public_sec static_cca_pub_sec = {
670 0x04,
671 0x00,
672 0x000f,
673 {0x00,0x00},
674 0x0003,
675 0x0000,
676 0x0000,
677 {0x01,0x00,0x01}
678};
679
680#define FIXED_TYPE6_CR_LEN 0x00000177
681
682#define FIXED_TYPE6_CR_LENX 0x000001E3
683
684#define MAX_RESPONSE_SIZE 0x00000710
685
686#define MAX_RESPONSEX_SIZE 0x0000077C
687
688#define RESPONSE_CPRB_SIZE 0x000006B8
689#define RESPONSE_CPRBX_SIZE 0x00000724
690
691#define CALLER_HEADER 12
692
693static unsigned char static_PKE_function_code[2] = {0x50, 0x4B};
694
695static inline int
696testq(int q_nr, int *q_depth, int *dev_type, struct ap_status_word *stat)
697{
698 int ccode;
699
700 asm volatile
701#ifdef __s390x__
702 (" llgfr 0,%4 \n"
703 " slgr 1,1 \n"
704 " lgr 2,1 \n"
705 "0: .long 0xb2af0000 \n"
706 "1: ipm %0 \n"
707 " srl %0,28 \n"
708 " iihh %0,0 \n"
709 " iihl %0,0 \n"
710 " lgr %1,1 \n"
711 " lgr %3,2 \n"
712 " srl %3,24 \n"
713 " sll 2,24 \n"
714 " srl 2,24 \n"
715 " lgr %2,2 \n"
716 "2: \n"
717 ".section .fixup,\"ax\" \n"
718 "3: \n"
719 " lhi %0,%h5 \n"
720 " jg 2b \n"
721 ".previous \n"
722 ".section __ex_table,\"a\" \n"
723 " .align 8 \n"
724 " .quad 0b,3b \n"
725 " .quad 1b,3b \n"
726 ".previous"
727 :"=d" (ccode),"=d" (*stat),"=d" (*q_depth), "=d" (*dev_type)
728 :"d" (q_nr), "K" (DEV_TSQ_EXCEPTION)
729 :"cc","0","1","2","memory");
730#else
731 (" lr 0,%4 \n"
732 " slr 1,1 \n"
733 " lr 2,1 \n"
734 "0: .long 0xb2af0000 \n"
735 "1: ipm %0 \n"
736 " srl %0,28 \n"
737 " lr %1,1 \n"
738 " lr %3,2 \n"
739 " srl %3,24 \n"
740 " sll 2,24 \n"
741 " srl 2,24 \n"
742 " lr %2,2 \n"
743 "2: \n"
744 ".section .fixup,\"ax\" \n"
745 "3: \n"
746 " lhi %0,%h5 \n"
747 " bras 1,4f \n"
748 " .long 2b \n"
749 "4: \n"
750 " l 1,0(1) \n"
751 " br 1 \n"
752 ".previous \n"
753 ".section __ex_table,\"a\" \n"
754 " .align 4 \n"
755 " .long 0b,3b \n"
756 " .long 1b,3b \n"
757 ".previous"
758 :"=d" (ccode),"=d" (*stat),"=d" (*q_depth), "=d" (*dev_type)
759 :"d" (q_nr), "K" (DEV_TSQ_EXCEPTION)
760 :"cc","0","1","2","memory");
761#endif
762 return ccode;
763}
764
765static inline int
766resetq(int q_nr, struct ap_status_word *stat_p)
767{
768 int ccode;
769
770 asm volatile
771#ifdef __s390x__
772 (" llgfr 0,%2 \n"
773 " lghi 1,1 \n"
774 " sll 1,24 \n"
775 " or 0,1 \n"
776 " slgr 1,1 \n"
777 " lgr 2,1 \n"
778 "0: .long 0xb2af0000 \n"
779 "1: ipm %0 \n"
780 " srl %0,28 \n"
781 " iihh %0,0 \n"
782 " iihl %0,0 \n"
783 " lgr %1,1 \n"
784 "2: \n"
785 ".section .fixup,\"ax\" \n"
786 "3: \n"
787 " lhi %0,%h3 \n"
788 " jg 2b \n"
789 ".previous \n"
790 ".section __ex_table,\"a\" \n"
791 " .align 8 \n"
792 " .quad 0b,3b \n"
793 " .quad 1b,3b \n"
794 ".previous"
795 :"=d" (ccode),"=d" (*stat_p)
796 :"d" (q_nr), "K" (DEV_RSQ_EXCEPTION)
797 :"cc","0","1","2","memory");
798#else
799 (" lr 0,%2 \n"
800 " lhi 1,1 \n"
801 " sll 1,24 \n"
802 " or 0,1 \n"
803 " slr 1,1 \n"
804 " lr 2,1 \n"
805 "0: .long 0xb2af0000 \n"
806 "1: ipm %0 \n"
807 " srl %0,28 \n"
808 " lr %1,1 \n"
809 "2: \n"
810 ".section .fixup,\"ax\" \n"
811 "3: \n"
812 " lhi %0,%h3 \n"
813 " bras 1,4f \n"
814 " .long 2b \n"
815 "4: \n"
816 " l 1,0(1) \n"
817 " br 1 \n"
818 ".previous \n"
819 ".section __ex_table,\"a\" \n"
820 " .align 4 \n"
821 " .long 0b,3b \n"
822 " .long 1b,3b \n"
823 ".previous"
824 :"=d" (ccode),"=d" (*stat_p)
825 :"d" (q_nr), "K" (DEV_RSQ_EXCEPTION)
826 :"cc","0","1","2","memory");
827#endif
828 return ccode;
829}
830
831static inline int
832sen(int msg_len, unsigned char *msg_ext, struct ap_status_word *stat)
833{
834 int ccode;
835
836 asm volatile
837#ifdef __s390x__
838 (" lgr 6,%3 \n"
839 " llgfr 7,%2 \n"
840 " llgt 0,0(6) \n"
841 " lghi 1,64 \n"
842 " sll 1,24 \n"
843 " or 0,1 \n"
844 " la 6,4(6) \n"
845 " llgt 2,0(6) \n"
846 " llgt 3,4(6) \n"
847 " la 6,8(6) \n"
848 " slr 1,1 \n"
849 "0: .long 0xb2ad0026 \n"
850 "1: brc 2,0b \n"
851 " ipm %0 \n"
852 " srl %0,28 \n"
853 " iihh %0,0 \n"
854 " iihl %0,0 \n"
855 " lgr %1,1 \n"
856 "2: \n"
857 ".section .fixup,\"ax\" \n"
858 "3: \n"
859 " lhi %0,%h4 \n"
860 " jg 2b \n"
861 ".previous \n"
862 ".section __ex_table,\"a\" \n"
863 " .align 8 \n"
864 " .quad 0b,3b \n"
865 " .quad 1b,3b \n"
866 ".previous"
867 :"=d" (ccode),"=d" (*stat)
868 :"d" (msg_len),"a" (msg_ext), "K" (DEV_SEN_EXCEPTION)
869 :"cc","0","1","2","3","6","7","memory");
870#else
871 (" lr 6,%3 \n"
872 " lr 7,%2 \n"
873 " l 0,0(6) \n"
874 " lhi 1,64 \n"
875 " sll 1,24 \n"
876 " or 0,1 \n"
877 " la 6,4(6) \n"
878 " l 2,0(6) \n"
879 " l 3,4(6) \n"
880 " la 6,8(6) \n"
881 " slr 1,1 \n"
882 "0: .long 0xb2ad0026 \n"
883 "1: brc 2,0b \n"
884 " ipm %0 \n"
885 " srl %0,28 \n"
886 " lr %1,1 \n"
887 "2: \n"
888 ".section .fixup,\"ax\" \n"
889 "3: \n"
890 " lhi %0,%h4 \n"
891 " bras 1,4f \n"
892 " .long 2b \n"
893 "4: \n"
894 " l 1,0(1) \n"
895 " br 1 \n"
896 ".previous \n"
897 ".section __ex_table,\"a\" \n"
898 " .align 4 \n"
899 " .long 0b,3b \n"
900 " .long 1b,3b \n"
901 ".previous"
902 :"=d" (ccode),"=d" (*stat)
903 :"d" (msg_len),"a" (msg_ext), "K" (DEV_SEN_EXCEPTION)
904 :"cc","0","1","2","3","6","7","memory");
905#endif
906 return ccode;
907}
908
909static inline int
910rec(int q_nr, int buff_l, unsigned char *rsp, unsigned char *id,
911 struct ap_status_word *st)
912{
913 int ccode;
914
915 asm volatile
916#ifdef __s390x__
917 (" llgfr 0,%2 \n"
918 " lgr 3,%4 \n"
919 " lgr 6,%3 \n"
920 " llgfr 7,%5 \n"
921 " lghi 1,128 \n"
922 " sll 1,24 \n"
923 " or 0,1 \n"
924 " slgr 1,1 \n"
925 " lgr 2,1 \n"
926 " lgr 4,1 \n"
927 " lgr 5,1 \n"
928 "0: .long 0xb2ae0046 \n"
929 "1: brc 2,0b \n"
930 " brc 4,0b \n"
931 " ipm %0 \n"
932 " srl %0,28 \n"
933 " iihh %0,0 \n"
934 " iihl %0,0 \n"
935 " lgr %1,1 \n"
936 " st 4,0(3) \n"
937 " st 5,4(3) \n"
938 "2: \n"
939 ".section .fixup,\"ax\" \n"
940 "3: \n"
941 " lhi %0,%h6 \n"
942 " jg 2b \n"
943 ".previous \n"
944 ".section __ex_table,\"a\" \n"
945 " .align 8 \n"
946 " .quad 0b,3b \n"
947 " .quad 1b,3b \n"
948 ".previous"
949 :"=d"(ccode),"=d"(*st)
950 :"d" (q_nr), "d" (rsp), "d" (id), "d" (buff_l), "K" (DEV_REC_EXCEPTION)
951 :"cc","0","1","2","3","4","5","6","7","memory");
952#else
953 (" lr 0,%2 \n"
954 " lr 3,%4 \n"
955 " lr 6,%3 \n"
956 " lr 7,%5 \n"
957 " lhi 1,128 \n"
958 " sll 1,24 \n"
959 " or 0,1 \n"
960 " slr 1,1 \n"
961 " lr 2,1 \n"
962 " lr 4,1 \n"
963 " lr 5,1 \n"
964 "0: .long 0xb2ae0046 \n"
965 "1: brc 2,0b \n"
966 " brc 4,0b \n"
967 " ipm %0 \n"
968 " srl %0,28 \n"
969 " lr %1,1 \n"
970 " st 4,0(3) \n"
971 " st 5,4(3) \n"
972 "2: \n"
973 ".section .fixup,\"ax\" \n"
974 "3: \n"
975 " lhi %0,%h6 \n"
976 " bras 1,4f \n"
977 " .long 2b \n"
978 "4: \n"
979 " l 1,0(1) \n"
980 " br 1 \n"
981 ".previous \n"
982 ".section __ex_table,\"a\" \n"
983 " .align 4 \n"
984 " .long 0b,3b \n"
985 " .long 1b,3b \n"
986 ".previous"
987 :"=d"(ccode),"=d"(*st)
988 :"d" (q_nr), "d" (rsp), "d" (id), "d" (buff_l), "K" (DEV_REC_EXCEPTION)
989 :"cc","0","1","2","3","4","5","6","7","memory");
990#endif
991 return ccode;
992}
993
994static inline void
995itoLe2(int *i_p, unsigned char *lechars)
996{
997 *lechars = *((unsigned char *) i_p + sizeof(int) - 1);
998 *(lechars + 1) = *((unsigned char *) i_p + sizeof(int) - 2);
999}
1000
1001static inline void
1002le2toI(unsigned char *lechars, int *i_p)
1003{
1004 unsigned char *ic_p;
1005 *i_p = 0;
1006 ic_p = (unsigned char *) i_p;
1007 *(ic_p + 2) = *(lechars + 1);
1008 *(ic_p + 3) = *(lechars);
1009}
1010
1011static inline int
1012is_empty(unsigned char *ptr, int len)
1013{
1014 return !memcmp(ptr, (unsigned char *) &static_pvt_me_key+60, len);
1015}
1016
1017enum hdstat
1018query_online(int deviceNr, int cdx, int resetNr, int *q_depth, int *dev_type)
1019{
1020 int q_nr, i, t_depth, t_dev_type;
1021 enum devstat ccode;
1022 struct ap_status_word stat_word;
1023 enum hdstat stat;
1024 int break_out;
1025
1026 q_nr = (deviceNr << SKIP_BITL) + cdx;
1027 stat = HD_BUSY;
1028 ccode = testq(q_nr, &t_depth, &t_dev_type, &stat_word);
1029 PDEBUG("ccode %d response_code %02X\n", ccode, stat_word.response_code);
1030 break_out = 0;
1031 for (i = 0; i < resetNr; i++) {
1032 if (ccode > 3) {
1033 PRINTKC("Exception testing device %d\n", i);
1034 return HD_TSQ_EXCEPTION;
1035 }
1036 switch (ccode) {
1037 case 0:
1038 PDEBUG("t_dev_type %d\n", t_dev_type);
1039 break_out = 1;
1040 stat = HD_ONLINE;
1041 *q_depth = t_depth + 1;
1042 switch (t_dev_type) {
1043 case OTHER_HW:
1044 stat = HD_NOT_THERE;
1045 *dev_type = NILDEV;
1046 break;
1047 case PCICA_HW:
1048 *dev_type = PCICA;
1049 break;
1050 case PCICC_HW:
1051 *dev_type = PCICC;
1052 break;
1053 case PCIXCC_HW:
1054 *dev_type = PCIXCC_UNK;
1055 break;
1056 case CEX2C_HW:
1057 *dev_type = CEX2C;
1058 break;
1059 default:
1060 *dev_type = NILDEV;
1061 break;
1062 }
1063 PDEBUG("available device %d: Q depth = %d, dev "
1064 "type = %d, stat = %02X%02X%02X%02X\n",
1065 deviceNr, *q_depth, *dev_type,
1066 stat_word.q_stat_flags,
1067 stat_word.response_code,
1068 stat_word.reserved[0],
1069 stat_word.reserved[1]);
1070 break;
1071 case 3:
1072 switch (stat_word.response_code) {
1073 case AP_RESPONSE_NORMAL:
1074 stat = HD_ONLINE;
1075 break_out = 1;
1076 *q_depth = t_depth + 1;
1077 *dev_type = t_dev_type;
1078 PDEBUG("cc3, available device "
1079 "%d: Q depth = %d, dev "
1080 "type = %d, stat = "
1081 "%02X%02X%02X%02X\n",
1082 deviceNr, *q_depth,
1083 *dev_type,
1084 stat_word.q_stat_flags,
1085 stat_word.response_code,
1086 stat_word.reserved[0],
1087 stat_word.reserved[1]);
1088 break;
1089 case AP_RESPONSE_Q_NOT_AVAIL:
1090 stat = HD_NOT_THERE;
1091 break_out = 1;
1092 break;
1093 case AP_RESPONSE_RESET_IN_PROGRESS:
1094 PDEBUG("device %d in reset\n",
1095 deviceNr);
1096 break;
1097 case AP_RESPONSE_DECONFIGURED:
1098 stat = HD_DECONFIGURED;
1099 break_out = 1;
1100 break;
1101 case AP_RESPONSE_CHECKSTOPPED:
1102 stat = HD_CHECKSTOPPED;
1103 break_out = 1;
1104 break;
1105 case AP_RESPONSE_BUSY:
1106 PDEBUG("device %d busy\n",
1107 deviceNr);
1108 break;
1109 default:
1110 break;
1111 }
1112 break;
1113 default:
1114 stat = HD_NOT_THERE;
1115 break_out = 1;
1116 break;
1117 }
1118 if (break_out)
1119 break;
1120
1121 udelay(5);
1122
1123 ccode = testq(q_nr, &t_depth, &t_dev_type, &stat_word);
1124 }
1125 return stat;
1126}
1127
1128enum devstat
1129reset_device(int deviceNr, int cdx, int resetNr)
1130{
1131 int q_nr, ccode = 0, dummy_qdepth, dummy_devType, i;
1132 struct ap_status_word stat_word;
1133 enum devstat stat;
1134 int break_out;
1135
1136 q_nr = (deviceNr << SKIP_BITL) + cdx;
1137 stat = DEV_GONE;
1138 ccode = resetq(q_nr, &stat_word);
1139 if (ccode > 3)
1140 return DEV_RSQ_EXCEPTION;
1141
1142 break_out = 0;
1143 for (i = 0; i < resetNr; i++) {
1144 switch (ccode) {
1145 case 0:
1146 stat = DEV_ONLINE;
1147 if (stat_word.q_stat_flags & AP_Q_STATUS_EMPTY)
1148 break_out = 1;
1149 break;
1150 case 3:
1151 switch (stat_word.response_code) {
1152 case AP_RESPONSE_NORMAL:
1153 stat = DEV_ONLINE;
1154 if (stat_word.q_stat_flags & AP_Q_STATUS_EMPTY)
1155 break_out = 1;
1156 break;
1157 case AP_RESPONSE_Q_NOT_AVAIL:
1158 case AP_RESPONSE_DECONFIGURED:
1159 case AP_RESPONSE_CHECKSTOPPED:
1160 stat = DEV_GONE;
1161 break_out = 1;
1162 break;
1163 case AP_RESPONSE_RESET_IN_PROGRESS:
1164 case AP_RESPONSE_BUSY:
1165 default:
1166 break;
1167 }
1168 break;
1169 default:
1170 stat = DEV_GONE;
1171 break_out = 1;
1172 break;
1173 }
1174 if (break_out == 1)
1175 break;
1176 udelay(5);
1177
1178 ccode = testq(q_nr, &dummy_qdepth, &dummy_devType, &stat_word);
1179 if (ccode > 3) {
1180 stat = DEV_TSQ_EXCEPTION;
1181 break;
1182 }
1183 }
1184 PDEBUG("Number of testq's needed for reset: %d\n", i);
1185
1186 if (i >= resetNr) {
1187 stat = DEV_GONE;
1188 }
1189
1190 return stat;
1191}
1192
1193#ifdef DEBUG_HYDRA_MSGS
1194static inline void
1195print_buffer(unsigned char *buffer, int bufflen)
1196{
1197 int i;
1198 for (i = 0; i < bufflen; i += 16) {
1199 PRINTK("%04X: %02X%02X%02X%02X %02X%02X%02X%02X "
1200 "%02X%02X%02X%02X %02X%02X%02X%02X\n", i,
1201 buffer[i+0], buffer[i+1], buffer[i+2], buffer[i+3],
1202 buffer[i+4], buffer[i+5], buffer[i+6], buffer[i+7],
1203 buffer[i+8], buffer[i+9], buffer[i+10], buffer[i+11],
1204 buffer[i+12], buffer[i+13], buffer[i+14], buffer[i+15]);
1205 }
1206}
1207#endif
1208
1209enum devstat
1210send_to_AP(int dev_nr, int cdx, int msg_len, unsigned char *msg_ext)
1211{
1212 struct ap_status_word stat_word;
1213 enum devstat stat;
1214 int ccode;
1215
1216 ((struct request_msg_ext *) msg_ext)->q_nr =
1217 (dev_nr << SKIP_BITL) + cdx;
1218 PDEBUG("msg_len passed to sen: %d\n", msg_len);
1219 PDEBUG("q number passed to sen: %02x%02x%02x%02x\n",
1220 msg_ext[0], msg_ext[1], msg_ext[2], msg_ext[3]);
1221 stat = DEV_GONE;
1222
1223#ifdef DEBUG_HYDRA_MSGS
1224 PRINTK("Request header: %02X%02X%02X%02X %02X%02X%02X%02X "
1225 "%02X%02X%02X%02X\n",
1226 msg_ext[0], msg_ext[1], msg_ext[2], msg_ext[3],
1227 msg_ext[4], msg_ext[5], msg_ext[6], msg_ext[7],
1228 msg_ext[8], msg_ext[9], msg_ext[10], msg_ext[11]);
1229 print_buffer(msg_ext+CALLER_HEADER, msg_len);
1230#endif
1231
1232 ccode = sen(msg_len, msg_ext, &stat_word);
1233 if (ccode > 3)
1234 return DEV_SEN_EXCEPTION;
1235
1236 PDEBUG("nq cc: %u, st: %02x%02x%02x%02x\n",
1237 ccode, stat_word.q_stat_flags, stat_word.response_code,
1238 stat_word.reserved[0], stat_word.reserved[1]);
1239 switch (ccode) {
1240 case 0:
1241 stat = DEV_ONLINE;
1242 break;
1243 case 1:
1244 stat = DEV_GONE;
1245 break;
1246 case 3:
1247 switch (stat_word.response_code) {
1248 case AP_RESPONSE_NORMAL:
1249 stat = DEV_ONLINE;
1250 break;
1251 case AP_RESPONSE_Q_FULL:
1252 stat = DEV_QUEUE_FULL;
1253 break;
1254 default:
1255 stat = DEV_GONE;
1256 break;
1257 }
1258 break;
1259 default:
1260 stat = DEV_GONE;
1261 break;
1262 }
1263
1264 return stat;
1265}
1266
1267enum devstat
1268receive_from_AP(int dev_nr, int cdx, int resplen, unsigned char *resp,
1269 unsigned char *psmid)
1270{
1271 int ccode;
1272 struct ap_status_word stat_word;
1273 enum devstat stat;
1274
1275 memset(resp, 0x00, 8);
1276
1277 ccode = rec((dev_nr << SKIP_BITL) + cdx, resplen, resp, psmid,
1278 &stat_word);
1279 if (ccode > 3)
1280 return DEV_REC_EXCEPTION;
1281
1282 PDEBUG("dq cc: %u, st: %02x%02x%02x%02x\n",
1283 ccode, stat_word.q_stat_flags, stat_word.response_code,
1284 stat_word.reserved[0], stat_word.reserved[1]);
1285
1286 stat = DEV_GONE;
1287 switch (ccode) {
1288 case 0:
1289 stat = DEV_ONLINE;
1290#ifdef DEBUG_HYDRA_MSGS
1291 print_buffer(resp, resplen);
1292#endif
1293 break;
1294 case 3:
1295 switch (stat_word.response_code) {
1296 case AP_RESPONSE_NORMAL:
1297 stat = DEV_ONLINE;
1298 break;
1299 case AP_RESPONSE_NO_PENDING_REPLY:
1300 if (stat_word.q_stat_flags & AP_Q_STATUS_EMPTY)
1301 stat = DEV_EMPTY;
1302 else
1303 stat = DEV_NO_WORK;
1304 break;
1305 case AP_RESPONSE_INDEX_TOO_BIG:
1306 case AP_RESPONSE_NO_FIRST_PART:
1307 case AP_RESPONSE_MESSAGE_TOO_BIG:
1308 stat = DEV_BAD_MESSAGE;
1309 break;
1310 default:
1311 break;
1312 }
1313 break;
1314 default:
1315 break;
1316 }
1317
1318 return stat;
1319}
1320
1321static inline int
1322pad_msg(unsigned char *buffer, int totalLength, int msgLength)
1323{
1324 int pad_len;
1325
1326 for (pad_len = 0; pad_len < (totalLength - msgLength); pad_len++)
1327 if (buffer[pad_len] != 0x00)
1328 break;
1329 pad_len -= 3;
1330 if (pad_len < 8)
1331 return SEN_PAD_ERROR;
1332
1333 buffer[0] = 0x00;
1334 buffer[1] = 0x02;
1335
1336 memcpy(buffer+2, static_pad, pad_len);
1337
1338 buffer[pad_len + 2] = 0x00;
1339
1340 return 0;
1341}
1342
1343static inline int
1344is_common_public_key(unsigned char *key, int len)
1345{
1346 int i;
1347
1348 for (i = 0; i < len; i++)
1349 if (key[i])
1350 break;
1351 key += i;
1352 len -= i;
1353 if (((len == 1) && (key[0] == 3)) ||
1354 ((len == 3) && (key[0] == 1) && (key[1] == 0) && (key[2] == 1)))
1355 return 1;
1356
1357 return 0;
1358}
1359
1360static int
1361ICAMEX_msg_to_type4MEX_msg(struct ica_rsa_modexpo *icaMex_p, int *z90cMsg_l_p,
1362 union type4_msg *z90cMsg_p)
1363{
1364 int mod_len, msg_size, mod_tgt_len, exp_tgt_len, inp_tgt_len;
1365 unsigned char *mod_tgt, *exp_tgt, *inp_tgt;
1366 union type4_msg *tmp_type4_msg;
1367
1368 mod_len = icaMex_p->inputdatalength;
1369
1370 msg_size = ((mod_len <= 128) ? TYPE4_SME_LEN : TYPE4_LME_LEN) +
1371 CALLER_HEADER;
1372
1373 memset(z90cMsg_p, 0, msg_size);
1374
1375 tmp_type4_msg = (union type4_msg *)
1376 ((unsigned char *) z90cMsg_p + CALLER_HEADER);
1377
1378 tmp_type4_msg->sme.header.msg_type_code = TYPE4_TYPE_CODE;
1379 tmp_type4_msg->sme.header.request_code = TYPE4_REQU_CODE;
1380
1381 if (mod_len <= 128) {
1382 tmp_type4_msg->sme.header.msg_fmt = TYPE4_SME_FMT;
1383 tmp_type4_msg->sme.header.msg_len = TYPE4_SME_LEN;
1384 mod_tgt = tmp_type4_msg->sme.modulus;
1385 mod_tgt_len = sizeof(tmp_type4_msg->sme.modulus);
1386 exp_tgt = tmp_type4_msg->sme.exponent;
1387 exp_tgt_len = sizeof(tmp_type4_msg->sme.exponent);
1388 inp_tgt = tmp_type4_msg->sme.message;
1389 inp_tgt_len = sizeof(tmp_type4_msg->sme.message);
1390 } else {
1391 tmp_type4_msg->lme.header.msg_fmt = TYPE4_LME_FMT;
1392 tmp_type4_msg->lme.header.msg_len = TYPE4_LME_LEN;
1393 mod_tgt = tmp_type4_msg->lme.modulus;
1394 mod_tgt_len = sizeof(tmp_type4_msg->lme.modulus);
1395 exp_tgt = tmp_type4_msg->lme.exponent;
1396 exp_tgt_len = sizeof(tmp_type4_msg->lme.exponent);
1397 inp_tgt = tmp_type4_msg->lme.message;
1398 inp_tgt_len = sizeof(tmp_type4_msg->lme.message);
1399 }
1400
1401 mod_tgt += (mod_tgt_len - mod_len);
1402 if (copy_from_user(mod_tgt, icaMex_p->n_modulus, mod_len))
1403 return SEN_RELEASED;
1404 if (is_empty(mod_tgt, mod_len))
1405 return SEN_USER_ERROR;
1406 exp_tgt += (exp_tgt_len - mod_len);
1407 if (copy_from_user(exp_tgt, icaMex_p->b_key, mod_len))
1408 return SEN_RELEASED;
1409 if (is_empty(exp_tgt, mod_len))
1410 return SEN_USER_ERROR;
1411 inp_tgt += (inp_tgt_len - mod_len);
1412 if (copy_from_user(inp_tgt, icaMex_p->inputdata, mod_len))
1413 return SEN_RELEASED;
1414 if (is_empty(inp_tgt, mod_len))
1415 return SEN_USER_ERROR;
1416
1417 *z90cMsg_l_p = msg_size - CALLER_HEADER;
1418
1419 return 0;
1420}
1421
1422static int
1423ICACRT_msg_to_type4CRT_msg(struct ica_rsa_modexpo_crt *icaMsg_p,
1424 int *z90cMsg_l_p, union type4_msg *z90cMsg_p)
1425{
1426 int mod_len, short_len, long_len, tmp_size, p_tgt_len, q_tgt_len,
1427 dp_tgt_len, dq_tgt_len, u_tgt_len, inp_tgt_len;
1428 unsigned char *p_tgt, *q_tgt, *dp_tgt, *dq_tgt, *u_tgt, *inp_tgt;
1429 union type4_msg *tmp_type4_msg;
1430
1431 mod_len = icaMsg_p->inputdatalength;
1432 short_len = mod_len / 2;
1433 long_len = mod_len / 2 + 8;
1434
1435 tmp_size = ((mod_len <= 128) ? TYPE4_SCR_LEN : TYPE4_LCR_LEN) +
1436 CALLER_HEADER;
1437
1438 memset(z90cMsg_p, 0, tmp_size);
1439
1440 tmp_type4_msg = (union type4_msg *)
1441 ((unsigned char *) z90cMsg_p + CALLER_HEADER);
1442
1443 tmp_type4_msg->scr.header.msg_type_code = TYPE4_TYPE_CODE;
1444 tmp_type4_msg->scr.header.request_code = TYPE4_REQU_CODE;
1445 if (mod_len <= 128) {
1446 tmp_type4_msg->scr.header.msg_fmt = TYPE4_SCR_FMT;
1447 tmp_type4_msg->scr.header.msg_len = TYPE4_SCR_LEN;
1448 p_tgt = tmp_type4_msg->scr.p;
1449 p_tgt_len = sizeof(tmp_type4_msg->scr.p);
1450 q_tgt = tmp_type4_msg->scr.q;
1451 q_tgt_len = sizeof(tmp_type4_msg->scr.q);
1452 dp_tgt = tmp_type4_msg->scr.dp;
1453 dp_tgt_len = sizeof(tmp_type4_msg->scr.dp);
1454 dq_tgt = tmp_type4_msg->scr.dq;
1455 dq_tgt_len = sizeof(tmp_type4_msg->scr.dq);
1456 u_tgt = tmp_type4_msg->scr.u;
1457 u_tgt_len = sizeof(tmp_type4_msg->scr.u);
1458 inp_tgt = tmp_type4_msg->scr.message;
1459 inp_tgt_len = sizeof(tmp_type4_msg->scr.message);
1460 } else {
1461 tmp_type4_msg->lcr.header.msg_fmt = TYPE4_LCR_FMT;
1462 tmp_type4_msg->lcr.header.msg_len = TYPE4_LCR_LEN;
1463 p_tgt = tmp_type4_msg->lcr.p;
1464 p_tgt_len = sizeof(tmp_type4_msg->lcr.p);
1465 q_tgt = tmp_type4_msg->lcr.q;
1466 q_tgt_len = sizeof(tmp_type4_msg->lcr.q);
1467 dp_tgt = tmp_type4_msg->lcr.dp;
1468 dp_tgt_len = sizeof(tmp_type4_msg->lcr.dp);
1469 dq_tgt = tmp_type4_msg->lcr.dq;
1470 dq_tgt_len = sizeof(tmp_type4_msg->lcr.dq);
1471 u_tgt = tmp_type4_msg->lcr.u;
1472 u_tgt_len = sizeof(tmp_type4_msg->lcr.u);
1473 inp_tgt = tmp_type4_msg->lcr.message;
1474 inp_tgt_len = sizeof(tmp_type4_msg->lcr.message);
1475 }
1476
1477 p_tgt += (p_tgt_len - long_len);
1478 if (copy_from_user(p_tgt, icaMsg_p->np_prime, long_len))
1479 return SEN_RELEASED;
1480 if (is_empty(p_tgt, long_len))
1481 return SEN_USER_ERROR;
1482 q_tgt += (q_tgt_len - short_len);
1483 if (copy_from_user(q_tgt, icaMsg_p->nq_prime, short_len))
1484 return SEN_RELEASED;
1485 if (is_empty(q_tgt, short_len))
1486 return SEN_USER_ERROR;
1487 dp_tgt += (dp_tgt_len - long_len);
1488 if (copy_from_user(dp_tgt, icaMsg_p->bp_key, long_len))
1489 return SEN_RELEASED;
1490 if (is_empty(dp_tgt, long_len))
1491 return SEN_USER_ERROR;
1492 dq_tgt += (dq_tgt_len - short_len);
1493 if (copy_from_user(dq_tgt, icaMsg_p->bq_key, short_len))
1494 return SEN_RELEASED;
1495 if (is_empty(dq_tgt, short_len))
1496 return SEN_USER_ERROR;
1497 u_tgt += (u_tgt_len - long_len);
1498 if (copy_from_user(u_tgt, icaMsg_p->u_mult_inv, long_len))
1499 return SEN_RELEASED;
1500 if (is_empty(u_tgt, long_len))
1501 return SEN_USER_ERROR;
1502 inp_tgt += (inp_tgt_len - mod_len);
1503 if (copy_from_user(inp_tgt, icaMsg_p->inputdata, mod_len))
1504 return SEN_RELEASED;
1505 if (is_empty(inp_tgt, mod_len))
1506 return SEN_USER_ERROR;
1507
1508 *z90cMsg_l_p = tmp_size - CALLER_HEADER;
1509
1510 return 0;
1511}
1512
1513static int
1514ICAMEX_msg_to_type6MEX_de_msg(struct ica_rsa_modexpo *icaMsg_p, int cdx,
1515 int *z90cMsg_l_p, struct type6_msg *z90cMsg_p)
1516{
1517 int mod_len, vud_len, tmp_size, total_CPRB_len, parmBlock_l;
1518 unsigned char *temp;
1519 struct type6_hdr *tp6Hdr_p;
1520 struct CPRB *cprb_p;
1521 struct cca_private_ext_ME *key_p;
1522 static int deprecated_msg_count = 0;
1523
1524 mod_len = icaMsg_p->inputdatalength;
1525 tmp_size = FIXED_TYPE6_ME_LEN + mod_len;
1526 total_CPRB_len = tmp_size - sizeof(struct type6_hdr);
1527 parmBlock_l = total_CPRB_len - sizeof(struct CPRB);
1528 tmp_size = 4*((tmp_size + 3)/4) + CALLER_HEADER;
1529
1530 memset(z90cMsg_p, 0, tmp_size);
1531
1532 temp = (unsigned char *)z90cMsg_p + CALLER_HEADER;
1533 memcpy(temp, &static_type6_hdr, sizeof(struct type6_hdr));
1534 tp6Hdr_p = (struct type6_hdr *)temp;
1535 tp6Hdr_p->ToCardLen1 = 4*((total_CPRB_len+3)/4);
1536 tp6Hdr_p->FromCardLen1 = RESPONSE_CPRB_SIZE;
1537
1538 temp += sizeof(struct type6_hdr);
1539 memcpy(temp, &static_cprb, sizeof(struct CPRB));
1540 cprb_p = (struct CPRB *) temp;
1541 cprb_p->usage_domain[0]= (unsigned char)cdx;
1542 itoLe2(&parmBlock_l, cprb_p->req_parml);
1543 itoLe2((int *)&(tp6Hdr_p->FromCardLen1), cprb_p->rpl_parml);
1544
1545 temp += sizeof(struct CPRB);
1546 memcpy(temp, &static_pkd_function_and_rules,
1547 sizeof(struct function_and_rules_block));
1548
1549 temp += sizeof(struct function_and_rules_block);
1550 vud_len = 2 + icaMsg_p->inputdatalength;
1551 itoLe2(&vud_len, temp);
1552
1553 temp += 2;
1554 if (copy_from_user(temp, icaMsg_p->inputdata, mod_len))
1555 return SEN_RELEASED;
1556 if (is_empty(temp, mod_len))
1557 return SEN_USER_ERROR;
1558
1559 temp += mod_len;
1560 memcpy(temp, &static_T6_keyBlock_hdr, sizeof(struct T6_keyBlock_hdr));
1561
1562 temp += sizeof(struct T6_keyBlock_hdr);
1563 memcpy(temp, &static_pvt_me_key, sizeof(struct cca_private_ext_ME));
1564 key_p = (struct cca_private_ext_ME *)temp;
1565 temp = key_p->pvtMESec.exponent + sizeof(key_p->pvtMESec.exponent)
1566 - mod_len;
1567 if (copy_from_user(temp, icaMsg_p->b_key, mod_len))
1568 return SEN_RELEASED;
1569 if (is_empty(temp, mod_len))
1570 return SEN_USER_ERROR;
1571
1572 if (is_common_public_key(temp, mod_len)) {
1573 if (deprecated_msg_count < 20) {
1574 PRINTK("Common public key used for modex decrypt\n");
1575 deprecated_msg_count++;
1576 if (deprecated_msg_count == 20)
1577 PRINTK("No longer issuing messages about common"
1578 " public key for modex decrypt.\n");
1579 }
1580 return SEN_NOT_AVAIL;
1581 }
1582
1583 temp = key_p->pvtMESec.modulus + sizeof(key_p->pvtMESec.modulus)
1584 - mod_len;
1585 if (copy_from_user(temp, icaMsg_p->n_modulus, mod_len))
1586 return SEN_RELEASED;
1587 if (is_empty(temp, mod_len))
1588 return SEN_USER_ERROR;
1589
1590 key_p->pubMESec.modulus_bit_len = 8 * mod_len;
1591
1592 *z90cMsg_l_p = tmp_size - CALLER_HEADER;
1593
1594 return 0;
1595}
1596
1597static int
1598ICAMEX_msg_to_type6MEX_en_msg(struct ica_rsa_modexpo *icaMsg_p, int cdx,
1599 int *z90cMsg_l_p, struct type6_msg *z90cMsg_p)
1600{
1601 int mod_len, vud_len, exp_len, key_len;
1602 int pad_len, tmp_size, total_CPRB_len, parmBlock_l, i;
1603 unsigned char *temp_exp, *exp_p, *temp;
1604 struct type6_hdr *tp6Hdr_p;
1605 struct CPRB *cprb_p;
1606 struct cca_public_key *key_p;
1607 struct T6_keyBlock_hdr *keyb_p;
1608
1609 temp_exp = kmalloc(256, GFP_KERNEL);
1610 if (!temp_exp)
1611 return EGETBUFF;
1612 mod_len = icaMsg_p->inputdatalength;
1613 if (copy_from_user(temp_exp, icaMsg_p->b_key, mod_len)) {
1614 kfree(temp_exp);
1615 return SEN_RELEASED;
1616 }
1617 if (is_empty(temp_exp, mod_len)) {
1618 kfree(temp_exp);
1619 return SEN_USER_ERROR;
1620 }
1621
1622 exp_p = temp_exp;
1623 for (i = 0; i < mod_len; i++)
1624 if (exp_p[i])
1625 break;
1626 if (i >= mod_len) {
1627 kfree(temp_exp);
1628 return SEN_USER_ERROR;
1629 }
1630
1631 exp_len = mod_len - i;
1632 exp_p += i;
1633
1634 PDEBUG("exp_len after computation: %08x\n", exp_len);
1635 tmp_size = FIXED_TYPE6_ME_EN_LEN + 2 * mod_len + exp_len;
1636 total_CPRB_len = tmp_size - sizeof(struct type6_hdr);
1637 parmBlock_l = total_CPRB_len - sizeof(struct CPRB);
1638 tmp_size = 4*((tmp_size + 3)/4) + CALLER_HEADER;
1639
1640 vud_len = 2 + mod_len;
1641 memset(z90cMsg_p, 0, tmp_size);
1642
1643 temp = (unsigned char *)z90cMsg_p + CALLER_HEADER;
1644 memcpy(temp, &static_type6_hdr, sizeof(struct type6_hdr));
1645 tp6Hdr_p = (struct type6_hdr *)temp;
1646 tp6Hdr_p->ToCardLen1 = 4*((total_CPRB_len+3)/4);
1647 tp6Hdr_p->FromCardLen1 = RESPONSE_CPRB_SIZE;
1648 memcpy(tp6Hdr_p->function_code, static_PKE_function_code,
1649 sizeof(static_PKE_function_code));
1650 temp += sizeof(struct type6_hdr);
1651 memcpy(temp, &static_cprb, sizeof(struct CPRB));
1652 cprb_p = (struct CPRB *) temp;
1653 cprb_p->usage_domain[0]= (unsigned char)cdx;
1654 itoLe2((int *)&(tp6Hdr_p->FromCardLen1), cprb_p->rpl_parml);
1655 temp += sizeof(struct CPRB);
1656 memcpy(temp, &static_pke_function_and_rules,
1657 sizeof(struct function_and_rules_block));
1658 temp += sizeof(struct function_and_rules_block);
1659 temp += 2;
1660 if (copy_from_user(temp, icaMsg_p->inputdata, mod_len)) {
1661 kfree(temp_exp);
1662 return SEN_RELEASED;
1663 }
1664 if (is_empty(temp, mod_len)) {
1665 kfree(temp_exp);
1666 return SEN_USER_ERROR;
1667 }
1668 if ((temp[0] != 0x00) || (temp[1] != 0x02)) {
1669 kfree(temp_exp);
1670 return SEN_NOT_AVAIL;
1671 }
1672 for (i = 2; i < mod_len; i++)
1673 if (temp[i] == 0x00)
1674 break;
1675 if ((i < 9) || (i > (mod_len - 2))) {
1676 kfree(temp_exp);
1677 return SEN_NOT_AVAIL;
1678 }
1679 pad_len = i + 1;
1680 vud_len = mod_len - pad_len;
1681 memmove(temp, temp+pad_len, vud_len);
1682 temp -= 2;
1683 vud_len += 2;
1684 itoLe2(&vud_len, temp);
1685 temp += (vud_len);
1686 keyb_p = (struct T6_keyBlock_hdr *)temp;
1687 temp += sizeof(struct T6_keyBlock_hdr);
1688 memcpy(temp, &static_public_key, sizeof(static_public_key));
1689 key_p = (struct cca_public_key *)temp;
1690 temp = key_p->pubSec.exponent;
1691 memcpy(temp, exp_p, exp_len);
1692 kfree(temp_exp);
1693 temp += exp_len;
1694 if (copy_from_user(temp, icaMsg_p->n_modulus, mod_len))
1695 return SEN_RELEASED;
1696 if (is_empty(temp, mod_len))
1697 return SEN_USER_ERROR;
1698 key_p->pubSec.modulus_bit_len = 8 * mod_len;
1699 key_p->pubSec.modulus_byte_len = mod_len;
1700 key_p->pubSec.exponent_len = exp_len;
1701 key_p->pubSec.section_length = CALLER_HEADER + mod_len + exp_len;
1702 key_len = key_p->pubSec.section_length + sizeof(struct cca_token_hdr);
1703 key_p->pubHdr.token_length = key_len;
1704 key_len += 4;
1705 itoLe2(&key_len, keyb_p->ulen);
1706 key_len += 2;
1707 itoLe2(&key_len, keyb_p->blen);
1708 parmBlock_l -= pad_len;
1709 itoLe2(&parmBlock_l, cprb_p->req_parml);
1710 *z90cMsg_l_p = tmp_size - CALLER_HEADER;
1711
1712 return 0;
1713}
1714
1715static int
1716ICACRT_msg_to_type6CRT_msg(struct ica_rsa_modexpo_crt *icaMsg_p, int cdx,
1717 int *z90cMsg_l_p, struct type6_msg *z90cMsg_p)
1718{
1719 int mod_len, vud_len, tmp_size, total_CPRB_len, parmBlock_l, short_len;
1720 int long_len, pad_len, keyPartsLen, tmp_l;
1721 unsigned char *tgt_p, *temp;
1722 struct type6_hdr *tp6Hdr_p;
1723 struct CPRB *cprb_p;
1724 struct cca_token_hdr *keyHdr_p;
1725 struct cca_pvt_ext_CRT_sec *pvtSec_p;
1726 struct cca_public_sec *pubSec_p;
1727
1728 mod_len = icaMsg_p->inputdatalength;
1729 short_len = mod_len / 2;
1730 long_len = 8 + short_len;
1731 keyPartsLen = 3 * long_len + 2 * short_len;
1732 pad_len = (8 - (keyPartsLen % 8)) % 8;
1733 keyPartsLen += pad_len + mod_len;
1734 tmp_size = FIXED_TYPE6_CR_LEN + keyPartsLen + mod_len;
1735 total_CPRB_len = tmp_size - sizeof(struct type6_hdr);
1736 parmBlock_l = total_CPRB_len - sizeof(struct CPRB);
1737 vud_len = 2 + mod_len;
1738 tmp_size = 4*((tmp_size + 3)/4) + CALLER_HEADER;
1739
1740 memset(z90cMsg_p, 0, tmp_size);
1741 tgt_p = (unsigned char *)z90cMsg_p + CALLER_HEADER;
1742 memcpy(tgt_p, &static_type6_hdr, sizeof(struct type6_hdr));
1743 tp6Hdr_p = (struct type6_hdr *)tgt_p;
1744 tp6Hdr_p->ToCardLen1 = 4*((total_CPRB_len+3)/4);
1745 tp6Hdr_p->FromCardLen1 = RESPONSE_CPRB_SIZE;
1746 tgt_p += sizeof(struct type6_hdr);
1747 cprb_p = (struct CPRB *) tgt_p;
1748 memcpy(tgt_p, &static_cprb, sizeof(struct CPRB));
1749 cprb_p->usage_domain[0]= *((unsigned char *)(&(cdx))+3);
1750 itoLe2(&parmBlock_l, cprb_p->req_parml);
1751 memcpy(cprb_p->rpl_parml, cprb_p->req_parml,
1752 sizeof(cprb_p->req_parml));
1753 tgt_p += sizeof(struct CPRB);
1754 memcpy(tgt_p, &static_pkd_function_and_rules,
1755 sizeof(struct function_and_rules_block));
1756 tgt_p += sizeof(struct function_and_rules_block);
1757 itoLe2(&vud_len, tgt_p);
1758 tgt_p += 2;
1759 if (copy_from_user(tgt_p, icaMsg_p->inputdata, mod_len))
1760 return SEN_RELEASED;
1761 if (is_empty(tgt_p, mod_len))
1762 return SEN_USER_ERROR;
1763 tgt_p += mod_len;
1764 tmp_l = sizeof(struct T6_keyBlock_hdr) + sizeof(struct cca_token_hdr) +
1765 sizeof(struct cca_pvt_ext_CRT_sec) + 0x0F + keyPartsLen;
1766 itoLe2(&tmp_l, tgt_p);
1767 temp = tgt_p + 2;
1768 tmp_l -= 2;
1769 itoLe2(&tmp_l, temp);
1770 tgt_p += sizeof(struct T6_keyBlock_hdr);
1771 keyHdr_p = (struct cca_token_hdr *)tgt_p;
1772 keyHdr_p->token_identifier = CCA_TKN_HDR_ID_EXT;
1773 tmp_l -= 4;
1774 keyHdr_p->token_length = tmp_l;
1775 tgt_p += sizeof(struct cca_token_hdr);
1776 pvtSec_p = (struct cca_pvt_ext_CRT_sec *)tgt_p;
1777 pvtSec_p->section_identifier = CCA_PVT_EXT_CRT_SEC_ID_PVT;
1778 pvtSec_p->section_length =
1779 sizeof(struct cca_pvt_ext_CRT_sec) + keyPartsLen;
1780 pvtSec_p->key_format = CCA_PVT_EXT_CRT_SEC_FMT_CL;
1781 pvtSec_p->key_use_flags[0] = CCA_PVT_USAGE_ALL;
1782 pvtSec_p->p_len = long_len;
1783 pvtSec_p->q_len = short_len;
1784 pvtSec_p->dp_len = long_len;
1785 pvtSec_p->dq_len = short_len;
1786 pvtSec_p->u_len = long_len;
1787 pvtSec_p->mod_len = mod_len;
1788 pvtSec_p->pad_len = pad_len;
1789 tgt_p += sizeof(struct cca_pvt_ext_CRT_sec);
1790 if (copy_from_user(tgt_p, icaMsg_p->np_prime, long_len))
1791 return SEN_RELEASED;
1792 if (is_empty(tgt_p, long_len))
1793 return SEN_USER_ERROR;
1794 tgt_p += long_len;
1795 if (copy_from_user(tgt_p, icaMsg_p->nq_prime, short_len))
1796 return SEN_RELEASED;
1797 if (is_empty(tgt_p, short_len))
1798 return SEN_USER_ERROR;
1799 tgt_p += short_len;
1800 if (copy_from_user(tgt_p, icaMsg_p->bp_key, long_len))
1801 return SEN_RELEASED;
1802 if (is_empty(tgt_p, long_len))
1803 return SEN_USER_ERROR;
1804 tgt_p += long_len;
1805 if (copy_from_user(tgt_p, icaMsg_p->bq_key, short_len))
1806 return SEN_RELEASED;
1807 if (is_empty(tgt_p, short_len))
1808 return SEN_USER_ERROR;
1809 tgt_p += short_len;
1810 if (copy_from_user(tgt_p, icaMsg_p->u_mult_inv, long_len))
1811 return SEN_RELEASED;
1812 if (is_empty(tgt_p, long_len))
1813 return SEN_USER_ERROR;
1814 tgt_p += long_len;
1815 tgt_p += pad_len;
1816 memset(tgt_p, 0xFF, mod_len);
1817 tgt_p += mod_len;
1818 memcpy(tgt_p, &static_cca_pub_sec, sizeof(struct cca_public_sec));
1819 pubSec_p = (struct cca_public_sec *) tgt_p;
1820 pubSec_p->modulus_bit_len = 8 * mod_len;
1821 *z90cMsg_l_p = tmp_size - CALLER_HEADER;
1822
1823 return 0;
1824}
1825
1826static int
1827ICAMEX_msg_to_type6MEX_msgX(struct ica_rsa_modexpo *icaMsg_p, int cdx,
1828 int *z90cMsg_l_p, struct type6_msg *z90cMsg_p,
1829 int dev_type)
1830{
1831 int mod_len, exp_len, vud_len, tmp_size, total_CPRB_len, parmBlock_l;
1832 int key_len, i;
1833 unsigned char *temp_exp, *tgt_p, *temp, *exp_p;
1834 struct type6_hdr *tp6Hdr_p;
1835 struct CPRBX *cprbx_p;
1836 struct cca_public_key *key_p;
1837 struct T6_keyBlock_hdrX *keyb_p;
1838
1839 temp_exp = kmalloc(256, GFP_KERNEL);
1840 if (!temp_exp)
1841 return EGETBUFF;
1842 mod_len = icaMsg_p->inputdatalength;
1843 if (copy_from_user(temp_exp, icaMsg_p->b_key, mod_len)) {
1844 kfree(temp_exp);
1845 return SEN_RELEASED;
1846 }
1847 if (is_empty(temp_exp, mod_len)) {
1848 kfree(temp_exp);
1849 return SEN_USER_ERROR;
1850 }
1851 exp_p = temp_exp;
1852 for (i = 0; i < mod_len; i++)
1853 if (exp_p[i])
1854 break;
1855 if (i >= mod_len) {
1856 kfree(temp_exp);
1857 return SEN_USER_ERROR;
1858 }
1859 exp_len = mod_len - i;
1860 exp_p += i;
1861 PDEBUG("exp_len after computation: %08x\n", exp_len);
1862 tmp_size = FIXED_TYPE6_ME_EN_LENX + 2 * mod_len + exp_len;
1863 total_CPRB_len = tmp_size - sizeof(struct type6_hdr);
1864 parmBlock_l = total_CPRB_len - sizeof(struct CPRBX);
1865 tmp_size = tmp_size + CALLER_HEADER;
1866 vud_len = 2 + mod_len;
1867 memset(z90cMsg_p, 0, tmp_size);
1868 tgt_p = (unsigned char *)z90cMsg_p + CALLER_HEADER;
1869 memcpy(tgt_p, &static_type6_hdrX, sizeof(struct type6_hdr));
1870 tp6Hdr_p = (struct type6_hdr *)tgt_p;
1871 tp6Hdr_p->ToCardLen1 = total_CPRB_len;
1872 tp6Hdr_p->FromCardLen1 = RESPONSE_CPRBX_SIZE;
1873 memcpy(tp6Hdr_p->function_code, static_PKE_function_code,
1874 sizeof(static_PKE_function_code));
1875 tgt_p += sizeof(struct type6_hdr);
1876 memcpy(tgt_p, &static_cprbx, sizeof(struct CPRBX));
1877 cprbx_p = (struct CPRBX *) tgt_p;
1878 cprbx_p->domain = (unsigned short)cdx;
1879 cprbx_p->rpl_msgbl = RESPONSE_CPRBX_SIZE;
1880 tgt_p += sizeof(struct CPRBX);
1881 if (dev_type == PCIXCC_MCL2)
1882 memcpy(tgt_p, &static_pke_function_and_rulesX_MCL2,
1883 sizeof(struct function_and_rules_block));
1884 else
1885 memcpy(tgt_p, &static_pke_function_and_rulesX,
1886 sizeof(struct function_and_rules_block));
1887 tgt_p += sizeof(struct function_and_rules_block);
1888
1889 tgt_p += 2;
1890 if (copy_from_user(tgt_p, icaMsg_p->inputdata, mod_len)) {
1891 kfree(temp_exp);
1892 return SEN_RELEASED;
1893 }
1894 if (is_empty(tgt_p, mod_len)) {
1895 kfree(temp_exp);
1896 return SEN_USER_ERROR;
1897 }
1898 tgt_p -= 2;
1899 *((short *)tgt_p) = (short) vud_len;
1900 tgt_p += vud_len;
1901 keyb_p = (struct T6_keyBlock_hdrX *)tgt_p;
1902 tgt_p += sizeof(struct T6_keyBlock_hdrX);
1903 memcpy(tgt_p, &static_public_key, sizeof(static_public_key));
1904 key_p = (struct cca_public_key *)tgt_p;
1905 temp = key_p->pubSec.exponent;
1906 memcpy(temp, exp_p, exp_len);
1907 kfree(temp_exp);
1908 temp += exp_len;
1909 if (copy_from_user(temp, icaMsg_p->n_modulus, mod_len))
1910 return SEN_RELEASED;
1911 if (is_empty(temp, mod_len))
1912 return SEN_USER_ERROR;
1913 key_p->pubSec.modulus_bit_len = 8 * mod_len;
1914 key_p->pubSec.modulus_byte_len = mod_len;
1915 key_p->pubSec.exponent_len = exp_len;
1916 key_p->pubSec.section_length = CALLER_HEADER + mod_len + exp_len;
1917 key_len = key_p->pubSec.section_length + sizeof(struct cca_token_hdr);
1918 key_p->pubHdr.token_length = key_len;
1919 key_len += 4;
1920 keyb_p->ulen = (unsigned short)key_len;
1921 key_len += 2;
1922 keyb_p->blen = (unsigned short)key_len;
1923 cprbx_p->req_parml = parmBlock_l;
1924 *z90cMsg_l_p = tmp_size - CALLER_HEADER;
1925
1926 return 0;
1927}
1928
1929static int
1930ICACRT_msg_to_type6CRT_msgX(struct ica_rsa_modexpo_crt *icaMsg_p, int cdx,
1931 int *z90cMsg_l_p, struct type6_msg *z90cMsg_p,
1932 int dev_type)
1933{
1934 int mod_len, vud_len, tmp_size, total_CPRB_len, parmBlock_l, short_len;
1935 int long_len, pad_len, keyPartsLen, tmp_l;
1936 unsigned char *tgt_p, *temp;
1937 struct type6_hdr *tp6Hdr_p;
1938 struct CPRBX *cprbx_p;
1939 struct cca_token_hdr *keyHdr_p;
1940 struct cca_pvt_ext_CRT_sec *pvtSec_p;
1941 struct cca_public_sec *pubSec_p;
1942
1943 mod_len = icaMsg_p->inputdatalength;
1944 short_len = mod_len / 2;
1945 long_len = 8 + short_len;
1946 keyPartsLen = 3 * long_len + 2 * short_len;
1947 pad_len = (8 - (keyPartsLen % 8)) % 8;
1948 keyPartsLen += pad_len + mod_len;
1949 tmp_size = FIXED_TYPE6_CR_LENX + keyPartsLen + mod_len;
1950 total_CPRB_len = tmp_size - sizeof(struct type6_hdr);
1951 parmBlock_l = total_CPRB_len - sizeof(struct CPRBX);
1952 vud_len = 2 + mod_len;
1953 tmp_size = tmp_size + CALLER_HEADER;
1954 memset(z90cMsg_p, 0, tmp_size);
1955 tgt_p = (unsigned char *)z90cMsg_p + CALLER_HEADER;
1956 memcpy(tgt_p, &static_type6_hdrX, sizeof(struct type6_hdr));
1957 tp6Hdr_p = (struct type6_hdr *)tgt_p;
1958 tp6Hdr_p->ToCardLen1 = total_CPRB_len;
1959 tp6Hdr_p->FromCardLen1 = RESPONSE_CPRBX_SIZE;
1960 tgt_p += sizeof(struct type6_hdr);
1961 cprbx_p = (struct CPRBX *) tgt_p;
1962 memcpy(tgt_p, &static_cprbx, sizeof(struct CPRBX));
1963 cprbx_p->domain = (unsigned short)cdx;
1964 cprbx_p->req_parml = parmBlock_l;
1965 cprbx_p->rpl_msgbl = parmBlock_l;
1966 tgt_p += sizeof(struct CPRBX);
1967 if (dev_type == PCIXCC_MCL2)
1968 memcpy(tgt_p, &static_pkd_function_and_rulesX_MCL2,
1969 sizeof(struct function_and_rules_block));
1970 else
1971 memcpy(tgt_p, &static_pkd_function_and_rulesX,
1972 sizeof(struct function_and_rules_block));
1973 tgt_p += sizeof(struct function_and_rules_block);
1974 *((short *)tgt_p) = (short) vud_len;
1975 tgt_p += 2;
1976 if (copy_from_user(tgt_p, icaMsg_p->inputdata, mod_len))
1977 return SEN_RELEASED;
1978 if (is_empty(tgt_p, mod_len))
1979 return SEN_USER_ERROR;
1980 tgt_p += mod_len;
1981 tmp_l = sizeof(struct T6_keyBlock_hdr) + sizeof(struct cca_token_hdr) +
1982 sizeof(struct cca_pvt_ext_CRT_sec) + 0x0F + keyPartsLen;
1983 *((short *)tgt_p) = (short) tmp_l;
1984 temp = tgt_p + 2;
1985 tmp_l -= 2;
1986 *((short *)temp) = (short) tmp_l;
1987 tgt_p += sizeof(struct T6_keyBlock_hdr);
1988 keyHdr_p = (struct cca_token_hdr *)tgt_p;
1989 keyHdr_p->token_identifier = CCA_TKN_HDR_ID_EXT;
1990 tmp_l -= 4;
1991 keyHdr_p->token_length = tmp_l;
1992 tgt_p += sizeof(struct cca_token_hdr);
1993 pvtSec_p = (struct cca_pvt_ext_CRT_sec *)tgt_p;
1994 pvtSec_p->section_identifier = CCA_PVT_EXT_CRT_SEC_ID_PVT;
1995 pvtSec_p->section_length =
1996 sizeof(struct cca_pvt_ext_CRT_sec) + keyPartsLen;
1997 pvtSec_p->key_format = CCA_PVT_EXT_CRT_SEC_FMT_CL;
1998 pvtSec_p->key_use_flags[0] = CCA_PVT_USAGE_ALL;
1999 pvtSec_p->p_len = long_len;
2000 pvtSec_p->q_len = short_len;
2001 pvtSec_p->dp_len = long_len;
2002 pvtSec_p->dq_len = short_len;
2003 pvtSec_p->u_len = long_len;
2004 pvtSec_p->mod_len = mod_len;
2005 pvtSec_p->pad_len = pad_len;
2006 tgt_p += sizeof(struct cca_pvt_ext_CRT_sec);
2007 if (copy_from_user(tgt_p, icaMsg_p->np_prime, long_len))
2008 return SEN_RELEASED;
2009 if (is_empty(tgt_p, long_len))
2010 return SEN_USER_ERROR;
2011 tgt_p += long_len;
2012 if (copy_from_user(tgt_p, icaMsg_p->nq_prime, short_len))
2013 return SEN_RELEASED;
2014 if (is_empty(tgt_p, short_len))
2015 return SEN_USER_ERROR;
2016 tgt_p += short_len;
2017 if (copy_from_user(tgt_p, icaMsg_p->bp_key, long_len))
2018 return SEN_RELEASED;
2019 if (is_empty(tgt_p, long_len))
2020 return SEN_USER_ERROR;
2021 tgt_p += long_len;
2022 if (copy_from_user(tgt_p, icaMsg_p->bq_key, short_len))
2023 return SEN_RELEASED;
2024 if (is_empty(tgt_p, short_len))
2025 return SEN_USER_ERROR;
2026 tgt_p += short_len;
2027 if (copy_from_user(tgt_p, icaMsg_p->u_mult_inv, long_len))
2028 return SEN_RELEASED;
2029 if (is_empty(tgt_p, long_len))
2030 return SEN_USER_ERROR;
2031 tgt_p += long_len;
2032 tgt_p += pad_len;
2033 memset(tgt_p, 0xFF, mod_len);
2034 tgt_p += mod_len;
2035 memcpy(tgt_p, &static_cca_pub_sec, sizeof(struct cca_public_sec));
2036 pubSec_p = (struct cca_public_sec *) tgt_p;
2037 pubSec_p->modulus_bit_len = 8 * mod_len;
2038 *z90cMsg_l_p = tmp_size - CALLER_HEADER;
2039
2040 return 0;
2041}
2042
2043int
2044convert_request(unsigned char *buffer, int func, unsigned short function,
2045 int cdx, int dev_type, int *msg_l_p, unsigned char *msg_p)
2046{
2047 if (dev_type == PCICA) {
2048 if (func == ICARSACRT)
2049 return ICACRT_msg_to_type4CRT_msg(
2050 (struct ica_rsa_modexpo_crt *) buffer,
2051 msg_l_p, (union type4_msg *) msg_p);
2052 else
2053 return ICAMEX_msg_to_type4MEX_msg(
2054 (struct ica_rsa_modexpo *) buffer,
2055 msg_l_p, (union type4_msg *) msg_p);
2056 }
2057 if (dev_type == PCICC) {
2058 if (func == ICARSACRT)
2059 return ICACRT_msg_to_type6CRT_msg(
2060 (struct ica_rsa_modexpo_crt *) buffer,
2061 cdx, msg_l_p, (struct type6_msg *)msg_p);
2062 if (function == PCI_FUNC_KEY_ENCRYPT)
2063 return ICAMEX_msg_to_type6MEX_en_msg(
2064 (struct ica_rsa_modexpo *) buffer,
2065 cdx, msg_l_p, (struct type6_msg *) msg_p);
2066 else
2067 return ICAMEX_msg_to_type6MEX_de_msg(
2068 (struct ica_rsa_modexpo *) buffer,
2069 cdx, msg_l_p, (struct type6_msg *) msg_p);
2070 }
2071 if ((dev_type == PCIXCC_MCL2) ||
2072 (dev_type == PCIXCC_MCL3) ||
2073 (dev_type == CEX2C)) {
2074 if (func == ICARSACRT)
2075 return ICACRT_msg_to_type6CRT_msgX(
2076 (struct ica_rsa_modexpo_crt *) buffer,
2077 cdx, msg_l_p, (struct type6_msg *) msg_p,
2078 dev_type);
2079 else
2080 return ICAMEX_msg_to_type6MEX_msgX(
2081 (struct ica_rsa_modexpo *) buffer,
2082 cdx, msg_l_p, (struct type6_msg *) msg_p,
2083 dev_type);
2084 }
2085
2086 return 0;
2087}
2088
2089int ext_bitlens_msg_count = 0;
2090static inline void
2091unset_ext_bitlens(void)
2092{
2093 if (!ext_bitlens_msg_count) {
2094 PRINTK("Unable to use coprocessors for extended bitlengths. "
2095 "Using PCICAs (if present) for extended bitlengths. "
2096 "This is not an error.\n");
2097 ext_bitlens_msg_count++;
2098 }
2099 ext_bitlens = 0;
2100}
2101
2102int
2103convert_response(unsigned char *response, unsigned char *buffer,
2104 int *respbufflen_p, unsigned char *resp_buff)
2105{
2106 struct ica_rsa_modexpo *icaMsg_p = (struct ica_rsa_modexpo *) buffer;
2107 struct type82_hdr *t82h_p = (struct type82_hdr *) response;
2108 struct type84_hdr *t84h_p = (struct type84_hdr *) response;
2109 struct type86_fmt2_msg *t86m_p = (struct type86_fmt2_msg *) response;
2110 int reply_code, service_rc, service_rs, src_l;
2111 unsigned char *src_p, *tgt_p;
2112 struct CPRB *cprb_p;
2113 struct CPRBX *cprbx_p;
2114
2115 src_p = 0;
2116 reply_code = 0;
2117 service_rc = 0;
2118 service_rs = 0;
2119 src_l = 0;
2120 switch (t82h_p->type) {
2121 case TYPE82_RSP_CODE:
2122 reply_code = t82h_p->reply_code;
2123 src_p = (unsigned char *)t82h_p;
2124 PRINTK("Hardware error: Type 82 Message Header: "
2125 "%02x%02x%02x%02x%02x%02x%02x%02x\n",
2126 src_p[0], src_p[1], src_p[2], src_p[3],
2127 src_p[4], src_p[5], src_p[6], src_p[7]);
2128 break;
2129 case TYPE84_RSP_CODE:
2130 src_l = icaMsg_p->outputdatalength;
2131 src_p = response + (int)t84h_p->len - src_l;
2132 break;
2133 case TYPE86_RSP_CODE:
2134 reply_code = t86m_p->hdr.reply_code;
2135 if (reply_code != 0)
2136 break;
2137 cprb_p = (struct CPRB *)
2138 (response + sizeof(struct type86_fmt2_msg));
2139 cprbx_p = (struct CPRBX *) cprb_p;
2140 if (cprb_p->cprb_ver_id != 0x02) {
2141 le2toI(cprb_p->ccp_rtcode, &service_rc);
2142 if (service_rc != 0) {
2143 le2toI(cprb_p->ccp_rscode, &service_rs);
2144 if ((service_rc == 8) && (service_rs == 66))
2145 PDEBUG("Bad block format on PCICC\n");
2146 else if ((service_rc == 8) && (service_rs == 770)) {
2147 PDEBUG("Invalid key length on PCICC\n");
2148 unset_ext_bitlens();
2149 return REC_USE_PCICA;
2150 }
2151 else if ((service_rc == 8) && (service_rs == 783)) {
2152 PDEBUG("Extended bitlengths not enabled"
2153 "on PCICC\n");
2154 unset_ext_bitlens();
2155 return REC_USE_PCICA;
2156 }
2157 else
2158 PRINTK("service rc/rs: %d/%d\n",
2159 service_rc, service_rs);
2160 return REC_OPERAND_INV;
2161 }
2162 src_p = (unsigned char *)cprb_p + sizeof(struct CPRB);
2163 src_p += 4;
2164 le2toI(src_p, &src_l);
2165 src_l -= 2;
2166 src_p += 2;
2167 } else {
2168 service_rc = (int)cprbx_p->ccp_rtcode;
2169 if (service_rc != 0) {
2170 service_rs = (int) cprbx_p->ccp_rscode;
2171 if ((service_rc == 8) && (service_rs == 66))
2172 PDEBUG("Bad block format on PCXICC\n");
2173 else if ((service_rc == 8) && (service_rs == 770)) {
2174 PDEBUG("Invalid key length on PCIXCC\n");
2175 unset_ext_bitlens();
2176 return REC_USE_PCICA;
2177 }
2178 else if ((service_rc == 8) && (service_rs == 783)) {
2179 PDEBUG("Extended bitlengths not enabled"
2180 "on PCIXCC\n");
2181 unset_ext_bitlens();
2182 return REC_USE_PCICA;
2183 }
2184 else
2185 PRINTK("service rc/rs: %d/%d\n",
2186 service_rc, service_rs);
2187 return REC_OPERAND_INV;
2188 }
2189 src_p = (unsigned char *)
2190 cprbx_p + sizeof(struct CPRBX);
2191 src_p += 4;
2192 src_l = (int)(*((short *) src_p));
2193 src_l -= 2;
2194 src_p += 2;
2195 }
2196 break;
2197 default:
2198 return REC_BAD_MESSAGE;
2199 }
2200
2201 if (reply_code)
2202 switch (reply_code) {
2203 case REPLY_ERROR_OPERAND_INVALID:
2204 return REC_OPERAND_INV;
2205 case REPLY_ERROR_OPERAND_SIZE:
2206 return REC_OPERAND_SIZE;
2207 case REPLY_ERROR_EVEN_MOD_IN_OPND:
2208 return REC_EVEN_MOD;
2209 case REPLY_ERROR_MESSAGE_TYPE:
2210 return WRONG_DEVICE_TYPE;
2211 case REPLY_ERROR_TRANSPORT_FAIL:
2212 PRINTKW("Transport failed (APFS = %02X%02X%02X%02X)\n",
2213 t86m_p->apfs[0], t86m_p->apfs[1],
2214 t86m_p->apfs[2], t86m_p->apfs[3]);
2215 return REC_HARDWAR_ERR;
2216 default:
2217 PRINTKW("reply code = %d\n", reply_code);
2218 return REC_HARDWAR_ERR;
2219 }
2220
2221 if (service_rc != 0)
2222 return REC_OPERAND_INV;
2223
2224 if ((src_l > icaMsg_p->outputdatalength) ||
2225 (src_l > RESPBUFFSIZE) ||
2226 (src_l <= 0))
2227 return REC_OPERAND_SIZE;
2228
2229 PDEBUG("Length returned = %d\n", src_l);
2230 tgt_p = resp_buff + icaMsg_p->outputdatalength - src_l;
2231 memcpy(tgt_p, src_p, src_l);
2232 if ((t82h_p->type == TYPE86_RSP_CODE) && (resp_buff < tgt_p)) {
2233 memset(resp_buff, 0, icaMsg_p->outputdatalength - src_l);
2234 if (pad_msg(resp_buff, icaMsg_p->outputdatalength, src_l))
2235 return REC_INVALID_PAD;
2236 }
2237 *respbufflen_p = icaMsg_p->outputdatalength;
2238 if (*respbufflen_p == 0)
2239 PRINTK("Zero *respbufflen_p\n");
2240
2241 return 0;
2242}
2243
diff --git a/drivers/s390/crypto/z90main.c b/drivers/s390/crypto/z90main.c
new file mode 100644
index 000000000000..a98c00c02559
--- /dev/null
+++ b/drivers/s390/crypto/z90main.c
@@ -0,0 +1,3563 @@
1/*
2 * linux/drivers/s390/crypto/z90main.c
3 *
4 * z90crypt 1.3.2
5 *
6 * Copyright (C) 2001, 2004 IBM Corporation
7 * Author(s): Robert Burroughs (burrough@us.ibm.com)
8 * Eric Rossman (edrossma@us.ibm.com)
9 *
10 * Hotplug & misc device support: Jochen Roehrig (roehrig@de.ibm.com)
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#include <asm/uaccess.h> // copy_(from|to)_user
28#include <linux/compat.h>
29#include <linux/compiler.h>
30#include <linux/delay.h> // mdelay
31#include <linux/init.h>
32#include <linux/interrupt.h> // for tasklets
33#include <linux/ioctl32.h>
34#include <linux/module.h>
35#include <linux/moduleparam.h>
36#include <linux/kobject_uevent.h>
37#include <linux/proc_fs.h>
38#include <linux/syscalls.h>
39#include <linux/version.h>
40#include "z90crypt.h"
41#include "z90common.h"
42#ifndef Z90CRYPT_USE_HOTPLUG
43#include <linux/miscdevice.h>
44#endif
45
46#define VERSION_CODE(vers, rel, seq) (((vers)<<16) | ((rel)<<8) | (seq))
47#if LINUX_VERSION_CODE < VERSION_CODE(2,4,0) /* version < 2.4 */
48# error "This kernel is too old: not supported"
49#endif
50#if LINUX_VERSION_CODE > VERSION_CODE(2,7,0) /* version > 2.6 */
51# error "This kernel is too recent: not supported by this file"
52#endif
53
54#define VERSION_Z90MAIN_C "$Revision: 1.57 $"
55
56static char z90main_version[] __initdata =
57 "z90main.o (" VERSION_Z90MAIN_C "/"
58 VERSION_Z90COMMON_H "/" VERSION_Z90CRYPT_H ")";
59
60extern char z90hardware_version[];
61
62/**
63 * Defaults that may be modified.
64 */
65
66#ifndef Z90CRYPT_USE_HOTPLUG
67/**
68 * You can specify a different minor at compile time.
69 */
70#ifndef Z90CRYPT_MINOR
71#define Z90CRYPT_MINOR MISC_DYNAMIC_MINOR
72#endif
73#else
74/**
75 * You can specify a different major at compile time.
76 */
77#ifndef Z90CRYPT_MAJOR
78#define Z90CRYPT_MAJOR 0
79#endif
80#endif
81
82/**
83 * You can specify a different domain at compile time or on the insmod
84 * command line.
85 */
86#ifndef DOMAIN_INDEX
87#define DOMAIN_INDEX -1
88#endif
89
90/**
91 * This is the name under which the device is registered in /proc/modules.
92 */
93#define REG_NAME "z90crypt"
94
95/**
96 * Cleanup should run every CLEANUPTIME seconds and should clean up requests
97 * older than CLEANUPTIME seconds in the past.
98 */
99#ifndef CLEANUPTIME
100#define CLEANUPTIME 20
101#endif
102
103/**
104 * Config should run every CONFIGTIME seconds
105 */
106#ifndef CONFIGTIME
107#define CONFIGTIME 30
108#endif
109
110/**
111 * The first execution of the config task should take place
112 * immediately after initialization
113 */
114#ifndef INITIAL_CONFIGTIME
115#define INITIAL_CONFIGTIME 1
116#endif
117
118/**
119 * Reader should run every READERTIME milliseconds
120 * With the 100Hz patch for s390, z90crypt can lock the system solid while
121 * under heavy load. We'll try to avoid that.
122 */
123#ifndef READERTIME
124#if HZ > 1000
125#define READERTIME 2
126#else
127#define READERTIME 10
128#endif
129#endif
130
131/**
132 * turn long device array index into device pointer
133 */
134#define LONG2DEVPTR(ndx) (z90crypt.device_p[(ndx)])
135
136/**
137 * turn short device array index into long device array index
138 */
139#define SHRT2LONG(ndx) (z90crypt.overall_device_x.device_index[(ndx)])
140
141/**
142 * turn short device array index into device pointer
143 */
144#define SHRT2DEVPTR(ndx) LONG2DEVPTR(SHRT2LONG(ndx))
145
146/**
147 * Status for a work-element
148 */
149#define STAT_DEFAULT 0x00 // request has not been processed
150
151#define STAT_ROUTED 0x80 // bit 7: requests get routed to specific device
152 // else, device is determined each write
153#define STAT_FAILED 0x40 // bit 6: this bit is set if the request failed
154 // before being sent to the hardware.
155#define STAT_WRITTEN 0x30 // bits 5-4: work to be done, not sent to device
156// 0x20 // UNUSED state
157#define STAT_READPEND 0x10 // bits 5-4: work done, we're returning data now
158#define STAT_NOWORK 0x00 // bits off: no work on any queue
159#define STAT_RDWRMASK 0x30 // mask for bits 5-4
160
161/**
162 * Macros to check the status RDWRMASK
163 */
164#define CHK_RDWRMASK(statbyte) ((statbyte) & STAT_RDWRMASK)
165#define SET_RDWRMASK(statbyte, newval) \
166 {(statbyte) &= ~STAT_RDWRMASK; (statbyte) |= newval;}
167
168/**
169 * Audit Trail. Progress of a Work element
170 * audit[0]: Unless noted otherwise, these bits are all set by the process
171 */
172#define FP_COPYFROM 0x80 // Caller's buffer has been copied to work element
173#define FP_BUFFREQ 0x40 // Low Level buffer requested
174#define FP_BUFFGOT 0x20 // Low Level buffer obtained
175#define FP_SENT 0x10 // Work element sent to a crypto device
176 // (may be set by process or by reader task)
177#define FP_PENDING 0x08 // Work element placed on pending queue
178 // (may be set by process or by reader task)
179#define FP_REQUEST 0x04 // Work element placed on request queue
180#define FP_ASLEEP 0x02 // Work element about to sleep
181#define FP_AWAKE 0x01 // Work element has been awakened
182
183/**
184 * audit[1]: These bits are set by the reader task and/or the cleanup task
185 */
186#define FP_NOTPENDING 0x80 // Work element removed from pending queue
187#define FP_AWAKENING 0x40 // Caller about to be awakened
188#define FP_TIMEDOUT 0x20 // Caller timed out
189#define FP_RESPSIZESET 0x10 // Response size copied to work element
190#define FP_RESPADDRCOPIED 0x08 // Response address copied to work element
191#define FP_RESPBUFFCOPIED 0x04 // Response buffer copied to work element
192#define FP_REMREQUEST 0x02 // Work element removed from request queue
193#define FP_SIGNALED 0x01 // Work element was awakened by a signal
194
195/**
196 * audit[2]: unused
197 */
198
199/**
200 * state of the file handle in private_data.status
201 */
202#define STAT_OPEN 0
203#define STAT_CLOSED 1
204
205/**
206 * PID() expands to the process ID of the current process
207 */
208#define PID() (current->pid)
209
210/**
211 * Selected Constants. The number of APs and the number of devices
212 */
213#ifndef Z90CRYPT_NUM_APS
214#define Z90CRYPT_NUM_APS 64
215#endif
216#ifndef Z90CRYPT_NUM_DEVS
217#define Z90CRYPT_NUM_DEVS Z90CRYPT_NUM_APS
218#endif
219
220/**
221 * Buffer size for receiving responses. The maximum Response Size
222 * is actually the maximum request size, since in an error condition
223 * the request itself may be returned unchanged.
224 */
225#define MAX_RESPONSE_SIZE 0x0000077C
226
227/**
228 * A count and status-byte mask
229 */
230struct status {
231 int st_count; // # of enabled devices
232 int disabled_count; // # of disabled devices
233 int user_disabled_count; // # of devices disabled via proc fs
234 unsigned char st_mask[Z90CRYPT_NUM_APS]; // current status mask
235};
236
237/**
238 * The array of device indexes is a mechanism for fast indexing into
239 * a long (and sparse) array. For instance, if APs 3, 9 and 47 are
240 * installed, z90CDeviceIndex[0] is 3, z90CDeviceIndex[1] is 9, and
241 * z90CDeviceIndex[2] is 47.
242 */
243struct device_x {
244 int device_index[Z90CRYPT_NUM_DEVS];
245};
246
247/**
248 * All devices are arranged in a single array: 64 APs
249 */
250struct device {
251 int dev_type; // PCICA, PCICC, PCIXCC_MCL2,
252 // PCIXCC_MCL3, CEX2C
253 enum devstat dev_stat; // current device status
254 int dev_self_x; // Index in array
255 int disabled; // Set when device is in error
256 int user_disabled; // Set when device is disabled by user
257 int dev_q_depth; // q depth
258 unsigned char * dev_resp_p; // Response buffer address
259 int dev_resp_l; // Response Buffer length
260 int dev_caller_count; // Number of callers
261 int dev_total_req_cnt; // # requests for device since load
262 struct list_head dev_caller_list; // List of callers
263};
264
265/**
266 * There's a struct status and a struct device_x for each device type.
267 */
268struct hdware_block {
269 struct status hdware_mask;
270 struct status type_mask[Z90CRYPT_NUM_TYPES];
271 struct device_x type_x_addr[Z90CRYPT_NUM_TYPES];
272 unsigned char device_type_array[Z90CRYPT_NUM_APS];
273};
274
275/**
276 * z90crypt is the topmost data structure in the hierarchy.
277 */
278struct z90crypt {
279 int max_count; // Nr of possible crypto devices
280 struct status mask;
281 int q_depth_array[Z90CRYPT_NUM_DEVS];
282 int dev_type_array[Z90CRYPT_NUM_DEVS];
283 struct device_x overall_device_x; // array device indexes
284 struct device * device_p[Z90CRYPT_NUM_DEVS];
285 int terminating;
286 int domain_established;// TRUE: domain has been found
287 int cdx; // Crypto Domain Index
288 int len; // Length of this data structure
289 struct hdware_block *hdware_info;
290};
291
292/**
293 * An array of these structures is pointed to from dev_caller
294 * The length of the array depends on the device type. For APs,
295 * there are 8.
296 *
297 * The caller buffer is allocated to the user at OPEN. At WRITE,
298 * it contains the request; at READ, the response. The function
299 * send_to_crypto_device converts the request to device-dependent
300 * form and use the caller's OPEN-allocated buffer for the response.
301 */
302struct caller {
303 int caller_buf_l; // length of original request
304 unsigned char * caller_buf_p; // Original request on WRITE
305 int caller_dev_dep_req_l; // len device dependent request
306 unsigned char * caller_dev_dep_req_p; // Device dependent form
307 unsigned char caller_id[8]; // caller-supplied message id
308 struct list_head caller_liste;
309 unsigned char caller_dev_dep_req[MAX_RESPONSE_SIZE];
310};
311
312/**
313 * Function prototypes from z90hardware.c
314 */
315enum hdstat query_online(int, int, int, int *, int *);
316enum devstat reset_device(int, int, int);
317enum devstat send_to_AP(int, int, int, unsigned char *);
318enum devstat receive_from_AP(int, int, int, unsigned char *, unsigned char *);
319int convert_request(unsigned char *, int, short, int, int, int *,
320 unsigned char *);
321int convert_response(unsigned char *, unsigned char *, int *, unsigned char *);
322
323/**
324 * Low level function prototypes
325 */
326static int create_z90crypt(int *);
327static int refresh_z90crypt(int *);
328static int find_crypto_devices(struct status *);
329static int create_crypto_device(int);
330static int destroy_crypto_device(int);
331static void destroy_z90crypt(void);
332static int refresh_index_array(struct status *, struct device_x *);
333static int probe_device_type(struct device *);
334static int probe_PCIXCC_type(struct device *);
335
336/**
337 * proc fs definitions
338 */
339static struct proc_dir_entry *z90crypt_entry;
340
341/**
342 * data structures
343 */
344
345/**
346 * work_element.opener points back to this structure
347 */
348struct priv_data {
349 pid_t opener_pid;
350 unsigned char status; // 0: open 1: closed
351};
352
353/**
354 * A work element is allocated for each request
355 */
356struct work_element {
357 struct priv_data *priv_data;
358 pid_t pid;
359 int devindex; // index of device processing this w_e
360 // (If request did not specify device,
361 // -1 until placed onto a queue)
362 int devtype;
363 struct list_head liste; // used for requestq and pendingq
364 char buffer[128]; // local copy of user request
365 int buff_size; // size of the buffer for the request
366 char resp_buff[RESPBUFFSIZE];
367 int resp_buff_size;
368 char __user * resp_addr; // address of response in user space
369 unsigned int funccode; // function code of request
370 wait_queue_head_t waitq;
371 unsigned long requestsent; // time at which the request was sent
372 atomic_t alarmrung; // wake-up signal
373 unsigned char caller_id[8]; // pid + counter, for this w_e
374 unsigned char status[1]; // bits to mark status of the request
375 unsigned char audit[3]; // record of work element's progress
376 unsigned char * requestptr; // address of request buffer
377 int retcode; // return code of request
378};
379
380/**
381 * High level function prototypes
382 */
383static int z90crypt_open(struct inode *, struct file *);
384static int z90crypt_release(struct inode *, struct file *);
385static ssize_t z90crypt_read(struct file *, char __user *, size_t, loff_t *);
386static ssize_t z90crypt_write(struct file *, const char __user *,
387 size_t, loff_t *);
388static int z90crypt_ioctl(struct inode *, struct file *,
389 unsigned int, unsigned long);
390
391static void z90crypt_reader_task(unsigned long);
392static void z90crypt_schedule_reader_task(unsigned long);
393static void z90crypt_config_task(unsigned long);
394static void z90crypt_cleanup_task(unsigned long);
395
396static int z90crypt_status(char *, char **, off_t, int, int *, void *);
397static int z90crypt_status_write(struct file *, const char __user *,
398 unsigned long, void *);
399
400/**
401 * Hotplug support
402 */
403
404#ifdef Z90CRYPT_USE_HOTPLUG
405#define Z90CRYPT_HOTPLUG_ADD 1
406#define Z90CRYPT_HOTPLUG_REMOVE 2
407
408static void z90crypt_hotplug_event(int, int, int);
409#endif
410
411/**
412 * Storage allocated at initialization and used throughout the life of
413 * this insmod
414 */
415#ifdef Z90CRYPT_USE_HOTPLUG
416static int z90crypt_major = Z90CRYPT_MAJOR;
417#endif
418
419static int domain = DOMAIN_INDEX;
420static struct z90crypt z90crypt;
421static int quiesce_z90crypt;
422static spinlock_t queuespinlock;
423static struct list_head request_list;
424static int requestq_count;
425static struct list_head pending_list;
426static int pendingq_count;
427
428static struct tasklet_struct reader_tasklet;
429static struct timer_list reader_timer;
430static struct timer_list config_timer;
431static struct timer_list cleanup_timer;
432static atomic_t total_open;
433static atomic_t z90crypt_step;
434
435static struct file_operations z90crypt_fops = {
436 .owner = THIS_MODULE,
437 .read = z90crypt_read,
438 .write = z90crypt_write,
439 .ioctl = z90crypt_ioctl,
440 .open = z90crypt_open,
441 .release = z90crypt_release
442};
443
444#ifndef Z90CRYPT_USE_HOTPLUG
445static struct miscdevice z90crypt_misc_device = {
446 .minor = Z90CRYPT_MINOR,
447 .name = DEV_NAME,
448 .fops = &z90crypt_fops,
449 .devfs_name = DEV_NAME
450};
451#endif
452
453/**
454 * Documentation values.
455 */
456MODULE_AUTHOR("zSeries Linux Crypto Team: Robert H. Burroughs, Eric D. Rossman"
457 "and Jochen Roehrig");
458MODULE_DESCRIPTION("zSeries Linux Cryptographic Coprocessor device driver, "
459 "Copyright 2001, 2004 IBM Corporation");
460MODULE_LICENSE("GPL");
461module_param(domain, int, 0);
462MODULE_PARM_DESC(domain, "domain index for device");
463
464#ifdef CONFIG_COMPAT
465/**
466 * ioctl32 conversion routines
467 */
468struct ica_rsa_modexpo_32 { // For 32-bit callers
469 compat_uptr_t inputdata;
470 unsigned int inputdatalength;
471 compat_uptr_t outputdata;
472 unsigned int outputdatalength;
473 compat_uptr_t b_key;
474 compat_uptr_t n_modulus;
475};
476
477static int
478trans_modexpo32(unsigned int fd, unsigned int cmd, unsigned long arg,
479 struct file *file)
480{
481 struct ica_rsa_modexpo_32 __user *mex32u = compat_ptr(arg);
482 struct ica_rsa_modexpo_32 mex32k;
483 struct ica_rsa_modexpo __user *mex64;
484 int ret = 0;
485 unsigned int i;
486
487 if (!access_ok(VERIFY_WRITE, mex32u, sizeof(struct ica_rsa_modexpo_32)))
488 return -EFAULT;
489 mex64 = compat_alloc_user_space(sizeof(struct ica_rsa_modexpo));
490 if (!access_ok(VERIFY_WRITE, mex64, sizeof(struct ica_rsa_modexpo)))
491 return -EFAULT;
492 if (copy_from_user(&mex32k, mex32u, sizeof(struct ica_rsa_modexpo_32)))
493 return -EFAULT;
494 if (__put_user(compat_ptr(mex32k.inputdata), &mex64->inputdata) ||
495 __put_user(mex32k.inputdatalength, &mex64->inputdatalength) ||
496 __put_user(compat_ptr(mex32k.outputdata), &mex64->outputdata) ||
497 __put_user(mex32k.outputdatalength, &mex64->outputdatalength) ||
498 __put_user(compat_ptr(mex32k.b_key), &mex64->b_key) ||
499 __put_user(compat_ptr(mex32k.n_modulus), &mex64->n_modulus))
500 return -EFAULT;
501 ret = sys_ioctl(fd, cmd, (unsigned long)mex64);
502 if (!ret)
503 if (__get_user(i, &mex64->outputdatalength) ||
504 __put_user(i, &mex32u->outputdatalength))
505 ret = -EFAULT;
506 return ret;
507}
508
509struct ica_rsa_modexpo_crt_32 { // For 32-bit callers
510 compat_uptr_t inputdata;
511 unsigned int inputdatalength;
512 compat_uptr_t outputdata;
513 unsigned int outputdatalength;
514 compat_uptr_t bp_key;
515 compat_uptr_t bq_key;
516 compat_uptr_t np_prime;
517 compat_uptr_t nq_prime;
518 compat_uptr_t u_mult_inv;
519};
520
521static int
522trans_modexpo_crt32(unsigned int fd, unsigned int cmd, unsigned long arg,
523 struct file *file)
524{
525 struct ica_rsa_modexpo_crt_32 __user *crt32u = compat_ptr(arg);
526 struct ica_rsa_modexpo_crt_32 crt32k;
527 struct ica_rsa_modexpo_crt __user *crt64;
528 int ret = 0;
529 unsigned int i;
530
531 if (!access_ok(VERIFY_WRITE, crt32u,
532 sizeof(struct ica_rsa_modexpo_crt_32)))
533 return -EFAULT;
534 crt64 = compat_alloc_user_space(sizeof(struct ica_rsa_modexpo_crt));
535 if (!access_ok(VERIFY_WRITE, crt64, sizeof(struct ica_rsa_modexpo_crt)))
536 return -EFAULT;
537 if (copy_from_user(&crt32k, crt32u,
538 sizeof(struct ica_rsa_modexpo_crt_32)))
539 return -EFAULT;
540 if (__put_user(compat_ptr(crt32k.inputdata), &crt64->inputdata) ||
541 __put_user(crt32k.inputdatalength, &crt64->inputdatalength) ||
542 __put_user(compat_ptr(crt32k.outputdata), &crt64->outputdata) ||
543 __put_user(crt32k.outputdatalength, &crt64->outputdatalength) ||
544 __put_user(compat_ptr(crt32k.bp_key), &crt64->bp_key) ||
545 __put_user(compat_ptr(crt32k.bq_key), &crt64->bq_key) ||
546 __put_user(compat_ptr(crt32k.np_prime), &crt64->np_prime) ||
547 __put_user(compat_ptr(crt32k.nq_prime), &crt64->nq_prime) ||
548 __put_user(compat_ptr(crt32k.u_mult_inv), &crt64->u_mult_inv))
549 ret = -EFAULT;
550 if (!ret)
551 ret = sys_ioctl(fd, cmd, (unsigned long)crt64);
552 if (!ret)
553 if (__get_user(i, &crt64->outputdatalength) ||
554 __put_user(i, &crt32u->outputdatalength))
555 ret = -EFAULT;
556 return ret;
557}
558
559static int compatible_ioctls[] = {
560 ICAZ90STATUS, Z90QUIESCE, Z90STAT_TOTALCOUNT, Z90STAT_PCICACOUNT,
561 Z90STAT_PCICCCOUNT, Z90STAT_PCIXCCCOUNT, Z90STAT_PCIXCCMCL2COUNT,
562 Z90STAT_PCIXCCMCL3COUNT, Z90STAT_CEX2CCOUNT, Z90STAT_REQUESTQ_COUNT,
563 Z90STAT_PENDINGQ_COUNT, Z90STAT_TOTALOPEN_COUNT, Z90STAT_DOMAIN_INDEX,
564 Z90STAT_STATUS_MASK, Z90STAT_QDEPTH_MASK, Z90STAT_PERDEV_REQCNT,
565};
566
567static void z90_unregister_ioctl32s(void)
568{
569 int i;
570
571 unregister_ioctl32_conversion(ICARSAMODEXPO);
572 unregister_ioctl32_conversion(ICARSACRT);
573
574 for(i = 0; i < ARRAY_SIZE(compatible_ioctls); i++)
575 unregister_ioctl32_conversion(compatible_ioctls[i]);
576}
577
578static int z90_register_ioctl32s(void)
579{
580 int result, i;
581
582 result = register_ioctl32_conversion(ICARSAMODEXPO, trans_modexpo32);
583 if (result == -EBUSY) {
584 unregister_ioctl32_conversion(ICARSAMODEXPO);
585 result = register_ioctl32_conversion(ICARSAMODEXPO,
586 trans_modexpo32);
587 }
588 if (result)
589 return result;
590 result = register_ioctl32_conversion(ICARSACRT, trans_modexpo_crt32);
591 if (result == -EBUSY) {
592 unregister_ioctl32_conversion(ICARSACRT);
593 result = register_ioctl32_conversion(ICARSACRT,
594 trans_modexpo_crt32);
595 }
596 if (result)
597 return result;
598
599 for(i = 0; i < ARRAY_SIZE(compatible_ioctls); i++) {
600 result = register_ioctl32_conversion(compatible_ioctls[i], 0);
601 if (result == -EBUSY) {
602 unregister_ioctl32_conversion(compatible_ioctls[i]);
603 result = register_ioctl32_conversion(
604 compatible_ioctls[i], 0);
605 }
606 if (result)
607 return result;
608 }
609 return 0;
610}
611#else // !CONFIG_COMPAT
612static inline void z90_unregister_ioctl32s(void)
613{
614}
615
616static inline int z90_register_ioctl32s(void)
617{
618 return 0;
619}
620#endif
621
622/**
623 * The module initialization code.
624 */
625static int __init
626z90crypt_init_module(void)
627{
628 int result, nresult;
629 struct proc_dir_entry *entry;
630
631 PDEBUG("PID %d\n", PID());
632
633 if ((domain < -1) || (domain > 15)) {
634 PRINTKW("Invalid param: domain = %d. Not loading.\n", domain);
635 return -EINVAL;
636 }
637
638#ifndef Z90CRYPT_USE_HOTPLUG
639 /* Register as misc device with given minor (or get a dynamic one). */
640 result = misc_register(&z90crypt_misc_device);
641 if (result < 0) {
642 PRINTKW(KERN_ERR "misc_register (minor %d) failed with %d\n",
643 z90crypt_misc_device.minor, result);
644 return result;
645 }
646#else
647 /* Register the major (or get a dynamic one). */
648 result = register_chrdev(z90crypt_major, REG_NAME, &z90crypt_fops);
649 if (result < 0) {
650 PRINTKW("register_chrdev (major %d) failed with %d.\n",
651 z90crypt_major, result);
652 return result;
653 }
654
655 if (z90crypt_major == 0)
656 z90crypt_major = result;
657#endif
658
659 PDEBUG("Registered " DEV_NAME " with result %d\n", result);
660
661 result = create_z90crypt(&domain);
662 if (result != 0) {
663 PRINTKW("create_z90crypt (domain index %d) failed with %d.\n",
664 domain, result);
665 result = -ENOMEM;
666 goto init_module_cleanup;
667 }
668
669 if (result == 0) {
670 PRINTKN("Version %d.%d.%d loaded, built on %s %s\n",
671 z90crypt_VERSION, z90crypt_RELEASE, z90crypt_VARIANT,
672 __DATE__, __TIME__);
673 PRINTKN("%s\n", z90main_version);
674 PRINTKN("%s\n", z90hardware_version);
675 PDEBUG("create_z90crypt (domain index %d) successful.\n",
676 domain);
677 } else
678 PRINTK("No devices at startup\n");
679
680#ifdef Z90CRYPT_USE_HOTPLUG
681 /* generate hotplug event for device node generation */
682 z90crypt_hotplug_event(z90crypt_major, 0, Z90CRYPT_HOTPLUG_ADD);
683#endif
684
685 /* Initialize globals. */
686 spin_lock_init(&queuespinlock);
687
688 INIT_LIST_HEAD(&pending_list);
689 pendingq_count = 0;
690
691 INIT_LIST_HEAD(&request_list);
692 requestq_count = 0;
693
694 quiesce_z90crypt = 0;
695
696 atomic_set(&total_open, 0);
697 atomic_set(&z90crypt_step, 0);
698
699 /* Set up the cleanup task. */
700 init_timer(&cleanup_timer);
701 cleanup_timer.function = z90crypt_cleanup_task;
702 cleanup_timer.data = 0;
703 cleanup_timer.expires = jiffies + (CLEANUPTIME * HZ);
704 add_timer(&cleanup_timer);
705
706 /* Set up the proc file system */
707 entry = create_proc_entry("driver/z90crypt", 0644, 0);
708 if (entry) {
709 entry->nlink = 1;
710 entry->data = 0;
711 entry->read_proc = z90crypt_status;
712 entry->write_proc = z90crypt_status_write;
713 }
714 else
715 PRINTK("Couldn't create z90crypt proc entry\n");
716 z90crypt_entry = entry;
717
718 /* Set up the configuration task. */
719 init_timer(&config_timer);
720 config_timer.function = z90crypt_config_task;
721 config_timer.data = 0;
722 config_timer.expires = jiffies + (INITIAL_CONFIGTIME * HZ);
723 add_timer(&config_timer);
724
725 /* Set up the reader task */
726 tasklet_init(&reader_tasklet, z90crypt_reader_task, 0);
727 init_timer(&reader_timer);
728 reader_timer.function = z90crypt_schedule_reader_task;
729 reader_timer.data = 0;
730 reader_timer.expires = jiffies + (READERTIME * HZ / 1000);
731 add_timer(&reader_timer);
732
733 if ((result = z90_register_ioctl32s()))
734 goto init_module_cleanup;
735
736 return 0; // success
737
738init_module_cleanup:
739 z90_unregister_ioctl32s();
740
741#ifndef Z90CRYPT_USE_HOTPLUG
742 if ((nresult = misc_deregister(&z90crypt_misc_device)))
743 PRINTK("misc_deregister failed with %d.\n", nresult);
744 else
745 PDEBUG("misc_deregister successful.\n");
746#else
747 if ((nresult = unregister_chrdev(z90crypt_major, REG_NAME)))
748 PRINTK("unregister_chrdev failed with %d.\n", nresult);
749 else
750 PDEBUG("unregister_chrdev successful.\n");
751#endif
752
753 return result; // failure
754}
755
756/**
757 * The module termination code
758 */
759static void __exit
760z90crypt_cleanup_module(void)
761{
762 int nresult;
763
764 PDEBUG("PID %d\n", PID());
765
766 z90_unregister_ioctl32s();
767
768 remove_proc_entry("driver/z90crypt", 0);
769
770#ifndef Z90CRYPT_USE_HOTPLUG
771 if ((nresult = misc_deregister(&z90crypt_misc_device)))
772 PRINTK("misc_deregister failed with %d.\n", nresult);
773 else
774 PDEBUG("misc_deregister successful.\n");
775#else
776 z90crypt_hotplug_event(z90crypt_major, 0, Z90CRYPT_HOTPLUG_REMOVE);
777
778 if ((nresult = unregister_chrdev(z90crypt_major, REG_NAME)))
779 PRINTK("unregister_chrdev failed with %d.\n", nresult);
780 else
781 PDEBUG("unregister_chrdev successful.\n");
782#endif
783
784 /* Remove the tasks */
785 tasklet_kill(&reader_tasklet);
786 del_timer(&reader_timer);
787 del_timer(&config_timer);
788 del_timer(&cleanup_timer);
789
790 destroy_z90crypt();
791
792 PRINTKN("Unloaded.\n");
793}
794
795/**
796 * Functions running under a process id
797 *
798 * The I/O functions:
799 * z90crypt_open
800 * z90crypt_release
801 * z90crypt_read
802 * z90crypt_write
803 * z90crypt_ioctl
804 * z90crypt_status
805 * z90crypt_status_write
806 * disable_card
807 * enable_card
808 * scan_char
809 * scan_string
810 *
811 * Helper functions:
812 * z90crypt_rsa
813 * z90crypt_prepare
814 * z90crypt_send
815 * z90crypt_process_results
816 *
817 */
818static int
819z90crypt_open(struct inode *inode, struct file *filp)
820{
821 struct priv_data *private_data_p;
822
823 if (quiesce_z90crypt)
824 return -EQUIESCE;
825
826 private_data_p = kmalloc(sizeof(struct priv_data), GFP_KERNEL);
827 if (!private_data_p) {
828 PRINTK("Memory allocate failed\n");
829 return -ENOMEM;
830 }
831
832 memset((void *)private_data_p, 0, sizeof(struct priv_data));
833 private_data_p->status = STAT_OPEN;
834 private_data_p->opener_pid = PID();
835 filp->private_data = private_data_p;
836 atomic_inc(&total_open);
837
838 return 0;
839}
840
841static int
842z90crypt_release(struct inode *inode, struct file *filp)
843{
844 struct priv_data *private_data_p = filp->private_data;
845
846 PDEBUG("PID %d (filp %p)\n", PID(), filp);
847
848 private_data_p->status = STAT_CLOSED;
849 memset(private_data_p, 0, sizeof(struct priv_data));
850 kfree(private_data_p);
851 atomic_dec(&total_open);
852
853 return 0;
854}
855
856/*
857 * there are two read functions, of which compile options will choose one
858 * without USE_GET_RANDOM_BYTES
859 * => read() always returns -EPERM;
860 * otherwise
861 * => read() uses get_random_bytes() kernel function
862 */
863#ifndef USE_GET_RANDOM_BYTES
864/**
865 * z90crypt_read will not be supported beyond z90crypt 1.3.1
866 */
867static ssize_t
868z90crypt_read(struct file *filp, char __user *buf, size_t count, loff_t *f_pos)
869{
870 PDEBUG("filp %p (PID %d)\n", filp, PID());
871 return -EPERM;
872}
873#else // we want to use get_random_bytes
874/**
875 * read() just returns a string of random bytes. Since we have no way
876 * to generate these cryptographically, we just execute get_random_bytes
877 * for the length specified.
878 */
879#include <linux/random.h>
880static ssize_t
881z90crypt_read(struct file *filp, char __user *buf, size_t count, loff_t *f_pos)
882{
883 unsigned char *temp_buff;
884
885 PDEBUG("filp %p (PID %d)\n", filp, PID());
886
887 if (quiesce_z90crypt)
888 return -EQUIESCE;
889 if (count < 0) {
890 PRINTK("Requested random byte count negative: %ld\n", count);
891 return -EINVAL;
892 }
893 if (count > RESPBUFFSIZE) {
894 PDEBUG("count[%d] > RESPBUFFSIZE", count);
895 return -EINVAL;
896 }
897 if (count == 0)
898 return 0;
899 temp_buff = kmalloc(RESPBUFFSIZE, GFP_KERNEL);
900 if (!temp_buff) {
901 PRINTK("Memory allocate failed\n");
902 return -ENOMEM;
903 }
904 get_random_bytes(temp_buff, count);
905
906 if (copy_to_user(buf, temp_buff, count) != 0) {
907 kfree(temp_buff);
908 return -EFAULT;
909 }
910 kfree(temp_buff);
911 return count;
912}
913#endif
914
915/**
916 * Write is is not allowed
917 */
918static ssize_t
919z90crypt_write(struct file *filp, const char __user *buf, size_t count, loff_t *f_pos)
920{
921 PDEBUG("filp %p (PID %d)\n", filp, PID());
922 return -EPERM;
923}
924
925/**
926 * New status functions
927 */
928static inline int
929get_status_totalcount(void)
930{
931 return z90crypt.hdware_info->hdware_mask.st_count;
932}
933
934static inline int
935get_status_PCICAcount(void)
936{
937 return z90crypt.hdware_info->type_mask[PCICA].st_count;
938}
939
940static inline int
941get_status_PCICCcount(void)
942{
943 return z90crypt.hdware_info->type_mask[PCICC].st_count;
944}
945
946static inline int
947get_status_PCIXCCcount(void)
948{
949 return z90crypt.hdware_info->type_mask[PCIXCC_MCL2].st_count +
950 z90crypt.hdware_info->type_mask[PCIXCC_MCL3].st_count;
951}
952
953static inline int
954get_status_PCIXCCMCL2count(void)
955{
956 return z90crypt.hdware_info->type_mask[PCIXCC_MCL2].st_count;
957}
958
959static inline int
960get_status_PCIXCCMCL3count(void)
961{
962 return z90crypt.hdware_info->type_mask[PCIXCC_MCL3].st_count;
963}
964
965static inline int
966get_status_CEX2Ccount(void)
967{
968 return z90crypt.hdware_info->type_mask[CEX2C].st_count;
969}
970
971static inline int
972get_status_requestq_count(void)
973{
974 return requestq_count;
975}
976
977static inline int
978get_status_pendingq_count(void)
979{
980 return pendingq_count;
981}
982
983static inline int
984get_status_totalopen_count(void)
985{
986 return atomic_read(&total_open);
987}
988
989static inline int
990get_status_domain_index(void)
991{
992 return z90crypt.cdx;
993}
994
995static inline unsigned char *
996get_status_status_mask(unsigned char status[Z90CRYPT_NUM_APS])
997{
998 int i, ix;
999
1000 memcpy(status, z90crypt.hdware_info->device_type_array,
1001 Z90CRYPT_NUM_APS);
1002
1003 for (i = 0; i < get_status_totalcount(); i++) {
1004 ix = SHRT2LONG(i);
1005 if (LONG2DEVPTR(ix)->user_disabled)
1006 status[ix] = 0x0d;
1007 }
1008
1009 return status;
1010}
1011
1012static inline unsigned char *
1013get_status_qdepth_mask(unsigned char qdepth[Z90CRYPT_NUM_APS])
1014{
1015 int i, ix;
1016
1017 memset(qdepth, 0, Z90CRYPT_NUM_APS);
1018
1019 for (i = 0; i < get_status_totalcount(); i++) {
1020 ix = SHRT2LONG(i);
1021 qdepth[ix] = LONG2DEVPTR(ix)->dev_caller_count;
1022 }
1023
1024 return qdepth;
1025}
1026
1027static inline unsigned int *
1028get_status_perdevice_reqcnt(unsigned int reqcnt[Z90CRYPT_NUM_APS])
1029{
1030 int i, ix;
1031
1032 memset(reqcnt, 0, Z90CRYPT_NUM_APS * sizeof(int));
1033
1034 for (i = 0; i < get_status_totalcount(); i++) {
1035 ix = SHRT2LONG(i);
1036 reqcnt[ix] = LONG2DEVPTR(ix)->dev_total_req_cnt;
1037 }
1038
1039 return reqcnt;
1040}
1041
1042static inline void
1043init_work_element(struct work_element *we_p,
1044 struct priv_data *priv_data, pid_t pid)
1045{
1046 int step;
1047
1048 we_p->requestptr = (unsigned char *)we_p + sizeof(struct work_element);
1049 /* Come up with a unique id for this caller. */
1050 step = atomic_inc_return(&z90crypt_step);
1051 memcpy(we_p->caller_id+0, (void *) &pid, sizeof(pid));
1052 memcpy(we_p->caller_id+4, (void *) &step, sizeof(step));
1053 we_p->pid = pid;
1054 we_p->priv_data = priv_data;
1055 we_p->status[0] = STAT_DEFAULT;
1056 we_p->audit[0] = 0x00;
1057 we_p->audit[1] = 0x00;
1058 we_p->audit[2] = 0x00;
1059 we_p->resp_buff_size = 0;
1060 we_p->retcode = 0;
1061 we_p->devindex = -1;
1062 we_p->devtype = -1;
1063 atomic_set(&we_p->alarmrung, 0);
1064 init_waitqueue_head(&we_p->waitq);
1065 INIT_LIST_HEAD(&(we_p->liste));
1066}
1067
1068static inline int
1069allocate_work_element(struct work_element **we_pp,
1070 struct priv_data *priv_data_p, pid_t pid)
1071{
1072 struct work_element *we_p;
1073
1074 we_p = (struct work_element *) get_zeroed_page(GFP_KERNEL);
1075 if (!we_p)
1076 return -ENOMEM;
1077 init_work_element(we_p, priv_data_p, pid);
1078 *we_pp = we_p;
1079 return 0;
1080}
1081
1082static inline void
1083remove_device(struct device *device_p)
1084{
1085 if (!device_p || (device_p->disabled != 0))
1086 return;
1087 device_p->disabled = 1;
1088 z90crypt.hdware_info->type_mask[device_p->dev_type].disabled_count++;
1089 z90crypt.hdware_info->hdware_mask.disabled_count++;
1090}
1091
1092/**
1093 * Bitlength limits for each card
1094 *
1095 * There are new MCLs which allow more bitlengths. See the table for details.
1096 * The MCL must be applied and the newer bitlengths enabled for these to work.
1097 *
1098 * Card Type Old limit New limit
1099 * PCICC 512-1024 512-2048
1100 * PCIXCC_MCL2 512-2048 no change (applying this MCL == card is MCL3+)
1101 * PCIXCC_MCL3 512-2048 128-2048
1102 * CEX2C 512-2048 128-2048
1103 *
1104 * ext_bitlens (extended bitlengths) is a global, since you should not apply an
1105 * MCL to just one card in a machine. We assume, at first, that all cards have
1106 * these capabilities.
1107 */
1108int ext_bitlens = 1; // This is global
1109#define PCIXCC_MIN_MOD_SIZE 16 // 128 bits
1110#define OLD_PCIXCC_MIN_MOD_SIZE 64 // 512 bits
1111#define PCICC_MIN_MOD_SIZE 64 // 512 bits
1112#define OLD_PCICC_MAX_MOD_SIZE 128 // 1024 bits
1113#define MAX_MOD_SIZE 256 // 2048 bits
1114
1115static inline int
1116select_device_type(int *dev_type_p, int bytelength)
1117{
1118 static int count = 0;
1119 int PCICA_avail, PCIXCC_MCL3_avail, CEX2C_avail, index_to_use;
1120 struct status *stat;
1121 if ((*dev_type_p != PCICC) && (*dev_type_p != PCICA) &&
1122 (*dev_type_p != PCIXCC_MCL2) && (*dev_type_p != PCIXCC_MCL3) &&
1123 (*dev_type_p != CEX2C) && (*dev_type_p != ANYDEV))
1124 return -1;
1125 if (*dev_type_p != ANYDEV) {
1126 stat = &z90crypt.hdware_info->type_mask[*dev_type_p];
1127 if (stat->st_count >
1128 (stat->disabled_count + stat->user_disabled_count))
1129 return 0;
1130 return -1;
1131 }
1132
1133 /* Assumption: PCICA, PCIXCC_MCL3, and CEX2C are all similar in speed */
1134 stat = &z90crypt.hdware_info->type_mask[PCICA];
1135 PCICA_avail = stat->st_count -
1136 (stat->disabled_count + stat->user_disabled_count);
1137 stat = &z90crypt.hdware_info->type_mask[PCIXCC_MCL3];
1138 PCIXCC_MCL3_avail = stat->st_count -
1139 (stat->disabled_count + stat->user_disabled_count);
1140 stat = &z90crypt.hdware_info->type_mask[CEX2C];
1141 CEX2C_avail = stat->st_count -
1142 (stat->disabled_count + stat->user_disabled_count);
1143 if (PCICA_avail || PCIXCC_MCL3_avail || CEX2C_avail) {
1144 /**
1145 * bitlength is a factor, PCICA is the most capable, even with
1146 * the new MCL.
1147 */
1148 if ((bytelength < PCIXCC_MIN_MOD_SIZE) ||
1149 (!ext_bitlens && (bytelength < OLD_PCIXCC_MIN_MOD_SIZE))) {
1150 if (!PCICA_avail)
1151 return -1;
1152 else {
1153 *dev_type_p = PCICA;
1154 return 0;
1155 }
1156 }
1157
1158 index_to_use = count % (PCICA_avail + PCIXCC_MCL3_avail +
1159 CEX2C_avail);
1160 if (index_to_use < PCICA_avail)
1161 *dev_type_p = PCICA;
1162 else if (index_to_use < (PCICA_avail + PCIXCC_MCL3_avail))
1163 *dev_type_p = PCIXCC_MCL3;
1164 else
1165 *dev_type_p = CEX2C;
1166 count++;
1167 return 0;
1168 }
1169
1170 /* Less than OLD_PCIXCC_MIN_MOD_SIZE cannot go to a PCIXCC_MCL2 */
1171 if (bytelength < OLD_PCIXCC_MIN_MOD_SIZE)
1172 return -1;
1173 stat = &z90crypt.hdware_info->type_mask[PCIXCC_MCL2];
1174 if (stat->st_count >
1175 (stat->disabled_count + stat->user_disabled_count)) {
1176 *dev_type_p = PCIXCC_MCL2;
1177 return 0;
1178 }
1179
1180 /**
1181 * Less than PCICC_MIN_MOD_SIZE or more than OLD_PCICC_MAX_MOD_SIZE
1182 * (if we don't have the MCL applied and the newer bitlengths enabled)
1183 * cannot go to a PCICC
1184 */
1185 if ((bytelength < PCICC_MIN_MOD_SIZE) ||
1186 (!ext_bitlens && (bytelength > OLD_PCICC_MAX_MOD_SIZE))) {
1187 return -1;
1188 }
1189 stat = &z90crypt.hdware_info->type_mask[PCICC];
1190 if (stat->st_count >
1191 (stat->disabled_count + stat->user_disabled_count)) {
1192 *dev_type_p = PCICC;
1193 return 0;
1194 }
1195
1196 return -1;
1197}
1198
1199/**
1200 * Try the selected number, then the selected type (can be ANYDEV)
1201 */
1202static inline int
1203select_device(int *dev_type_p, int *device_nr_p, int bytelength)
1204{
1205 int i, indx, devTp, low_count, low_indx;
1206 struct device_x *index_p;
1207 struct device *dev_ptr;
1208
1209 PDEBUG("device type = %d, index = %d\n", *dev_type_p, *device_nr_p);
1210 if ((*device_nr_p >= 0) && (*device_nr_p < Z90CRYPT_NUM_DEVS)) {
1211 PDEBUG("trying index = %d\n", *device_nr_p);
1212 dev_ptr = z90crypt.device_p[*device_nr_p];
1213
1214 if (dev_ptr &&
1215 (dev_ptr->dev_stat != DEV_GONE) &&
1216 (dev_ptr->disabled == 0) &&
1217 (dev_ptr->user_disabled == 0)) {
1218 PDEBUG("selected by number, index = %d\n",
1219 *device_nr_p);
1220 *dev_type_p = dev_ptr->dev_type;
1221 return *device_nr_p;
1222 }
1223 }
1224 *device_nr_p = -1;
1225 PDEBUG("trying type = %d\n", *dev_type_p);
1226 devTp = *dev_type_p;
1227 if (select_device_type(&devTp, bytelength) == -1) {
1228 PDEBUG("failed to select by type\n");
1229 return -1;
1230 }
1231 PDEBUG("selected type = %d\n", devTp);
1232 index_p = &z90crypt.hdware_info->type_x_addr[devTp];
1233 low_count = 0x0000FFFF;
1234 low_indx = -1;
1235 for (i = 0; i < z90crypt.hdware_info->type_mask[devTp].st_count; i++) {
1236 indx = index_p->device_index[i];
1237 dev_ptr = z90crypt.device_p[indx];
1238 if (dev_ptr &&
1239 (dev_ptr->dev_stat != DEV_GONE) &&
1240 (dev_ptr->disabled == 0) &&
1241 (dev_ptr->user_disabled == 0) &&
1242 (devTp == dev_ptr->dev_type) &&
1243 (low_count > dev_ptr->dev_caller_count)) {
1244 low_count = dev_ptr->dev_caller_count;
1245 low_indx = indx;
1246 }
1247 }
1248 *device_nr_p = low_indx;
1249 return low_indx;
1250}
1251
1252static inline int
1253send_to_crypto_device(struct work_element *we_p)
1254{
1255 struct caller *caller_p;
1256 struct device *device_p;
1257 int dev_nr;
1258 int bytelen = ((struct ica_rsa_modexpo *)we_p->buffer)->inputdatalength;
1259
1260 if (!we_p->requestptr)
1261 return SEN_FATAL_ERROR;
1262 caller_p = (struct caller *)we_p->requestptr;
1263 dev_nr = we_p->devindex;
1264 if (select_device(&we_p->devtype, &dev_nr, bytelen) == -1) {
1265 if (z90crypt.hdware_info->hdware_mask.st_count != 0)
1266 return SEN_RETRY;
1267 else
1268 return SEN_NOT_AVAIL;
1269 }
1270 we_p->devindex = dev_nr;
1271 device_p = z90crypt.device_p[dev_nr];
1272 if (!device_p)
1273 return SEN_NOT_AVAIL;
1274 if (device_p->dev_type != we_p->devtype)
1275 return SEN_RETRY;
1276 if (device_p->dev_caller_count >= device_p->dev_q_depth)
1277 return SEN_QUEUE_FULL;
1278 PDEBUG("device number prior to send: %d\n", dev_nr);
1279 switch (send_to_AP(dev_nr, z90crypt.cdx,
1280 caller_p->caller_dev_dep_req_l,
1281 caller_p->caller_dev_dep_req_p)) {
1282 case DEV_SEN_EXCEPTION:
1283 PRINTKC("Exception during send to device %d\n", dev_nr);
1284 z90crypt.terminating = 1;
1285 return SEN_FATAL_ERROR;
1286 case DEV_GONE:
1287 PRINTK("Device %d not available\n", dev_nr);
1288 remove_device(device_p);
1289 return SEN_NOT_AVAIL;
1290 case DEV_EMPTY:
1291 return SEN_NOT_AVAIL;
1292 case DEV_NO_WORK:
1293 return SEN_FATAL_ERROR;
1294 case DEV_BAD_MESSAGE:
1295 return SEN_USER_ERROR;
1296 case DEV_QUEUE_FULL:
1297 return SEN_QUEUE_FULL;
1298 default:
1299 case DEV_ONLINE:
1300 break;
1301 }
1302 list_add_tail(&(caller_p->caller_liste), &(device_p->dev_caller_list));
1303 device_p->dev_caller_count++;
1304 return 0;
1305}
1306
1307/**
1308 * Send puts the user's work on one of two queues:
1309 * the pending queue if the send was successful
1310 * the request queue if the send failed because device full or busy
1311 */
1312static inline int
1313z90crypt_send(struct work_element *we_p, const char *buf)
1314{
1315 int rv;
1316
1317 PDEBUG("PID %d\n", PID());
1318
1319 if (CHK_RDWRMASK(we_p->status[0]) != STAT_NOWORK) {
1320 PDEBUG("PID %d tried to send more work but has outstanding "
1321 "work.\n", PID());
1322 return -EWORKPEND;
1323 }
1324 we_p->devindex = -1; // Reset device number
1325 spin_lock_irq(&queuespinlock);
1326 rv = send_to_crypto_device(we_p);
1327 switch (rv) {
1328 case 0:
1329 we_p->requestsent = jiffies;
1330 we_p->audit[0] |= FP_SENT;
1331 list_add_tail(&we_p->liste, &pending_list);
1332 ++pendingq_count;
1333 we_p->audit[0] |= FP_PENDING;
1334 break;
1335 case SEN_BUSY:
1336 case SEN_QUEUE_FULL:
1337 rv = 0;
1338 we_p->devindex = -1; // any device will do
1339 we_p->requestsent = jiffies;
1340 list_add_tail(&we_p->liste, &request_list);
1341 ++requestq_count;
1342 we_p->audit[0] |= FP_REQUEST;
1343 break;
1344 case SEN_RETRY:
1345 rv = -ERESTARTSYS;
1346 break;
1347 case SEN_NOT_AVAIL:
1348 PRINTK("*** No devices available.\n");
1349 rv = we_p->retcode = -ENODEV;
1350 we_p->status[0] |= STAT_FAILED;
1351 break;
1352 case REC_OPERAND_INV:
1353 case REC_OPERAND_SIZE:
1354 case REC_EVEN_MOD:
1355 case REC_INVALID_PAD:
1356 rv = we_p->retcode = -EINVAL;
1357 we_p->status[0] |= STAT_FAILED;
1358 break;
1359 default:
1360 we_p->retcode = rv;
1361 we_p->status[0] |= STAT_FAILED;
1362 break;
1363 }
1364 if (rv != -ERESTARTSYS)
1365 SET_RDWRMASK(we_p->status[0], STAT_WRITTEN);
1366 spin_unlock_irq(&queuespinlock);
1367 if (rv == 0)
1368 tasklet_schedule(&reader_tasklet);
1369 return rv;
1370}
1371
1372/**
1373 * process_results copies the user's work from kernel space.
1374 */
1375static inline int
1376z90crypt_process_results(struct work_element *we_p, char __user *buf)
1377{
1378 int rv;
1379
1380 PDEBUG("we_p %p (PID %d)\n", we_p, PID());
1381
1382 LONG2DEVPTR(we_p->devindex)->dev_total_req_cnt++;
1383 SET_RDWRMASK(we_p->status[0], STAT_READPEND);
1384
1385 rv = 0;
1386 if (!we_p->buffer) {
1387 PRINTK("we_p %p PID %d in STAT_READPEND: buffer NULL.\n",
1388 we_p, PID());
1389 rv = -ENOBUFF;
1390 }
1391
1392 if (!rv)
1393 if ((rv = copy_to_user(buf, we_p->buffer, we_p->buff_size))) {
1394 PDEBUG("copy_to_user failed: rv = %d\n", rv);
1395 rv = -EFAULT;
1396 }
1397
1398 if (!rv)
1399 rv = we_p->retcode;
1400 if (!rv)
1401 if (we_p->resp_buff_size
1402 && copy_to_user(we_p->resp_addr, we_p->resp_buff,
1403 we_p->resp_buff_size))
1404 rv = -EFAULT;
1405
1406 SET_RDWRMASK(we_p->status[0], STAT_NOWORK);
1407 return rv;
1408}
1409
1410static unsigned char NULL_psmid[8] =
1411{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
1412
1413/**
1414 * Used in device configuration functions
1415 */
1416#define MAX_RESET 90
1417
1418/**
1419 * This is used only for PCICC support
1420 */
1421static inline int
1422is_PKCS11_padded(unsigned char *buffer, int length)
1423{
1424 int i;
1425 if ((buffer[0] != 0x00) || (buffer[1] != 0x01))
1426 return 0;
1427 for (i = 2; i < length; i++)
1428 if (buffer[i] != 0xFF)
1429 break;
1430 if ((i < 10) || (i == length))
1431 return 0;
1432 if (buffer[i] != 0x00)
1433 return 0;
1434 return 1;
1435}
1436
1437/**
1438 * This is used only for PCICC support
1439 */
1440static inline int
1441is_PKCS12_padded(unsigned char *buffer, int length)
1442{
1443 int i;
1444 if ((buffer[0] != 0x00) || (buffer[1] != 0x02))
1445 return 0;
1446 for (i = 2; i < length; i++)
1447 if (buffer[i] == 0x00)
1448 break;
1449 if ((i < 10) || (i == length))
1450 return 0;
1451 if (buffer[i] != 0x00)
1452 return 0;
1453 return 1;
1454}
1455
1456/**
1457 * builds struct caller and converts message from generic format to
1458 * device-dependent format
1459 * func is ICARSAMODEXPO or ICARSACRT
1460 * function is PCI_FUNC_KEY_ENCRYPT or PCI_FUNC_KEY_DECRYPT
1461 */
1462static inline int
1463build_caller(struct work_element *we_p, short function)
1464{
1465 int rv;
1466 struct caller *caller_p = (struct caller *)we_p->requestptr;
1467
1468 if ((we_p->devtype != PCICC) && (we_p->devtype != PCICA) &&
1469 (we_p->devtype != PCIXCC_MCL2) && (we_p->devtype != PCIXCC_MCL3) &&
1470 (we_p->devtype != CEX2C))
1471 return SEN_NOT_AVAIL;
1472
1473 memcpy(caller_p->caller_id, we_p->caller_id,
1474 sizeof(caller_p->caller_id));
1475 caller_p->caller_dev_dep_req_p = caller_p->caller_dev_dep_req;
1476 caller_p->caller_dev_dep_req_l = MAX_RESPONSE_SIZE;
1477 caller_p->caller_buf_p = we_p->buffer;
1478 INIT_LIST_HEAD(&(caller_p->caller_liste));
1479
1480 rv = convert_request(we_p->buffer, we_p->funccode, function,
1481 z90crypt.cdx, we_p->devtype,
1482 &caller_p->caller_dev_dep_req_l,
1483 caller_p->caller_dev_dep_req_p);
1484 if (rv) {
1485 if (rv == SEN_NOT_AVAIL)
1486 PDEBUG("request can't be processed on hdwr avail\n");
1487 else
1488 PRINTK("Error from convert_request: %d\n", rv);
1489 }
1490 else
1491 memcpy(&(caller_p->caller_dev_dep_req_p[4]), we_p->caller_id,8);
1492 return rv;
1493}
1494
1495static inline void
1496unbuild_caller(struct device *device_p, struct caller *caller_p)
1497{
1498 if (!caller_p)
1499 return;
1500 if (caller_p->caller_liste.next && caller_p->caller_liste.prev)
1501 if (!list_empty(&caller_p->caller_liste)) {
1502 list_del_init(&caller_p->caller_liste);
1503 device_p->dev_caller_count--;
1504 }
1505 memset(caller_p->caller_id, 0, sizeof(caller_p->caller_id));
1506}
1507
1508static inline int
1509get_crypto_request_buffer(struct work_element *we_p)
1510{
1511 struct ica_rsa_modexpo *mex_p;
1512 struct ica_rsa_modexpo_crt *crt_p;
1513 unsigned char *temp_buffer;
1514 short function;
1515 int rv;
1516
1517 mex_p = (struct ica_rsa_modexpo *) we_p->buffer;
1518 crt_p = (struct ica_rsa_modexpo_crt *) we_p->buffer;
1519
1520 PDEBUG("device type input = %d\n", we_p->devtype);
1521
1522 if (z90crypt.terminating)
1523 return REC_NO_RESPONSE;
1524 if (memcmp(we_p->caller_id, NULL_psmid, 8) == 0) {
1525 PRINTK("psmid zeroes\n");
1526 return SEN_FATAL_ERROR;
1527 }
1528 if (!we_p->buffer) {
1529 PRINTK("buffer pointer NULL\n");
1530 return SEN_USER_ERROR;
1531 }
1532 if (!we_p->requestptr) {
1533 PRINTK("caller pointer NULL\n");
1534 return SEN_USER_ERROR;
1535 }
1536
1537 if ((we_p->devtype != PCICA) && (we_p->devtype != PCICC) &&
1538 (we_p->devtype != PCIXCC_MCL2) && (we_p->devtype != PCIXCC_MCL3) &&
1539 (we_p->devtype != CEX2C) && (we_p->devtype != ANYDEV)) {
1540 PRINTK("invalid device type\n");
1541 return SEN_USER_ERROR;
1542 }
1543
1544 if ((mex_p->inputdatalength < 1) ||
1545 (mex_p->inputdatalength > MAX_MOD_SIZE)) {
1546 PRINTK("inputdatalength[%d] is not valid\n",
1547 mex_p->inputdatalength);
1548 return SEN_USER_ERROR;
1549 }
1550
1551 if (mex_p->outputdatalength < mex_p->inputdatalength) {
1552 PRINTK("outputdatalength[%d] < inputdatalength[%d]\n",
1553 mex_p->outputdatalength, mex_p->inputdatalength);
1554 return SEN_USER_ERROR;
1555 }
1556
1557 if (!mex_p->inputdata || !mex_p->outputdata) {
1558 PRINTK("inputdata[%p] or outputdata[%p] is NULL\n",
1559 mex_p->outputdata, mex_p->inputdata);
1560 return SEN_USER_ERROR;
1561 }
1562
1563 /**
1564 * As long as outputdatalength is big enough, we can set the
1565 * outputdatalength equal to the inputdatalength, since that is the
1566 * number of bytes we will copy in any case
1567 */
1568 mex_p->outputdatalength = mex_p->inputdatalength;
1569
1570 rv = 0;
1571 switch (we_p->funccode) {
1572 case ICARSAMODEXPO:
1573 if (!mex_p->b_key || !mex_p->n_modulus)
1574 rv = SEN_USER_ERROR;
1575 break;
1576 case ICARSACRT:
1577 if (!IS_EVEN(crt_p->inputdatalength)) {
1578 PRINTK("inputdatalength[%d] is odd, CRT form\n",
1579 crt_p->inputdatalength);
1580 rv = SEN_USER_ERROR;
1581 break;
1582 }
1583 if (!crt_p->bp_key ||
1584 !crt_p->bq_key ||
1585 !crt_p->np_prime ||
1586 !crt_p->nq_prime ||
1587 !crt_p->u_mult_inv) {
1588 PRINTK("CRT form, bad data: %p/%p/%p/%p/%p\n",
1589 crt_p->bp_key, crt_p->bq_key,
1590 crt_p->np_prime, crt_p->nq_prime,
1591 crt_p->u_mult_inv);
1592 rv = SEN_USER_ERROR;
1593 }
1594 break;
1595 default:
1596 PRINTK("bad func = %d\n", we_p->funccode);
1597 rv = SEN_USER_ERROR;
1598 break;
1599 }
1600 if (rv != 0)
1601 return rv;
1602
1603 if (select_device_type(&we_p->devtype, mex_p->inputdatalength) < 0)
1604 return SEN_NOT_AVAIL;
1605
1606 temp_buffer = (unsigned char *)we_p + sizeof(struct work_element) +
1607 sizeof(struct caller);
1608 if (copy_from_user(temp_buffer, mex_p->inputdata,
1609 mex_p->inputdatalength) != 0)
1610 return SEN_RELEASED;
1611
1612 function = PCI_FUNC_KEY_ENCRYPT;
1613 switch (we_p->devtype) {
1614 /* PCICA does everything with a simple RSA mod-expo operation */
1615 case PCICA:
1616 function = PCI_FUNC_KEY_ENCRYPT;
1617 break;
1618 /**
1619 * PCIXCC_MCL2 does all Mod-Expo form with a simple RSA mod-expo
1620 * operation, and all CRT forms with a PKCS-1.2 format decrypt.
1621 * PCIXCC_MCL3 and CEX2C do all Mod-Expo and CRT forms with a simple RSA
1622 * mod-expo operation
1623 */
1624 case PCIXCC_MCL2:
1625 if (we_p->funccode == ICARSAMODEXPO)
1626 function = PCI_FUNC_KEY_ENCRYPT;
1627 else
1628 function = PCI_FUNC_KEY_DECRYPT;
1629 break;
1630 case PCIXCC_MCL3:
1631 case CEX2C:
1632 if (we_p->funccode == ICARSAMODEXPO)
1633 function = PCI_FUNC_KEY_ENCRYPT;
1634 else
1635 function = PCI_FUNC_KEY_DECRYPT;
1636 break;
1637 /**
1638 * PCICC does everything as a PKCS-1.2 format request
1639 */
1640 case PCICC:
1641 /* PCICC cannot handle input that is is PKCS#1.1 padded */
1642 if (is_PKCS11_padded(temp_buffer, mex_p->inputdatalength)) {
1643 return SEN_NOT_AVAIL;
1644 }
1645 if (we_p->funccode == ICARSAMODEXPO) {
1646 if (is_PKCS12_padded(temp_buffer,
1647 mex_p->inputdatalength))
1648 function = PCI_FUNC_KEY_ENCRYPT;
1649 else
1650 function = PCI_FUNC_KEY_DECRYPT;
1651 } else
1652 /* all CRT forms are decrypts */
1653 function = PCI_FUNC_KEY_DECRYPT;
1654 break;
1655 }
1656 PDEBUG("function: %04x\n", function);
1657 rv = build_caller(we_p, function);
1658 PDEBUG("rv from build_caller = %d\n", rv);
1659 return rv;
1660}
1661
1662static inline int
1663z90crypt_prepare(struct work_element *we_p, unsigned int funccode,
1664 const char __user *buffer)
1665{
1666 int rv;
1667
1668 we_p->devindex = -1;
1669 if (funccode == ICARSAMODEXPO)
1670 we_p->buff_size = sizeof(struct ica_rsa_modexpo);
1671 else
1672 we_p->buff_size = sizeof(struct ica_rsa_modexpo_crt);
1673
1674 if (copy_from_user(we_p->buffer, buffer, we_p->buff_size))
1675 return -EFAULT;
1676
1677 we_p->audit[0] |= FP_COPYFROM;
1678 SET_RDWRMASK(we_p->status[0], STAT_WRITTEN);
1679 we_p->funccode = funccode;
1680 we_p->devtype = -1;
1681 we_p->audit[0] |= FP_BUFFREQ;
1682 rv = get_crypto_request_buffer(we_p);
1683 switch (rv) {
1684 case 0:
1685 we_p->audit[0] |= FP_BUFFGOT;
1686 break;
1687 case SEN_USER_ERROR:
1688 rv = -EINVAL;
1689 break;
1690 case SEN_QUEUE_FULL:
1691 rv = 0;
1692 break;
1693 case SEN_RELEASED:
1694 rv = -EFAULT;
1695 break;
1696 case REC_NO_RESPONSE:
1697 rv = -ENODEV;
1698 break;
1699 case SEN_NOT_AVAIL:
1700 case EGETBUFF:
1701 rv = -EGETBUFF;
1702 break;
1703 default:
1704 PRINTK("rv = %d\n", rv);
1705 rv = -EGETBUFF;
1706 break;
1707 }
1708 if (CHK_RDWRMASK(we_p->status[0]) == STAT_WRITTEN)
1709 SET_RDWRMASK(we_p->status[0], STAT_DEFAULT);
1710 return rv;
1711}
1712
1713static inline void
1714purge_work_element(struct work_element *we_p)
1715{
1716 struct list_head *lptr;
1717
1718 spin_lock_irq(&queuespinlock);
1719 list_for_each(lptr, &request_list) {
1720 if (lptr == &we_p->liste) {
1721 list_del_init(lptr);
1722 requestq_count--;
1723 break;
1724 }
1725 }
1726 list_for_each(lptr, &pending_list) {
1727 if (lptr == &we_p->liste) {
1728 list_del_init(lptr);
1729 pendingq_count--;
1730 break;
1731 }
1732 }
1733 spin_unlock_irq(&queuespinlock);
1734}
1735
1736/**
1737 * Build the request and send it.
1738 */
1739static inline int
1740z90crypt_rsa(struct priv_data *private_data_p, pid_t pid,
1741 unsigned int cmd, unsigned long arg)
1742{
1743 struct work_element *we_p;
1744 int rv;
1745
1746 if ((rv = allocate_work_element(&we_p, private_data_p, pid))) {
1747 PDEBUG("PID %d: allocate_work_element returned ENOMEM\n", pid);
1748 return rv;
1749 }
1750 if ((rv = z90crypt_prepare(we_p, cmd, (const char __user *)arg)))
1751 PDEBUG("PID %d: rv = %d from z90crypt_prepare\n", pid, rv);
1752 if (!rv)
1753 if ((rv = z90crypt_send(we_p, (const char *)arg)))
1754 PDEBUG("PID %d: rv %d from z90crypt_send.\n", pid, rv);
1755 if (!rv) {
1756 we_p->audit[0] |= FP_ASLEEP;
1757 wait_event(we_p->waitq, atomic_read(&we_p->alarmrung));
1758 we_p->audit[0] |= FP_AWAKE;
1759 rv = we_p->retcode;
1760 }
1761 if (!rv)
1762 rv = z90crypt_process_results(we_p, (char __user *)arg);
1763
1764 if ((we_p->status[0] & STAT_FAILED)) {
1765 switch (rv) {
1766 /**
1767 * EINVAL *after* receive is almost always a padding error or
1768 * length error issued by a coprocessor (not an accelerator).
1769 * We convert this return value to -EGETBUFF which should
1770 * trigger a fallback to software.
1771 */
1772 case -EINVAL:
1773 if (we_p->devtype != PCICA)
1774 rv = -EGETBUFF;
1775 break;
1776 case -ETIMEOUT:
1777 if (z90crypt.mask.st_count > 0)
1778 rv = -ERESTARTSYS; // retry with another
1779 else
1780 rv = -ENODEV; // no cards left
1781 /* fall through to clean up request queue */
1782 case -ERESTARTSYS:
1783 case -ERELEASED:
1784 switch (CHK_RDWRMASK(we_p->status[0])) {
1785 case STAT_WRITTEN:
1786 purge_work_element(we_p);
1787 break;
1788 case STAT_READPEND:
1789 case STAT_NOWORK:
1790 default:
1791 break;
1792 }
1793 break;
1794 default:
1795 we_p->status[0] ^= STAT_FAILED;
1796 break;
1797 }
1798 }
1799 free_page((long)we_p);
1800 return rv;
1801}
1802
1803/**
1804 * This function is a little long, but it's really just one large switch
1805 * statement.
1806 */
1807static int
1808z90crypt_ioctl(struct inode *inode, struct file *filp,
1809 unsigned int cmd, unsigned long arg)
1810{
1811 struct priv_data *private_data_p = filp->private_data;
1812 unsigned char *status;
1813 unsigned char *qdepth;
1814 unsigned int *reqcnt;
1815 struct ica_z90_status *pstat;
1816 int ret, i, loopLim, tempstat;
1817 static int deprecated_msg_count1 = 0;
1818 static int deprecated_msg_count2 = 0;
1819
1820 PDEBUG("filp %p (PID %d), cmd 0x%08X\n", filp, PID(), cmd);
1821 PDEBUG("cmd 0x%08X: dir %s, size 0x%04X, type 0x%02X, nr 0x%02X\n",
1822 cmd,
1823 !_IOC_DIR(cmd) ? "NO"
1824 : ((_IOC_DIR(cmd) == (_IOC_READ|_IOC_WRITE)) ? "RW"
1825 : ((_IOC_DIR(cmd) == _IOC_READ) ? "RD"
1826 : "WR")),
1827 _IOC_SIZE(cmd), _IOC_TYPE(cmd), _IOC_NR(cmd));
1828
1829 if (_IOC_TYPE(cmd) != Z90_IOCTL_MAGIC) {
1830 PRINTK("cmd 0x%08X contains bad magic\n", cmd);
1831 return -ENOTTY;
1832 }
1833
1834 ret = 0;
1835 switch (cmd) {
1836 case ICARSAMODEXPO:
1837 case ICARSACRT:
1838 if (quiesce_z90crypt) {
1839 ret = -EQUIESCE;
1840 break;
1841 }
1842 ret = -ENODEV; // Default if no devices
1843 loopLim = z90crypt.hdware_info->hdware_mask.st_count -
1844 (z90crypt.hdware_info->hdware_mask.disabled_count +
1845 z90crypt.hdware_info->hdware_mask.user_disabled_count);
1846 for (i = 0; i < loopLim; i++) {
1847 ret = z90crypt_rsa(private_data_p, PID(), cmd, arg);
1848 if (ret != -ERESTARTSYS)
1849 break;
1850 }
1851 if (ret == -ERESTARTSYS)
1852 ret = -ENODEV;
1853 break;
1854
1855 case Z90STAT_TOTALCOUNT:
1856 tempstat = get_status_totalcount();
1857 if (copy_to_user((int __user *)arg, &tempstat,sizeof(int)) != 0)
1858 ret = -EFAULT;
1859 break;
1860
1861 case Z90STAT_PCICACOUNT:
1862 tempstat = get_status_PCICAcount();
1863 if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0)
1864 ret = -EFAULT;
1865 break;
1866
1867 case Z90STAT_PCICCCOUNT:
1868 tempstat = get_status_PCICCcount();
1869 if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0)
1870 ret = -EFAULT;
1871 break;
1872
1873 case Z90STAT_PCIXCCMCL2COUNT:
1874 tempstat = get_status_PCIXCCMCL2count();
1875 if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0)
1876 ret = -EFAULT;
1877 break;
1878
1879 case Z90STAT_PCIXCCMCL3COUNT:
1880 tempstat = get_status_PCIXCCMCL3count();
1881 if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0)
1882 ret = -EFAULT;
1883 break;
1884
1885 case Z90STAT_CEX2CCOUNT:
1886 tempstat = get_status_CEX2Ccount();
1887 if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0)
1888 ret = -EFAULT;
1889 break;
1890
1891 case Z90STAT_REQUESTQ_COUNT:
1892 tempstat = get_status_requestq_count();
1893 if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0)
1894 ret = -EFAULT;
1895 break;
1896
1897 case Z90STAT_PENDINGQ_COUNT:
1898 tempstat = get_status_pendingq_count();
1899 if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0)
1900 ret = -EFAULT;
1901 break;
1902
1903 case Z90STAT_TOTALOPEN_COUNT:
1904 tempstat = get_status_totalopen_count();
1905 if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0)
1906 ret = -EFAULT;
1907 break;
1908
1909 case Z90STAT_DOMAIN_INDEX:
1910 tempstat = get_status_domain_index();
1911 if (copy_to_user((int __user *)arg, &tempstat, sizeof(int)) != 0)
1912 ret = -EFAULT;
1913 break;
1914
1915 case Z90STAT_STATUS_MASK:
1916 status = kmalloc(Z90CRYPT_NUM_APS, GFP_KERNEL);
1917 if (!status) {
1918 PRINTK("kmalloc for status failed!\n");
1919 ret = -ENOMEM;
1920 break;
1921 }
1922 get_status_status_mask(status);
1923 if (copy_to_user((char __user *) arg, status, Z90CRYPT_NUM_APS)
1924 != 0)
1925 ret = -EFAULT;
1926 kfree(status);
1927 break;
1928
1929 case Z90STAT_QDEPTH_MASK:
1930 qdepth = kmalloc(Z90CRYPT_NUM_APS, GFP_KERNEL);
1931 if (!qdepth) {
1932 PRINTK("kmalloc for qdepth failed!\n");
1933 ret = -ENOMEM;
1934 break;
1935 }
1936 get_status_qdepth_mask(qdepth);
1937 if (copy_to_user((char __user *) arg, qdepth, Z90CRYPT_NUM_APS) != 0)
1938 ret = -EFAULT;
1939 kfree(qdepth);
1940 break;
1941
1942 case Z90STAT_PERDEV_REQCNT:
1943 reqcnt = kmalloc(sizeof(int) * Z90CRYPT_NUM_APS, GFP_KERNEL);
1944 if (!reqcnt) {
1945 PRINTK("kmalloc for reqcnt failed!\n");
1946 ret = -ENOMEM;
1947 break;
1948 }
1949 get_status_perdevice_reqcnt(reqcnt);
1950 if (copy_to_user((char __user *) arg, reqcnt,
1951 Z90CRYPT_NUM_APS * sizeof(int)) != 0)
1952 ret = -EFAULT;
1953 kfree(reqcnt);
1954 break;
1955
1956 /* THIS IS DEPRECATED. USE THE NEW STATUS CALLS */
1957 case ICAZ90STATUS:
1958 if (deprecated_msg_count1 < 20) {
1959 PRINTK("deprecated call to ioctl (ICAZ90STATUS)!\n");
1960 deprecated_msg_count1++;
1961 if (deprecated_msg_count1 == 20)
1962 PRINTK("No longer issuing messages related to "
1963 "deprecated call to ICAZ90STATUS.\n");
1964 }
1965
1966 pstat = kmalloc(sizeof(struct ica_z90_status), GFP_KERNEL);
1967 if (!pstat) {
1968 PRINTK("kmalloc for pstat failed!\n");
1969 ret = -ENOMEM;
1970 break;
1971 }
1972
1973 pstat->totalcount = get_status_totalcount();
1974 pstat->leedslitecount = get_status_PCICAcount();
1975 pstat->leeds2count = get_status_PCICCcount();
1976 pstat->requestqWaitCount = get_status_requestq_count();
1977 pstat->pendingqWaitCount = get_status_pendingq_count();
1978 pstat->totalOpenCount = get_status_totalopen_count();
1979 pstat->cryptoDomain = get_status_domain_index();
1980 get_status_status_mask(pstat->status);
1981 get_status_qdepth_mask(pstat->qdepth);
1982
1983 if (copy_to_user((struct ica_z90_status __user *) arg, pstat,
1984 sizeof(struct ica_z90_status)) != 0)
1985 ret = -EFAULT;
1986 kfree(pstat);
1987 break;
1988
1989 /* THIS IS DEPRECATED. USE THE NEW STATUS CALLS */
1990 case Z90STAT_PCIXCCCOUNT:
1991 if (deprecated_msg_count2 < 20) {
1992 PRINTK("deprecated ioctl (Z90STAT_PCIXCCCOUNT)!\n");
1993 deprecated_msg_count2++;
1994 if (deprecated_msg_count2 == 20)
1995 PRINTK("No longer issuing messages about depre"
1996 "cated ioctl Z90STAT_PCIXCCCOUNT.\n");
1997 }
1998
1999 tempstat = get_status_PCIXCCcount();
2000 if (copy_to_user((int *)arg, &tempstat, sizeof(int)) != 0)
2001 ret = -EFAULT;
2002 break;
2003
2004 case Z90QUIESCE:
2005 if (current->euid != 0) {
2006 PRINTK("QUIESCE fails: euid %d\n",
2007 current->euid);
2008 ret = -EACCES;
2009 } else {
2010 PRINTK("QUIESCE device from PID %d\n", PID());
2011 quiesce_z90crypt = 1;
2012 }
2013 break;
2014
2015 default:
2016 /* user passed an invalid IOCTL number */
2017 PDEBUG("cmd 0x%08X contains invalid ioctl code\n", cmd);
2018 ret = -ENOTTY;
2019 break;
2020 }
2021
2022 return ret;
2023}
2024
2025static inline int
2026sprintcl(unsigned char *outaddr, unsigned char *addr, unsigned int len)
2027{
2028 int hl, i;
2029
2030 hl = 0;
2031 for (i = 0; i < len; i++)
2032 hl += sprintf(outaddr+hl, "%01x", (unsigned int) addr[i]);
2033 hl += sprintf(outaddr+hl, " ");
2034
2035 return hl;
2036}
2037
2038static inline int
2039sprintrw(unsigned char *outaddr, unsigned char *addr, unsigned int len)
2040{
2041 int hl, inl, c, cx;
2042
2043 hl = sprintf(outaddr, " ");
2044 inl = 0;
2045 for (c = 0; c < (len / 16); c++) {
2046 hl += sprintcl(outaddr+hl, addr+inl, 16);
2047 inl += 16;
2048 }
2049
2050 cx = len%16;
2051 if (cx) {
2052 hl += sprintcl(outaddr+hl, addr+inl, cx);
2053 inl += cx;
2054 }
2055
2056 hl += sprintf(outaddr+hl, "\n");
2057
2058 return hl;
2059}
2060
2061static inline int
2062sprinthx(unsigned char *title, unsigned char *outaddr,
2063 unsigned char *addr, unsigned int len)
2064{
2065 int hl, inl, r, rx;
2066
2067 hl = sprintf(outaddr, "\n%s\n", title);
2068 inl = 0;
2069 for (r = 0; r < (len / 64); r++) {
2070 hl += sprintrw(outaddr+hl, addr+inl, 64);
2071 inl += 64;
2072 }
2073 rx = len % 64;
2074 if (rx) {
2075 hl += sprintrw(outaddr+hl, addr+inl, rx);
2076 inl += rx;
2077 }
2078
2079 hl += sprintf(outaddr+hl, "\n");
2080
2081 return hl;
2082}
2083
2084static inline int
2085sprinthx4(unsigned char *title, unsigned char *outaddr,
2086 unsigned int *array, unsigned int len)
2087{
2088 int hl, r;
2089
2090 hl = sprintf(outaddr, "\n%s\n", title);
2091
2092 for (r = 0; r < len; r++) {
2093 if ((r % 8) == 0)
2094 hl += sprintf(outaddr+hl, " ");
2095 hl += sprintf(outaddr+hl, "%08X ", array[r]);
2096 if ((r % 8) == 7)
2097 hl += sprintf(outaddr+hl, "\n");
2098 }
2099
2100 hl += sprintf(outaddr+hl, "\n");
2101
2102 return hl;
2103}
2104
2105static int
2106z90crypt_status(char *resp_buff, char **start, off_t offset,
2107 int count, int *eof, void *data)
2108{
2109 unsigned char *workarea;
2110 int len;
2111
2112 /* resp_buff is a page. Use the right half for a work area */
2113 workarea = resp_buff+2000;
2114 len = 0;
2115 len += sprintf(resp_buff+len, "\nz90crypt version: %d.%d.%d\n",
2116 z90crypt_VERSION, z90crypt_RELEASE, z90crypt_VARIANT);
2117 len += sprintf(resp_buff+len, "Cryptographic domain: %d\n",
2118 get_status_domain_index());
2119 len += sprintf(resp_buff+len, "Total device count: %d\n",
2120 get_status_totalcount());
2121 len += sprintf(resp_buff+len, "PCICA count: %d\n",
2122 get_status_PCICAcount());
2123 len += sprintf(resp_buff+len, "PCICC count: %d\n",
2124 get_status_PCICCcount());
2125 len += sprintf(resp_buff+len, "PCIXCC MCL2 count: %d\n",
2126 get_status_PCIXCCMCL2count());
2127 len += sprintf(resp_buff+len, "PCIXCC MCL3 count: %d\n",
2128 get_status_PCIXCCMCL3count());
2129 len += sprintf(resp_buff+len, "CEX2C count: %d\n",
2130 get_status_CEX2Ccount());
2131 len += sprintf(resp_buff+len, "requestq count: %d\n",
2132 get_status_requestq_count());
2133 len += sprintf(resp_buff+len, "pendingq count: %d\n",
2134 get_status_pendingq_count());
2135 len += sprintf(resp_buff+len, "Total open handles: %d\n\n",
2136 get_status_totalopen_count());
2137 len += sprinthx(
2138 "Online devices: 1: PCICA, 2: PCICC, 3: PCIXCC (MCL2), "
2139 "4: PCIXCC (MCL3), 5: CEX2C",
2140 resp_buff+len,
2141 get_status_status_mask(workarea),
2142 Z90CRYPT_NUM_APS);
2143 len += sprinthx("Waiting work element counts",
2144 resp_buff+len,
2145 get_status_qdepth_mask(workarea),
2146 Z90CRYPT_NUM_APS);
2147 len += sprinthx4(
2148 "Per-device successfully completed request counts",
2149 resp_buff+len,
2150 get_status_perdevice_reqcnt((unsigned int *)workarea),
2151 Z90CRYPT_NUM_APS);
2152 *eof = 1;
2153 memset(workarea, 0, Z90CRYPT_NUM_APS * sizeof(unsigned int));
2154 return len;
2155}
2156
2157static inline void
2158disable_card(int card_index)
2159{
2160 struct device *devp;
2161
2162 devp = LONG2DEVPTR(card_index);
2163 if (!devp || devp->user_disabled)
2164 return;
2165 devp->user_disabled = 1;
2166 z90crypt.hdware_info->hdware_mask.user_disabled_count++;
2167 if (devp->dev_type == -1)
2168 return;
2169 z90crypt.hdware_info->type_mask[devp->dev_type].user_disabled_count++;
2170}
2171
2172static inline void
2173enable_card(int card_index)
2174{
2175 struct device *devp;
2176
2177 devp = LONG2DEVPTR(card_index);
2178 if (!devp || !devp->user_disabled)
2179 return;
2180 devp->user_disabled = 0;
2181 z90crypt.hdware_info->hdware_mask.user_disabled_count--;
2182 if (devp->dev_type == -1)
2183 return;
2184 z90crypt.hdware_info->type_mask[devp->dev_type].user_disabled_count--;
2185}
2186
2187static inline int
2188scan_char(unsigned char *bf, unsigned int len,
2189 unsigned int *offs, unsigned int *p_eof, unsigned char c)
2190{
2191 unsigned int i, found;
2192
2193 found = 0;
2194 for (i = 0; i < len; i++) {
2195 if (bf[i] == c) {
2196 found = 1;
2197 break;
2198 }
2199 if (bf[i] == '\0') {
2200 *p_eof = 1;
2201 break;
2202 }
2203 if (bf[i] == '\n') {
2204 break;
2205 }
2206 }
2207 *offs = i+1;
2208 return found;
2209}
2210
2211static inline int
2212scan_string(unsigned char *bf, unsigned int len,
2213 unsigned int *offs, unsigned int *p_eof, unsigned char *s)
2214{
2215 unsigned int temp_len, temp_offs, found, eof;
2216
2217 temp_len = temp_offs = found = eof = 0;
2218 while (!eof && !found) {
2219 found = scan_char(bf+temp_len, len-temp_len,
2220 &temp_offs, &eof, *s);
2221
2222 temp_len += temp_offs;
2223 if (eof) {
2224 found = 0;
2225 break;
2226 }
2227
2228 if (found) {
2229 if (len >= temp_offs+strlen(s)) {
2230 found = !strncmp(bf+temp_len-1, s, strlen(s));
2231 if (found) {
2232 *offs = temp_len+strlen(s)-1;
2233 break;
2234 }
2235 } else {
2236 found = 0;
2237 *p_eof = 1;
2238 break;
2239 }
2240 }
2241 }
2242 return found;
2243}
2244
2245static int
2246z90crypt_status_write(struct file *file, const char __user *buffer,
2247 unsigned long count, void *data)
2248{
2249 int i, j, len, offs, found, eof;
2250 unsigned char *lbuf;
2251 unsigned int local_count;
2252
2253#define LBUFSIZE 600
2254 lbuf = kmalloc(LBUFSIZE, GFP_KERNEL);
2255 if (!lbuf) {
2256 PRINTK("kmalloc failed!\n");
2257 return 0;
2258 }
2259
2260 if (count <= 0)
2261 return 0;
2262
2263 local_count = UMIN((unsigned int)count, LBUFSIZE-1);
2264
2265 if (copy_from_user(lbuf, buffer, local_count) != 0) {
2266 kfree(lbuf);
2267 return -EFAULT;
2268 }
2269
2270 lbuf[local_count-1] = '\0';
2271
2272 len = 0;
2273 eof = 0;
2274 found = 0;
2275 while (!eof) {
2276 found = scan_string(lbuf+len, local_count-len, &offs, &eof,
2277 "Online devices");
2278 len += offs;
2279 if (found == 1)
2280 break;
2281 }
2282
2283 if (eof) {
2284 kfree(lbuf);
2285 return count;
2286 }
2287
2288 if (found)
2289 found = scan_char(lbuf+len, local_count-len, &offs, &eof, '\n');
2290
2291 if (!found || eof) {
2292 kfree(lbuf);
2293 return count;
2294 }
2295
2296 len += offs;
2297 j = 0;
2298 for (i = 0; i < 80; i++) {
2299 switch (*(lbuf+len+i)) {
2300 case '\t':
2301 case ' ':
2302 break;
2303 case '\n':
2304 default:
2305 eof = 1;
2306 break;
2307 case '0':
2308 case '1':
2309 case '2':
2310 case '3':
2311 case '4':
2312 case '5':
2313 j++;
2314 break;
2315 case 'd':
2316 case 'D':
2317 disable_card(j);
2318 j++;
2319 break;
2320 case 'e':
2321 case 'E':
2322 enable_card(j);
2323 j++;
2324 break;
2325 }
2326 if (eof)
2327 break;
2328 }
2329
2330 kfree(lbuf);
2331 return count;
2332}
2333
2334/**
2335 * Functions that run under a timer, with no process id
2336 *
2337 * The task functions:
2338 * z90crypt_reader_task
2339 * helper_send_work
2340 * helper_handle_work_element
2341 * helper_receive_rc
2342 * z90crypt_config_task
2343 * z90crypt_cleanup_task
2344 *
2345 * Helper functions:
2346 * z90crypt_schedule_reader_timer
2347 * z90crypt_schedule_reader_task
2348 * z90crypt_schedule_config_task
2349 * z90crypt_schedule_cleanup_task
2350 */
2351static inline int
2352receive_from_crypto_device(int index, unsigned char *psmid, int *buff_len_p,
2353 unsigned char *buff, unsigned char __user **dest_p_p)
2354{
2355 int dv, rv;
2356 struct device *dev_ptr;
2357 struct caller *caller_p;
2358 struct ica_rsa_modexpo *icaMsg_p;
2359 struct list_head *ptr, *tptr;
2360
2361 memcpy(psmid, NULL_psmid, sizeof(NULL_psmid));
2362
2363 if (z90crypt.terminating)
2364 return REC_FATAL_ERROR;
2365
2366 caller_p = 0;
2367 dev_ptr = z90crypt.device_p[index];
2368 rv = 0;
2369 do {
2370 if (!dev_ptr || dev_ptr->disabled) {
2371 rv = REC_NO_WORK; // a disabled device can't return work
2372 break;
2373 }
2374 if (dev_ptr->dev_self_x != index) {
2375 PRINTKC("Corrupt dev ptr\n");
2376 z90crypt.terminating = 1;
2377 rv = REC_FATAL_ERROR;
2378 break;
2379 }
2380 if (!dev_ptr->dev_resp_l || !dev_ptr->dev_resp_p) {
2381 dv = DEV_REC_EXCEPTION;
2382 PRINTK("dev_resp_l = %d, dev_resp_p = %p\n",
2383 dev_ptr->dev_resp_l, dev_ptr->dev_resp_p);
2384 } else {
2385 PDEBUG("Dequeue called for device %d\n", index);
2386 dv = receive_from_AP(index, z90crypt.cdx,
2387 dev_ptr->dev_resp_l,
2388 dev_ptr->dev_resp_p, psmid);
2389 }
2390 switch (dv) {
2391 case DEV_REC_EXCEPTION:
2392 rv = REC_FATAL_ERROR;
2393 z90crypt.terminating = 1;
2394 PRINTKC("Exception in receive from device %d\n",
2395 index);
2396 break;
2397 case DEV_ONLINE:
2398 rv = 0;
2399 break;
2400 case DEV_EMPTY:
2401 rv = REC_EMPTY;
2402 break;
2403 case DEV_NO_WORK:
2404 rv = REC_NO_WORK;
2405 break;
2406 case DEV_BAD_MESSAGE:
2407 case DEV_GONE:
2408 case REC_HARDWAR_ERR:
2409 default:
2410 rv = REC_NO_RESPONSE;
2411 break;
2412 }
2413 if (rv)
2414 break;
2415 if (dev_ptr->dev_caller_count <= 0) {
2416 rv = REC_USER_GONE;
2417 break;
2418 }
2419
2420 list_for_each_safe(ptr, tptr, &dev_ptr->dev_caller_list) {
2421 caller_p = list_entry(ptr, struct caller, caller_liste);
2422 if (!memcmp(caller_p->caller_id, psmid,
2423 sizeof(caller_p->caller_id))) {
2424 if (!list_empty(&caller_p->caller_liste)) {
2425 list_del_init(ptr);
2426 dev_ptr->dev_caller_count--;
2427 break;
2428 }
2429 }
2430 caller_p = 0;
2431 }
2432 if (!caller_p) {
2433 PRINTKW("Unable to locate PSMID %02X%02X%02X%02X%02X"
2434 "%02X%02X%02X in device list\n",
2435 psmid[0], psmid[1], psmid[2], psmid[3],
2436 psmid[4], psmid[5], psmid[6], psmid[7]);
2437 rv = REC_USER_GONE;
2438 break;
2439 }
2440
2441 PDEBUG("caller_p after successful receive: %p\n", caller_p);
2442 rv = convert_response(dev_ptr->dev_resp_p,
2443 caller_p->caller_buf_p, buff_len_p, buff);
2444 switch (rv) {
2445 case REC_USE_PCICA:
2446 break;
2447 case REC_OPERAND_INV:
2448 case REC_OPERAND_SIZE:
2449 case REC_EVEN_MOD:
2450 case REC_INVALID_PAD:
2451 PDEBUG("device %d: 'user error' %d\n", index, rv);
2452 break;
2453 case WRONG_DEVICE_TYPE:
2454 case REC_HARDWAR_ERR:
2455 case REC_BAD_MESSAGE:
2456 PRINTKW("device %d: hardware error %d\n", index, rv);
2457 rv = REC_NO_RESPONSE;
2458 break;
2459 default:
2460 PDEBUG("device %d: rv = %d\n", index, rv);
2461 break;
2462 }
2463 } while (0);
2464
2465 switch (rv) {
2466 case 0:
2467 PDEBUG("Successful receive from device %d\n", index);
2468 icaMsg_p = (struct ica_rsa_modexpo *)caller_p->caller_buf_p;
2469 *dest_p_p = icaMsg_p->outputdata;
2470 if (*buff_len_p == 0)
2471 PRINTK("Zero *buff_len_p\n");
2472 break;
2473 case REC_NO_RESPONSE:
2474 PRINTKW("Removing device %d from availability\n", index);
2475 remove_device(dev_ptr);
2476 break;
2477 }
2478
2479 if (caller_p)
2480 unbuild_caller(dev_ptr, caller_p);
2481
2482 return rv;
2483}
2484
2485static inline void
2486helper_send_work(int index)
2487{
2488 struct work_element *rq_p;
2489 int rv;
2490
2491 if (list_empty(&request_list))
2492 return;
2493 requestq_count--;
2494 rq_p = list_entry(request_list.next, struct work_element, liste);
2495 list_del_init(&rq_p->liste);
2496 rq_p->audit[1] |= FP_REMREQUEST;
2497 if (rq_p->devtype == SHRT2DEVPTR(index)->dev_type) {
2498 rq_p->devindex = SHRT2LONG(index);
2499 rv = send_to_crypto_device(rq_p);
2500 if (rv == 0) {
2501 rq_p->requestsent = jiffies;
2502 rq_p->audit[0] |= FP_SENT;
2503 list_add_tail(&rq_p->liste, &pending_list);
2504 ++pendingq_count;
2505 rq_p->audit[0] |= FP_PENDING;
2506 } else {
2507 switch (rv) {
2508 case REC_OPERAND_INV:
2509 case REC_OPERAND_SIZE:
2510 case REC_EVEN_MOD:
2511 case REC_INVALID_PAD:
2512 rq_p->retcode = -EINVAL;
2513 break;
2514 case SEN_NOT_AVAIL:
2515 case SEN_RETRY:
2516 case REC_NO_RESPONSE:
2517 default:
2518 if (z90crypt.mask.st_count > 1)
2519 rq_p->retcode =
2520 -ERESTARTSYS;
2521 else
2522 rq_p->retcode = -ENODEV;
2523 break;
2524 }
2525 rq_p->status[0] |= STAT_FAILED;
2526 rq_p->audit[1] |= FP_AWAKENING;
2527 atomic_set(&rq_p->alarmrung, 1);
2528 wake_up(&rq_p->waitq);
2529 }
2530 } else {
2531 if (z90crypt.mask.st_count > 1)
2532 rq_p->retcode = -ERESTARTSYS;
2533 else
2534 rq_p->retcode = -ENODEV;
2535 rq_p->status[0] |= STAT_FAILED;
2536 rq_p->audit[1] |= FP_AWAKENING;
2537 atomic_set(&rq_p->alarmrung, 1);
2538 wake_up(&rq_p->waitq);
2539 }
2540}
2541
2542static inline void
2543helper_handle_work_element(int index, unsigned char psmid[8], int rc,
2544 int buff_len, unsigned char *buff,
2545 unsigned char __user *resp_addr)
2546{
2547 struct work_element *pq_p;
2548 struct list_head *lptr, *tptr;
2549
2550 pq_p = 0;
2551 list_for_each_safe(lptr, tptr, &pending_list) {
2552 pq_p = list_entry(lptr, struct work_element, liste);
2553 if (!memcmp(pq_p->caller_id, psmid, sizeof(pq_p->caller_id))) {
2554 list_del_init(lptr);
2555 pendingq_count--;
2556 pq_p->audit[1] |= FP_NOTPENDING;
2557 break;
2558 }
2559 pq_p = 0;
2560 }
2561
2562 if (!pq_p) {
2563 PRINTK("device %d has work but no caller exists on pending Q\n",
2564 SHRT2LONG(index));
2565 return;
2566 }
2567
2568 switch (rc) {
2569 case 0:
2570 pq_p->resp_buff_size = buff_len;
2571 pq_p->audit[1] |= FP_RESPSIZESET;
2572 if (buff_len) {
2573 pq_p->resp_addr = resp_addr;
2574 pq_p->audit[1] |= FP_RESPADDRCOPIED;
2575 memcpy(pq_p->resp_buff, buff, buff_len);
2576 pq_p->audit[1] |= FP_RESPBUFFCOPIED;
2577 }
2578 break;
2579 case REC_OPERAND_INV:
2580 case REC_OPERAND_SIZE:
2581 case REC_EVEN_MOD:
2582 case REC_INVALID_PAD:
2583 PDEBUG("-EINVAL after application error %d\n", rc);
2584 pq_p->retcode = -EINVAL;
2585 pq_p->status[0] |= STAT_FAILED;
2586 break;
2587 case REC_USE_PCICA:
2588 pq_p->retcode = -ERESTARTSYS;
2589 pq_p->status[0] |= STAT_FAILED;
2590 break;
2591 case REC_NO_RESPONSE:
2592 default:
2593 if (z90crypt.mask.st_count > 1)
2594 pq_p->retcode = -ERESTARTSYS;
2595 else
2596 pq_p->retcode = -ENODEV;
2597 pq_p->status[0] |= STAT_FAILED;
2598 break;
2599 }
2600 if ((pq_p->status[0] != STAT_FAILED) || (pq_p->retcode != -ERELEASED)) {
2601 pq_p->audit[1] |= FP_AWAKENING;
2602 atomic_set(&pq_p->alarmrung, 1);
2603 wake_up(&pq_p->waitq);
2604 }
2605}
2606
2607/**
2608 * return TRUE if the work element should be removed from the queue
2609 */
2610static inline int
2611helper_receive_rc(int index, int *rc_p)
2612{
2613 switch (*rc_p) {
2614 case 0:
2615 case REC_OPERAND_INV:
2616 case REC_OPERAND_SIZE:
2617 case REC_EVEN_MOD:
2618 case REC_INVALID_PAD:
2619 case REC_USE_PCICA:
2620 break;
2621
2622 case REC_BUSY:
2623 case REC_NO_WORK:
2624 case REC_EMPTY:
2625 case REC_RETRY_DEV:
2626 case REC_FATAL_ERROR:
2627 return 0;
2628
2629 case REC_NO_RESPONSE:
2630 break;
2631
2632 default:
2633 PRINTK("rc %d, device %d converted to REC_NO_RESPONSE\n",
2634 *rc_p, SHRT2LONG(index));
2635 *rc_p = REC_NO_RESPONSE;
2636 break;
2637 }
2638 return 1;
2639}
2640
2641static inline void
2642z90crypt_schedule_reader_timer(void)
2643{
2644 if (timer_pending(&reader_timer))
2645 return;
2646 if (mod_timer(&reader_timer, jiffies+(READERTIME*HZ/1000)) != 0)
2647 PRINTK("Timer pending while modifying reader timer\n");
2648}
2649
2650static void
2651z90crypt_reader_task(unsigned long ptr)
2652{
2653 int workavail, index, rc, buff_len;
2654 unsigned char psmid[8];
2655 unsigned char __user *resp_addr;
2656 static unsigned char buff[1024];
2657
2658 /**
2659 * we use workavail = 2 to ensure 2 passes with nothing dequeued before
2660 * exiting the loop. If (pendingq_count+requestq_count) == 0 after the
2661 * loop, there is no work remaining on the queues.
2662 */
2663 resp_addr = 0;
2664 workavail = 2;
2665 buff_len = 0;
2666 while (workavail) {
2667 workavail--;
2668 rc = 0;
2669 spin_lock_irq(&queuespinlock);
2670 memset(buff, 0x00, sizeof(buff));
2671
2672 /* Dequeue once from each device in round robin. */
2673 for (index = 0; index < z90crypt.mask.st_count; index++) {
2674 PDEBUG("About to receive.\n");
2675 rc = receive_from_crypto_device(SHRT2LONG(index),
2676 psmid,
2677 &buff_len,
2678 buff,
2679 &resp_addr);
2680 PDEBUG("Dequeued: rc = %d.\n", rc);
2681
2682 if (helper_receive_rc(index, &rc)) {
2683 if (rc != REC_NO_RESPONSE) {
2684 helper_send_work(index);
2685 workavail = 2;
2686 }
2687
2688 helper_handle_work_element(index, psmid, rc,
2689 buff_len, buff,
2690 resp_addr);
2691 }
2692
2693 if (rc == REC_FATAL_ERROR)
2694 PRINTKW("REC_FATAL_ERROR from device %d!\n",
2695 SHRT2LONG(index));
2696 }
2697 spin_unlock_irq(&queuespinlock);
2698 }
2699
2700 if (pendingq_count + requestq_count)
2701 z90crypt_schedule_reader_timer();
2702}
2703
2704static inline void
2705z90crypt_schedule_config_task(unsigned int expiration)
2706{
2707 if (timer_pending(&config_timer))
2708 return;
2709 if (mod_timer(&config_timer, jiffies+(expiration*HZ)) != 0)
2710 PRINTK("Timer pending while modifying config timer\n");
2711}
2712
2713static void
2714z90crypt_config_task(unsigned long ptr)
2715{
2716 int rc;
2717
2718 PDEBUG("jiffies %ld\n", jiffies);
2719
2720 if ((rc = refresh_z90crypt(&z90crypt.cdx)))
2721 PRINTK("Error %d detected in refresh_z90crypt.\n", rc);
2722 /* If return was fatal, don't bother reconfiguring */
2723 if ((rc != TSQ_FATAL_ERROR) && (rc != RSQ_FATAL_ERROR))
2724 z90crypt_schedule_config_task(CONFIGTIME);
2725}
2726
2727static inline void
2728z90crypt_schedule_cleanup_task(void)
2729{
2730 if (timer_pending(&cleanup_timer))
2731 return;
2732 if (mod_timer(&cleanup_timer, jiffies+(CLEANUPTIME*HZ)) != 0)
2733 PRINTK("Timer pending while modifying cleanup timer\n");
2734}
2735
2736static inline void
2737helper_drain_queues(void)
2738{
2739 struct work_element *pq_p;
2740 struct list_head *lptr, *tptr;
2741
2742 list_for_each_safe(lptr, tptr, &pending_list) {
2743 pq_p = list_entry(lptr, struct work_element, liste);
2744 pq_p->retcode = -ENODEV;
2745 pq_p->status[0] |= STAT_FAILED;
2746 unbuild_caller(LONG2DEVPTR(pq_p->devindex),
2747 (struct caller *)pq_p->requestptr);
2748 list_del_init(lptr);
2749 pendingq_count--;
2750 pq_p->audit[1] |= FP_NOTPENDING;
2751 pq_p->audit[1] |= FP_AWAKENING;
2752 atomic_set(&pq_p->alarmrung, 1);
2753 wake_up(&pq_p->waitq);
2754 }
2755
2756 list_for_each_safe(lptr, tptr, &request_list) {
2757 pq_p = list_entry(lptr, struct work_element, liste);
2758 pq_p->retcode = -ENODEV;
2759 pq_p->status[0] |= STAT_FAILED;
2760 list_del_init(lptr);
2761 requestq_count--;
2762 pq_p->audit[1] |= FP_REMREQUEST;
2763 pq_p->audit[1] |= FP_AWAKENING;
2764 atomic_set(&pq_p->alarmrung, 1);
2765 wake_up(&pq_p->waitq);
2766 }
2767}
2768
2769static inline void
2770helper_timeout_requests(void)
2771{
2772 struct work_element *pq_p;
2773 struct list_head *lptr, *tptr;
2774 long timelimit;
2775
2776 timelimit = jiffies - (CLEANUPTIME * HZ);
2777 /* The list is in strict chronological order */
2778 list_for_each_safe(lptr, tptr, &pending_list) {
2779 pq_p = list_entry(lptr, struct work_element, liste);
2780 if (pq_p->requestsent >= timelimit)
2781 break;
2782 PRINTKW("Purging(PQ) PSMID %02X%02X%02X%02X%02X%02X%02X%02X\n",
2783 ((struct caller *)pq_p->requestptr)->caller_id[0],
2784 ((struct caller *)pq_p->requestptr)->caller_id[1],
2785 ((struct caller *)pq_p->requestptr)->caller_id[2],
2786 ((struct caller *)pq_p->requestptr)->caller_id[3],
2787 ((struct caller *)pq_p->requestptr)->caller_id[4],
2788 ((struct caller *)pq_p->requestptr)->caller_id[5],
2789 ((struct caller *)pq_p->requestptr)->caller_id[6],
2790 ((struct caller *)pq_p->requestptr)->caller_id[7]);
2791 pq_p->retcode = -ETIMEOUT;
2792 pq_p->status[0] |= STAT_FAILED;
2793 /* get this off any caller queue it may be on */
2794 unbuild_caller(LONG2DEVPTR(pq_p->devindex),
2795 (struct caller *) pq_p->requestptr);
2796 list_del_init(lptr);
2797 pendingq_count--;
2798 pq_p->audit[1] |= FP_TIMEDOUT;
2799 pq_p->audit[1] |= FP_NOTPENDING;
2800 pq_p->audit[1] |= FP_AWAKENING;
2801 atomic_set(&pq_p->alarmrung, 1);
2802 wake_up(&pq_p->waitq);
2803 }
2804
2805 /**
2806 * If pending count is zero, items left on the request queue may
2807 * never be processed.
2808 */
2809 if (pendingq_count <= 0) {
2810 list_for_each_safe(lptr, tptr, &request_list) {
2811 pq_p = list_entry(lptr, struct work_element, liste);
2812 if (pq_p->requestsent >= timelimit)
2813 break;
2814 PRINTKW("Purging(RQ) PSMID %02X%02X%02X%02X%02X%02X%02X%02X\n",
2815 ((struct caller *)pq_p->requestptr)->caller_id[0],
2816 ((struct caller *)pq_p->requestptr)->caller_id[1],
2817 ((struct caller *)pq_p->requestptr)->caller_id[2],
2818 ((struct caller *)pq_p->requestptr)->caller_id[3],
2819 ((struct caller *)pq_p->requestptr)->caller_id[4],
2820 ((struct caller *)pq_p->requestptr)->caller_id[5],
2821 ((struct caller *)pq_p->requestptr)->caller_id[6],
2822 ((struct caller *)pq_p->requestptr)->caller_id[7]);
2823 pq_p->retcode = -ETIMEOUT;
2824 pq_p->status[0] |= STAT_FAILED;
2825 list_del_init(lptr);
2826 requestq_count--;
2827 pq_p->audit[1] |= FP_TIMEDOUT;
2828 pq_p->audit[1] |= FP_REMREQUEST;
2829 pq_p->audit[1] |= FP_AWAKENING;
2830 atomic_set(&pq_p->alarmrung, 1);
2831 wake_up(&pq_p->waitq);
2832 }
2833 }
2834}
2835
2836static void
2837z90crypt_cleanup_task(unsigned long ptr)
2838{
2839 PDEBUG("jiffies %ld\n", jiffies);
2840 spin_lock_irq(&queuespinlock);
2841 if (z90crypt.mask.st_count <= 0) // no devices!
2842 helper_drain_queues();
2843 else
2844 helper_timeout_requests();
2845 spin_unlock_irq(&queuespinlock);
2846 z90crypt_schedule_cleanup_task();
2847}
2848
2849static void
2850z90crypt_schedule_reader_task(unsigned long ptr)
2851{
2852 tasklet_schedule(&reader_tasklet);
2853}
2854
2855/**
2856 * Lowlevel Functions:
2857 *
2858 * create_z90crypt: creates and initializes basic data structures
2859 * refresh_z90crypt: re-initializes basic data structures
2860 * find_crypto_devices: returns a count and mask of hardware status
2861 * create_crypto_device: builds the descriptor for a device
2862 * destroy_crypto_device: unallocates the descriptor for a device
2863 * destroy_z90crypt: drains all work, unallocates structs
2864 */
2865
2866/**
2867 * build the z90crypt root structure using the given domain index
2868 */
2869static int
2870create_z90crypt(int *cdx_p)
2871{
2872 struct hdware_block *hdware_blk_p;
2873
2874 memset(&z90crypt, 0x00, sizeof(struct z90crypt));
2875 z90crypt.domain_established = 0;
2876 z90crypt.len = sizeof(struct z90crypt);
2877 z90crypt.max_count = Z90CRYPT_NUM_DEVS;
2878 z90crypt.cdx = *cdx_p;
2879
2880 hdware_blk_p = (struct hdware_block *)
2881 kmalloc(sizeof(struct hdware_block), GFP_ATOMIC);
2882 if (!hdware_blk_p) {
2883 PDEBUG("kmalloc for hardware block failed\n");
2884 return ENOMEM;
2885 }
2886 memset(hdware_blk_p, 0x00, sizeof(struct hdware_block));
2887 z90crypt.hdware_info = hdware_blk_p;
2888
2889 return 0;
2890}
2891
2892static inline int
2893helper_scan_devices(int cdx_array[16], int *cdx_p, int *correct_cdx_found)
2894{
2895 enum hdstat hd_stat;
2896 int q_depth, dev_type;
2897 int indx, chkdom, numdomains;
2898
2899 q_depth = dev_type = numdomains = 0;
2900 for (chkdom = 0; chkdom <= 15; cdx_array[chkdom++] = -1);
2901 for (indx = 0; indx < z90crypt.max_count; indx++) {
2902 hd_stat = HD_NOT_THERE;
2903 numdomains = 0;
2904 for (chkdom = 0; chkdom <= 15; chkdom++) {
2905 hd_stat = query_online(indx, chkdom, MAX_RESET,
2906 &q_depth, &dev_type);
2907 if (hd_stat == HD_TSQ_EXCEPTION) {
2908 z90crypt.terminating = 1;
2909 PRINTKC("exception taken!\n");
2910 break;
2911 }
2912 if (hd_stat == HD_ONLINE) {
2913 cdx_array[numdomains++] = chkdom;
2914 if (*cdx_p == chkdom) {
2915 *correct_cdx_found = 1;
2916 break;
2917 }
2918 }
2919 }
2920 if ((*correct_cdx_found == 1) || (numdomains != 0))
2921 break;
2922 if (z90crypt.terminating)
2923 break;
2924 }
2925 return numdomains;
2926}
2927
2928static inline int
2929probe_crypto_domain(int *cdx_p)
2930{
2931 int cdx_array[16];
2932 char cdx_array_text[53], temp[5];
2933 int correct_cdx_found, numdomains;
2934
2935 correct_cdx_found = 0;
2936 numdomains = helper_scan_devices(cdx_array, cdx_p, &correct_cdx_found);
2937
2938 if (z90crypt.terminating)
2939 return TSQ_FATAL_ERROR;
2940
2941 if (correct_cdx_found)
2942 return 0;
2943
2944 if (numdomains == 0) {
2945 PRINTKW("Unable to find crypto domain: No devices found\n");
2946 return Z90C_NO_DEVICES;
2947 }
2948
2949 if (numdomains == 1) {
2950 if (*cdx_p == -1) {
2951 *cdx_p = cdx_array[0];
2952 return 0;
2953 }
2954 PRINTKW("incorrect domain: specified = %d, found = %d\n",
2955 *cdx_p, cdx_array[0]);
2956 return Z90C_INCORRECT_DOMAIN;
2957 }
2958
2959 numdomains--;
2960 sprintf(cdx_array_text, "%d", cdx_array[numdomains]);
2961 while (numdomains) {
2962 numdomains--;
2963 sprintf(temp, ", %d", cdx_array[numdomains]);
2964 strcat(cdx_array_text, temp);
2965 }
2966
2967 PRINTKW("ambiguous domain detected: specified = %d, found array = %s\n",
2968 *cdx_p, cdx_array_text);
2969 return Z90C_AMBIGUOUS_DOMAIN;
2970}
2971
2972static int
2973refresh_z90crypt(int *cdx_p)
2974{
2975 int i, j, indx, rv;
2976 static struct status local_mask;
2977 struct device *devPtr;
2978 unsigned char oldStat, newStat;
2979 int return_unchanged;
2980
2981 if (z90crypt.len != sizeof(z90crypt))
2982 return ENOTINIT;
2983 if (z90crypt.terminating)
2984 return TSQ_FATAL_ERROR;
2985 rv = 0;
2986 if (!z90crypt.hdware_info->hdware_mask.st_count &&
2987 !z90crypt.domain_established) {
2988 rv = probe_crypto_domain(cdx_p);
2989 if (z90crypt.terminating)
2990 return TSQ_FATAL_ERROR;
2991 if (rv == Z90C_NO_DEVICES)
2992 return 0; // try later
2993 if (rv)
2994 return rv;
2995 z90crypt.cdx = *cdx_p;
2996 z90crypt.domain_established = 1;
2997 }
2998 rv = find_crypto_devices(&local_mask);
2999 if (rv) {
3000 PRINTK("find crypto devices returned %d\n", rv);
3001 return rv;
3002 }
3003 if (!memcmp(&local_mask, &z90crypt.hdware_info->hdware_mask,
3004 sizeof(struct status))) {
3005 return_unchanged = 1;
3006 for (i = 0; i < Z90CRYPT_NUM_TYPES; i++) {
3007 /**
3008 * Check for disabled cards. If any device is marked
3009 * disabled, destroy it.
3010 */
3011 for (j = 0;
3012 j < z90crypt.hdware_info->type_mask[i].st_count;
3013 j++) {
3014 indx = z90crypt.hdware_info->type_x_addr[i].
3015 device_index[j];
3016 devPtr = z90crypt.device_p[indx];
3017 if (devPtr && devPtr->disabled) {
3018 local_mask.st_mask[indx] = HD_NOT_THERE;
3019 return_unchanged = 0;
3020 }
3021 }
3022 }
3023 if (return_unchanged == 1)
3024 return 0;
3025 }
3026
3027 spin_lock_irq(&queuespinlock);
3028 for (i = 0; i < z90crypt.max_count; i++) {
3029 oldStat = z90crypt.hdware_info->hdware_mask.st_mask[i];
3030 newStat = local_mask.st_mask[i];
3031 if ((oldStat == HD_ONLINE) && (newStat != HD_ONLINE))
3032 destroy_crypto_device(i);
3033 else if ((oldStat != HD_ONLINE) && (newStat == HD_ONLINE)) {
3034 rv = create_crypto_device(i);
3035 if (rv >= REC_FATAL_ERROR)
3036 return rv;
3037 if (rv != 0) {
3038 local_mask.st_mask[i] = HD_NOT_THERE;
3039 local_mask.st_count--;
3040 }
3041 }
3042 }
3043 memcpy(z90crypt.hdware_info->hdware_mask.st_mask, local_mask.st_mask,
3044 sizeof(local_mask.st_mask));
3045 z90crypt.hdware_info->hdware_mask.st_count = local_mask.st_count;
3046 z90crypt.hdware_info->hdware_mask.disabled_count =
3047 local_mask.disabled_count;
3048 refresh_index_array(&z90crypt.mask, &z90crypt.overall_device_x);
3049 for (i = 0; i < Z90CRYPT_NUM_TYPES; i++)
3050 refresh_index_array(&(z90crypt.hdware_info->type_mask[i]),
3051 &(z90crypt.hdware_info->type_x_addr[i]));
3052 spin_unlock_irq(&queuespinlock);
3053
3054 return rv;
3055}
3056
3057static int
3058find_crypto_devices(struct status *deviceMask)
3059{
3060 int i, q_depth, dev_type;
3061 enum hdstat hd_stat;
3062
3063 deviceMask->st_count = 0;
3064 deviceMask->disabled_count = 0;
3065 deviceMask->user_disabled_count = 0;
3066
3067 for (i = 0; i < z90crypt.max_count; i++) {
3068 hd_stat = query_online(i, z90crypt.cdx, MAX_RESET, &q_depth,
3069 &dev_type);
3070 if (hd_stat == HD_TSQ_EXCEPTION) {
3071 z90crypt.terminating = 1;
3072 PRINTKC("Exception during probe for crypto devices\n");
3073 return TSQ_FATAL_ERROR;
3074 }
3075 deviceMask->st_mask[i] = hd_stat;
3076 if (hd_stat == HD_ONLINE) {
3077 PDEBUG("Got an online crypto!: %d\n", i);
3078 PDEBUG("Got a queue depth of %d\n", q_depth);
3079 PDEBUG("Got a device type of %d\n", dev_type);
3080 if (q_depth <= 0)
3081 return TSQ_FATAL_ERROR;
3082 deviceMask->st_count++;
3083 z90crypt.q_depth_array[i] = q_depth;
3084 z90crypt.dev_type_array[i] = dev_type;
3085 }
3086 }
3087
3088 return 0;
3089}
3090
3091static int
3092refresh_index_array(struct status *status_str, struct device_x *index_array)
3093{
3094 int i, count;
3095 enum devstat stat;
3096
3097 i = -1;
3098 count = 0;
3099 do {
3100 stat = status_str->st_mask[++i];
3101 if (stat == DEV_ONLINE)
3102 index_array->device_index[count++] = i;
3103 } while ((i < Z90CRYPT_NUM_DEVS) && (count < status_str->st_count));
3104
3105 return count;
3106}
3107
3108static int
3109create_crypto_device(int index)
3110{
3111 int rv, devstat, total_size;
3112 struct device *dev_ptr;
3113 struct status *type_str_p;
3114 int deviceType;
3115
3116 dev_ptr = z90crypt.device_p[index];
3117 if (!dev_ptr) {
3118 total_size = sizeof(struct device) +
3119 z90crypt.q_depth_array[index] * sizeof(int);
3120
3121 dev_ptr = (struct device *) kmalloc(total_size, GFP_ATOMIC);
3122 if (!dev_ptr) {
3123 PRINTK("kmalloc device %d failed\n", index);
3124 return ENOMEM;
3125 }
3126 memset(dev_ptr, 0, total_size);
3127 dev_ptr->dev_resp_p = kmalloc(MAX_RESPONSE_SIZE, GFP_ATOMIC);
3128 if (!dev_ptr->dev_resp_p) {
3129 kfree(dev_ptr);
3130 PRINTK("kmalloc device %d rec buffer failed\n", index);
3131 return ENOMEM;
3132 }
3133 dev_ptr->dev_resp_l = MAX_RESPONSE_SIZE;
3134 INIT_LIST_HEAD(&(dev_ptr->dev_caller_list));
3135 }
3136
3137 devstat = reset_device(index, z90crypt.cdx, MAX_RESET);
3138 if (devstat == DEV_RSQ_EXCEPTION) {
3139 PRINTK("exception during reset device %d\n", index);
3140 kfree(dev_ptr->dev_resp_p);
3141 kfree(dev_ptr);
3142 return RSQ_FATAL_ERROR;
3143 }
3144 if (devstat == DEV_ONLINE) {
3145 dev_ptr->dev_self_x = index;
3146 dev_ptr->dev_type = z90crypt.dev_type_array[index];
3147 if (dev_ptr->dev_type == NILDEV) {
3148 rv = probe_device_type(dev_ptr);
3149 if (rv) {
3150 PRINTK("rv = %d from probe_device_type %d\n",
3151 rv, index);
3152 kfree(dev_ptr->dev_resp_p);
3153 kfree(dev_ptr);
3154 return rv;
3155 }
3156 }
3157 if (dev_ptr->dev_type == PCIXCC_UNK) {
3158 rv = probe_PCIXCC_type(dev_ptr);
3159 if (rv) {
3160 PRINTK("rv = %d from probe_PCIXCC_type %d\n",
3161 rv, index);
3162 kfree(dev_ptr->dev_resp_p);
3163 kfree(dev_ptr);
3164 return rv;
3165 }
3166 }
3167 deviceType = dev_ptr->dev_type;
3168 z90crypt.dev_type_array[index] = deviceType;
3169 if (deviceType == PCICA)
3170 z90crypt.hdware_info->device_type_array[index] = 1;
3171 else if (deviceType == PCICC)
3172 z90crypt.hdware_info->device_type_array[index] = 2;
3173 else if (deviceType == PCIXCC_MCL2)
3174 z90crypt.hdware_info->device_type_array[index] = 3;
3175 else if (deviceType == PCIXCC_MCL3)
3176 z90crypt.hdware_info->device_type_array[index] = 4;
3177 else if (deviceType == CEX2C)
3178 z90crypt.hdware_info->device_type_array[index] = 5;
3179 else
3180 z90crypt.hdware_info->device_type_array[index] = -1;
3181 }
3182
3183 /**
3184 * 'q_depth' returned by the hardware is one less than
3185 * the actual depth
3186 */
3187 dev_ptr->dev_q_depth = z90crypt.q_depth_array[index];
3188 dev_ptr->dev_type = z90crypt.dev_type_array[index];
3189 dev_ptr->dev_stat = devstat;
3190 dev_ptr->disabled = 0;
3191 z90crypt.device_p[index] = dev_ptr;
3192
3193 if (devstat == DEV_ONLINE) {
3194 if (z90crypt.mask.st_mask[index] != DEV_ONLINE) {
3195 z90crypt.mask.st_mask[index] = DEV_ONLINE;
3196 z90crypt.mask.st_count++;
3197 }
3198 deviceType = dev_ptr->dev_type;
3199 type_str_p = &z90crypt.hdware_info->type_mask[deviceType];
3200 if (type_str_p->st_mask[index] != DEV_ONLINE) {
3201 type_str_p->st_mask[index] = DEV_ONLINE;
3202 type_str_p->st_count++;
3203 }
3204 }
3205
3206 return 0;
3207}
3208
3209static int
3210destroy_crypto_device(int index)
3211{
3212 struct device *dev_ptr;
3213 int t, disabledFlag;
3214
3215 dev_ptr = z90crypt.device_p[index];
3216
3217 /* remember device type; get rid of device struct */
3218 if (dev_ptr) {
3219 disabledFlag = dev_ptr->disabled;
3220 t = dev_ptr->dev_type;
3221 if (dev_ptr->dev_resp_p)
3222 kfree(dev_ptr->dev_resp_p);
3223 kfree(dev_ptr);
3224 } else {
3225 disabledFlag = 0;
3226 t = -1;
3227 }
3228 z90crypt.device_p[index] = 0;
3229
3230 /* if the type is valid, remove the device from the type_mask */
3231 if ((t != -1) && z90crypt.hdware_info->type_mask[t].st_mask[index]) {
3232 z90crypt.hdware_info->type_mask[t].st_mask[index] = 0x00;
3233 z90crypt.hdware_info->type_mask[t].st_count--;
3234 if (disabledFlag == 1)
3235 z90crypt.hdware_info->type_mask[t].disabled_count--;
3236 }
3237 if (z90crypt.mask.st_mask[index] != DEV_GONE) {
3238 z90crypt.mask.st_mask[index] = DEV_GONE;
3239 z90crypt.mask.st_count--;
3240 }
3241 z90crypt.hdware_info->device_type_array[index] = 0;
3242
3243 return 0;
3244}
3245
3246static void
3247destroy_z90crypt(void)
3248{
3249 int i;
3250 for (i = 0; i < z90crypt.max_count; i++)
3251 if (z90crypt.device_p[i])
3252 destroy_crypto_device(i);
3253 if (z90crypt.hdware_info)
3254 kfree((void *)z90crypt.hdware_info);
3255 memset((void *)&z90crypt, 0, sizeof(z90crypt));
3256}
3257
3258static unsigned char static_testmsg[384] = {
32590x00,0x00,0x00,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x00,0x06,0x00,0x00,
32600x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x58,
32610x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x43,0x43,
32620x41,0x2d,0x41,0x50,0x50,0x4c,0x20,0x20,0x20,0x01,0x01,0x01,0x00,0x00,0x00,0x00,
32630x50,0x4b,0x00,0x00,0x00,0x00,0x01,0x1c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
32640x00,0x00,0x00,0x00,0x00,0x00,0x05,0xb8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
32650x00,0x00,0x00,0x00,0x70,0x00,0x41,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x54,0x32,
32660x01,0x00,0xa0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
32670xb8,0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
32680x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
32690x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
32700x00,0x00,0x00,0x00,0x00,0x00,0x0a,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
32710x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x49,0x43,0x53,0x46,
32720x20,0x20,0x20,0x20,0x50,0x4b,0x0a,0x00,0x50,0x4b,0x43,0x53,0x2d,0x31,0x2e,0x32,
32730x37,0x00,0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0x00,0x11,0x22,0x33,0x44,
32740x55,0x66,0x77,0x88,0x99,0x00,0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0x00,
32750x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0x00,0x11,0x22,0x33,0x44,0x55,0x66,
32760x77,0x88,0x99,0x00,0x11,0x22,0x33,0x5d,0x00,0x5b,0x00,0x77,0x88,0x1e,0x00,0x00,
32770x57,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x4f,0x00,0x00,0x00,0x03,0x02,0x00,0x00,
32780x40,0x01,0x00,0x01,0xce,0x02,0x68,0x2d,0x5f,0xa9,0xde,0x0c,0xf6,0xd2,0x7b,0x58,
32790x4b,0xf9,0x28,0x68,0x3d,0xb4,0xf4,0xef,0x78,0xd5,0xbe,0x66,0x63,0x42,0xef,0xf8,
32800xfd,0xa4,0xf8,0xb0,0x8e,0x29,0xc2,0xc9,0x2e,0xd8,0x45,0xb8,0x53,0x8c,0x6f,0x4e,
32810x72,0x8f,0x6c,0x04,0x9c,0x88,0xfc,0x1e,0xc5,0x83,0x55,0x57,0xf7,0xdd,0xfd,0x4f,
32820x11,0x36,0x95,0x5d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
3283};
3284
3285static int
3286probe_device_type(struct device *devPtr)
3287{
3288 int rv, dv, i, index, length;
3289 unsigned char psmid[8];
3290 static unsigned char loc_testmsg[sizeof(static_testmsg)];
3291
3292 index = devPtr->dev_self_x;
3293 rv = 0;
3294 do {
3295 memcpy(loc_testmsg, static_testmsg, sizeof(static_testmsg));
3296 length = sizeof(static_testmsg) - 24;
3297 /* the -24 allows for the header */
3298 dv = send_to_AP(index, z90crypt.cdx, length, loc_testmsg);
3299 if (dv) {
3300 PDEBUG("dv returned by send during probe: %d\n", dv);
3301 if (dv == DEV_SEN_EXCEPTION) {
3302 rv = SEN_FATAL_ERROR;
3303 PRINTKC("exception in send to AP %d\n", index);
3304 break;
3305 }
3306 PDEBUG("return value from send_to_AP: %d\n", rv);
3307 switch (dv) {
3308 case DEV_GONE:
3309 PDEBUG("dev %d not available\n", index);
3310 rv = SEN_NOT_AVAIL;
3311 break;
3312 case DEV_ONLINE:
3313 rv = 0;
3314 break;
3315 case DEV_EMPTY:
3316 rv = SEN_NOT_AVAIL;
3317 break;
3318 case DEV_NO_WORK:
3319 rv = SEN_FATAL_ERROR;
3320 break;
3321 case DEV_BAD_MESSAGE:
3322 rv = SEN_USER_ERROR;
3323 break;
3324 case DEV_QUEUE_FULL:
3325 rv = SEN_QUEUE_FULL;
3326 break;
3327 default:
3328 PRINTK("unknown dv=%d for dev %d\n", dv, index);
3329 rv = SEN_NOT_AVAIL;
3330 break;
3331 }
3332 }
3333
3334 if (rv)
3335 break;
3336
3337 for (i = 0; i < 6; i++) {
3338 mdelay(300);
3339 dv = receive_from_AP(index, z90crypt.cdx,
3340 devPtr->dev_resp_l,
3341 devPtr->dev_resp_p, psmid);
3342 PDEBUG("dv returned by DQ = %d\n", dv);
3343 if (dv == DEV_REC_EXCEPTION) {
3344 rv = REC_FATAL_ERROR;
3345 PRINTKC("exception in dequeue %d\n",
3346 index);
3347 break;
3348 }
3349 switch (dv) {
3350 case DEV_ONLINE:
3351 rv = 0;
3352 break;
3353 case DEV_EMPTY:
3354 rv = REC_EMPTY;
3355 break;
3356 case DEV_NO_WORK:
3357 rv = REC_NO_WORK;
3358 break;
3359 case DEV_BAD_MESSAGE:
3360 case DEV_GONE:
3361 default:
3362 rv = REC_NO_RESPONSE;
3363 break;
3364 }
3365 if ((rv != 0) && (rv != REC_NO_WORK))
3366 break;
3367 if (rv == 0)
3368 break;
3369 }
3370 if (rv)
3371 break;
3372 rv = (devPtr->dev_resp_p[0] == 0x00) &&
3373 (devPtr->dev_resp_p[1] == 0x86);
3374 if (rv)
3375 devPtr->dev_type = PCICC;
3376 else
3377 devPtr->dev_type = PCICA;
3378 rv = 0;
3379 } while (0);
3380 /* In a general error case, the card is not marked online */
3381 return rv;
3382}
3383
3384static unsigned char MCL3_testmsg[] = {
33850x00,0x00,0x00,0x00,0xEE,0xEE,0xEE,0xEE,0xEE,0xEE,0xEE,0xEE,
33860x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
33870x00,0x00,0x00,0x58,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
33880x43,0x41,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
33890x00,0x00,0x00,0x00,0x50,0x4B,0x00,0x00,0x00,0x00,0x01,0xC4,0x00,0x00,0x00,0x00,
33900x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x24,0x00,0x00,0x00,0x00,
33910x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xDC,0x02,0x00,0x00,0x00,0x54,0x32,
33920x00,0x00,0x00,0x00,0x00,0x00,0x00,0xE8,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x24,
33930x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
33940x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
33950x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
33960x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
33970x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
33980x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
33990x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
34000x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
34010x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
34020x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
34030x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
34040x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
34050x00,0x00,0x00,0x00,0x50,0x4B,0x00,0x0A,0x4D,0x52,0x50,0x20,0x20,0x20,0x20,0x20,
34060x00,0x42,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,0x0C,0x0D,
34070x0E,0x0F,0x00,0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0xAA,0xBB,0xCC,0xDD,
34080xEE,0xFF,0xFF,0xEE,0xDD,0xCC,0xBB,0xAA,0x99,0x88,0x77,0x66,0x55,0x44,0x33,0x22,
34090x11,0x00,0x01,0x23,0x45,0x67,0x89,0xAB,0xCD,0xEF,0xFE,0xDC,0xBA,0x98,0x76,0x54,
34100x32,0x10,0x00,0x9A,0x00,0x98,0x00,0x00,0x1E,0x00,0x00,0x94,0x00,0x00,0x00,0x00,
34110x04,0x00,0x00,0x8C,0x00,0x00,0x00,0x40,0x02,0x00,0x00,0x40,0xBA,0xE8,0x23,0x3C,
34120x75,0xF3,0x91,0x61,0xD6,0x73,0x39,0xCF,0x7B,0x6D,0x8E,0x61,0x97,0x63,0x9E,0xD9,
34130x60,0x55,0xD6,0xC7,0xEF,0xF8,0x1E,0x63,0x95,0x17,0xCC,0x28,0x45,0x60,0x11,0xC5,
34140xC4,0x4E,0x66,0xC6,0xE6,0xC3,0xDE,0x8A,0x19,0x30,0xCF,0x0E,0xD7,0xAA,0xDB,0x01,
34150xD8,0x00,0xBB,0x8F,0x39,0x9F,0x64,0x28,0xF5,0x7A,0x77,0x49,0xCC,0x6B,0xA3,0x91,
34160x97,0x70,0xE7,0x60,0x1E,0x39,0xE1,0xE5,0x33,0xE1,0x15,0x63,0x69,0x08,0x80,0x4C,
34170x67,0xC4,0x41,0x8F,0x48,0xDF,0x26,0x98,0xF1,0xD5,0x8D,0x88,0xD9,0x6A,0xA4,0x96,
34180xC5,0x84,0xD9,0x30,0x49,0x67,0x7D,0x19,0xB1,0xB3,0x45,0x4D,0xB2,0x53,0x9A,0x47,
34190x3C,0x7C,0x55,0xBF,0xCC,0x85,0x00,0x36,0xF1,0x3D,0x93,0x53
3420};
3421
3422static int
3423probe_PCIXCC_type(struct device *devPtr)
3424{
3425 int rv, dv, i, index, length;
3426 unsigned char psmid[8];
3427 static unsigned char loc_testmsg[548];
3428 struct CPRBX *cprbx_p;
3429
3430 index = devPtr->dev_self_x;
3431 rv = 0;
3432 do {
3433 memcpy(loc_testmsg, MCL3_testmsg, sizeof(MCL3_testmsg));
3434 length = sizeof(MCL3_testmsg) - 0x0C;
3435 dv = send_to_AP(index, z90crypt.cdx, length, loc_testmsg);
3436 if (dv) {
3437 PDEBUG("dv returned = %d\n", dv);
3438 if (dv == DEV_SEN_EXCEPTION) {
3439 rv = SEN_FATAL_ERROR;
3440 PRINTKC("exception in send to AP %d\n", index);
3441 break;
3442 }
3443 PDEBUG("return value from send_to_AP: %d\n", rv);
3444 switch (dv) {
3445 case DEV_GONE:
3446 PDEBUG("dev %d not available\n", index);
3447 rv = SEN_NOT_AVAIL;
3448 break;
3449 case DEV_ONLINE:
3450 rv = 0;
3451 break;
3452 case DEV_EMPTY:
3453 rv = SEN_NOT_AVAIL;
3454 break;
3455 case DEV_NO_WORK:
3456 rv = SEN_FATAL_ERROR;
3457 break;
3458 case DEV_BAD_MESSAGE:
3459 rv = SEN_USER_ERROR;
3460 break;
3461 case DEV_QUEUE_FULL:
3462 rv = SEN_QUEUE_FULL;
3463 break;
3464 default:
3465 PRINTK("unknown dv=%d for dev %d\n", dv, index);
3466 rv = SEN_NOT_AVAIL;
3467 break;
3468 }
3469 }
3470
3471 if (rv)
3472 break;
3473
3474 for (i = 0; i < 6; i++) {
3475 mdelay(300);
3476 dv = receive_from_AP(index, z90crypt.cdx,
3477 devPtr->dev_resp_l,
3478 devPtr->dev_resp_p, psmid);
3479 PDEBUG("dv returned by DQ = %d\n", dv);
3480 if (dv == DEV_REC_EXCEPTION) {
3481 rv = REC_FATAL_ERROR;
3482 PRINTKC("exception in dequeue %d\n",
3483 index);
3484 break;
3485 }
3486 switch (dv) {
3487 case DEV_ONLINE:
3488 rv = 0;
3489 break;
3490 case DEV_EMPTY:
3491 rv = REC_EMPTY;
3492 break;
3493 case DEV_NO_WORK:
3494 rv = REC_NO_WORK;
3495 break;
3496 case DEV_BAD_MESSAGE:
3497 case DEV_GONE:
3498 default:
3499 rv = REC_NO_RESPONSE;
3500 break;
3501 }
3502 if ((rv != 0) && (rv != REC_NO_WORK))
3503 break;
3504 if (rv == 0)
3505 break;
3506 }
3507 if (rv)
3508 break;
3509 cprbx_p = (struct CPRBX *) (devPtr->dev_resp_p + 48);
3510 if ((cprbx_p->ccp_rtcode == 8) && (cprbx_p->ccp_rscode == 33)) {
3511 devPtr->dev_type = PCIXCC_MCL2;
3512 PDEBUG("device %d is MCL2\n", index);
3513 } else {
3514 devPtr->dev_type = PCIXCC_MCL3;
3515 PDEBUG("device %d is MCL3\n", index);
3516 }
3517 } while (0);
3518 /* In a general error case, the card is not marked online */
3519 return rv;
3520}
3521
3522#ifdef Z90CRYPT_USE_HOTPLUG
3523static void
3524z90crypt_hotplug_event(int dev_major, int dev_minor, int action)
3525{
3526#ifdef CONFIG_HOTPLUG
3527 char *argv[3];
3528 char *envp[6];
3529 char major[20];
3530 char minor[20];
3531
3532 sprintf(major, "MAJOR=%d", dev_major);
3533 sprintf(minor, "MINOR=%d", dev_minor);
3534
3535 argv[0] = hotplug_path;
3536 argv[1] = "z90crypt";
3537 argv[2] = 0;
3538
3539 envp[0] = "HOME=/";
3540 envp[1] = "PATH=/sbin:/bin:/usr/sbin:/usr/bin";
3541
3542 switch (action) {
3543 case Z90CRYPT_HOTPLUG_ADD:
3544 envp[2] = "ACTION=add";
3545 break;
3546 case Z90CRYPT_HOTPLUG_REMOVE:
3547 envp[2] = "ACTION=remove";
3548 break;
3549 default:
3550 BUG();
3551 break;
3552 }
3553 envp[3] = major;
3554 envp[4] = minor;
3555 envp[5] = 0;
3556
3557 call_usermodehelper(argv[0], argv, envp, 0);
3558#endif
3559}
3560#endif
3561
3562module_init(z90crypt_init_module);
3563module_exit(z90crypt_cleanup_module);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-07 16:42:14 -0500