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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/s390/cio/qdio.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'drivers/s390/cio/qdio.h')
-rw-r--r--drivers/s390/cio/qdio.h648
1 files changed, 648 insertions, 0 deletions
diff --git a/drivers/s390/cio/qdio.h b/drivers/s390/cio/qdio.h
new file mode 100644
index 000000000000..9ad14db24143
--- /dev/null
+++ b/drivers/s390/cio/qdio.h
@@ -0,0 +1,648 @@
1#ifndef _CIO_QDIO_H
2#define _CIO_QDIO_H
3
4#define VERSION_CIO_QDIO_H "$Revision: 1.26 $"
5
6#ifdef CONFIG_QDIO_DEBUG
7#define QDIO_VERBOSE_LEVEL 9
8#else /* CONFIG_QDIO_DEBUG */
9#define QDIO_VERBOSE_LEVEL 5
10#endif /* CONFIG_QDIO_DEBUG */
11
12#define QDIO_USE_PROCESSING_STATE
13
14#ifdef CONFIG_QDIO_PERF_STATS
15#define QDIO_PERFORMANCE_STATS
16#endif /* CONFIG_QDIO_PERF_STATS */
17
18#define QDIO_MINIMAL_BH_RELIEF_TIME 16
19#define QDIO_TIMER_POLL_VALUE 1
20#define IQDIO_TIMER_POLL_VALUE 1
21
22/*
23 * unfortunately this can't be (QDIO_MAX_BUFFERS_PER_Q*4/3) or so -- as
24 * we never know, whether we'll get initiative again, e.g. to give the
25 * transmit skb's back to the stack, however the stack may be waiting for
26 * them... therefore we define 4 as threshold to start polling (which
27 * will stop as soon as the asynchronous queue catches up)
28 * btw, this only applies to the asynchronous HiperSockets queue
29 */
30#define IQDIO_FILL_LEVEL_TO_POLL 4
31
32#define TIQDIO_THININT_ISC 3
33#define TIQDIO_DELAY_TARGET 0
34#define QDIO_BUSY_BIT_PATIENCE 100 /* in microsecs */
35#define QDIO_BUSY_BIT_GIVE_UP 10000000 /* 10 seconds */
36#define IQDIO_GLOBAL_LAPS 2 /* GLOBAL_LAPS are not used as we */
37#define IQDIO_GLOBAL_LAPS_INT 1 /* don't global summary */
38#define IQDIO_LOCAL_LAPS 4
39#define IQDIO_LOCAL_LAPS_INT 1
40#define IQDIO_GLOBAL_SUMMARY_CC_MASK 2
41/*#define IQDIO_IQDC_INT_PARM 0x1234*/
42
43#define QDIO_Q_LAPS 5
44
45#define QDIO_STORAGE_KEY 0
46
47#define L2_CACHELINE_SIZE 256
48#define INDICATORS_PER_CACHELINE (L2_CACHELINE_SIZE/sizeof(__u32))
49
50#define QDIO_PERF "qdio_perf"
51
52/* must be a power of 2 */
53/*#define QDIO_STATS_NUMBER 4
54
55#define QDIO_STATS_CLASSES 2
56#define QDIO_STATS_COUNT_NEEDED 2*/
57
58#define QDIO_NO_USE_COUNT_TIMEOUT (1*HZ) /* wait for 1 sec on each q before
59 exiting without having use_count
60 of the queue to 0 */
61
62#define QDIO_ESTABLISH_TIMEOUT (1*HZ)
63#define QDIO_ACTIVATE_TIMEOUT ((5*HZ)>>10)
64#define QDIO_CLEANUP_CLEAR_TIMEOUT (20*HZ)
65#define QDIO_CLEANUP_HALT_TIMEOUT (10*HZ)
66
67enum qdio_irq_states {
68 QDIO_IRQ_STATE_INACTIVE,
69 QDIO_IRQ_STATE_ESTABLISHED,
70 QDIO_IRQ_STATE_ACTIVE,
71 QDIO_IRQ_STATE_STOPPED,
72 QDIO_IRQ_STATE_CLEANUP,
73 QDIO_IRQ_STATE_ERR,
74 NR_QDIO_IRQ_STATES,
75};
76
77/* used as intparm in do_IO: */
78#define QDIO_DOING_SENSEID 0
79#define QDIO_DOING_ESTABLISH 1
80#define QDIO_DOING_ACTIVATE 2
81#define QDIO_DOING_CLEANUP 3
82
83/************************* DEBUG FACILITY STUFF *********************/
84
85#define QDIO_DBF_HEX(ex,name,level,addr,len) \
86 do { \
87 if (ex) \
88 debug_exception(qdio_dbf_##name,level,(void*)(addr),len); \
89 else \
90 debug_event(qdio_dbf_##name,level,(void*)(addr),len); \
91 } while (0)
92#define QDIO_DBF_TEXT(ex,name,level,text) \
93 do { \
94 if (ex) \
95 debug_text_exception(qdio_dbf_##name,level,text); \
96 else \
97 debug_text_event(qdio_dbf_##name,level,text); \
98 } while (0)
99
100
101#define QDIO_DBF_HEX0(ex,name,addr,len) QDIO_DBF_HEX(ex,name,0,addr,len)
102#define QDIO_DBF_HEX1(ex,name,addr,len) QDIO_DBF_HEX(ex,name,1,addr,len)
103#define QDIO_DBF_HEX2(ex,name,addr,len) QDIO_DBF_HEX(ex,name,2,addr,len)
104#ifdef CONFIG_QDIO_DEBUG
105#define QDIO_DBF_HEX3(ex,name,addr,len) QDIO_DBF_HEX(ex,name,3,addr,len)
106#define QDIO_DBF_HEX4(ex,name,addr,len) QDIO_DBF_HEX(ex,name,4,addr,len)
107#define QDIO_DBF_HEX5(ex,name,addr,len) QDIO_DBF_HEX(ex,name,5,addr,len)
108#define QDIO_DBF_HEX6(ex,name,addr,len) QDIO_DBF_HEX(ex,name,6,addr,len)
109#else /* CONFIG_QDIO_DEBUG */
110#define QDIO_DBF_HEX3(ex,name,addr,len) do {} while (0)
111#define QDIO_DBF_HEX4(ex,name,addr,len) do {} while (0)
112#define QDIO_DBF_HEX5(ex,name,addr,len) do {} while (0)
113#define QDIO_DBF_HEX6(ex,name,addr,len) do {} while (0)
114#endif /* CONFIG_QDIO_DEBUG */
115
116#define QDIO_DBF_TEXT0(ex,name,text) QDIO_DBF_TEXT(ex,name,0,text)
117#define QDIO_DBF_TEXT1(ex,name,text) QDIO_DBF_TEXT(ex,name,1,text)
118#define QDIO_DBF_TEXT2(ex,name,text) QDIO_DBF_TEXT(ex,name,2,text)
119#ifdef CONFIG_QDIO_DEBUG
120#define QDIO_DBF_TEXT3(ex,name,text) QDIO_DBF_TEXT(ex,name,3,text)
121#define QDIO_DBF_TEXT4(ex,name,text) QDIO_DBF_TEXT(ex,name,4,text)
122#define QDIO_DBF_TEXT5(ex,name,text) QDIO_DBF_TEXT(ex,name,5,text)
123#define QDIO_DBF_TEXT6(ex,name,text) QDIO_DBF_TEXT(ex,name,6,text)
124#else /* CONFIG_QDIO_DEBUG */
125#define QDIO_DBF_TEXT3(ex,name,text) do {} while (0)
126#define QDIO_DBF_TEXT4(ex,name,text) do {} while (0)
127#define QDIO_DBF_TEXT5(ex,name,text) do {} while (0)
128#define QDIO_DBF_TEXT6(ex,name,text) do {} while (0)
129#endif /* CONFIG_QDIO_DEBUG */
130
131#define QDIO_DBF_SETUP_NAME "qdio_setup"
132#define QDIO_DBF_SETUP_LEN 8
133#define QDIO_DBF_SETUP_INDEX 2
134#define QDIO_DBF_SETUP_NR_AREAS 1
135#ifdef CONFIG_QDIO_DEBUG
136#define QDIO_DBF_SETUP_LEVEL 6
137#else /* CONFIG_QDIO_DEBUG */
138#define QDIO_DBF_SETUP_LEVEL 2
139#endif /* CONFIG_QDIO_DEBUG */
140
141#define QDIO_DBF_SBAL_NAME "qdio_labs" /* sbal */
142#define QDIO_DBF_SBAL_LEN 256
143#define QDIO_DBF_SBAL_INDEX 2
144#define QDIO_DBF_SBAL_NR_AREAS 2
145#ifdef CONFIG_QDIO_DEBUG
146#define QDIO_DBF_SBAL_LEVEL 6
147#else /* CONFIG_QDIO_DEBUG */
148#define QDIO_DBF_SBAL_LEVEL 2
149#endif /* CONFIG_QDIO_DEBUG */
150
151#define QDIO_DBF_TRACE_NAME "qdio_trace"
152#define QDIO_DBF_TRACE_LEN 8
153#define QDIO_DBF_TRACE_NR_AREAS 2
154#ifdef CONFIG_QDIO_DEBUG
155#define QDIO_DBF_TRACE_INDEX 4
156#define QDIO_DBF_TRACE_LEVEL 4 /* -------- could be even more verbose here */
157#else /* CONFIG_QDIO_DEBUG */
158#define QDIO_DBF_TRACE_INDEX 2
159#define QDIO_DBF_TRACE_LEVEL 2
160#endif /* CONFIG_QDIO_DEBUG */
161
162#define QDIO_DBF_SENSE_NAME "qdio_sense"
163#define QDIO_DBF_SENSE_LEN 64
164#define QDIO_DBF_SENSE_INDEX 1
165#define QDIO_DBF_SENSE_NR_AREAS 1
166#ifdef CONFIG_QDIO_DEBUG
167#define QDIO_DBF_SENSE_LEVEL 6
168#else /* CONFIG_QDIO_DEBUG */
169#define QDIO_DBF_SENSE_LEVEL 2
170#endif /* CONFIG_QDIO_DEBUG */
171
172#ifdef CONFIG_QDIO_DEBUG
173#define QDIO_TRACE_QTYPE QDIO_ZFCP_QFMT
174
175#define QDIO_DBF_SLSB_OUT_NAME "qdio_slsb_out"
176#define QDIO_DBF_SLSB_OUT_LEN QDIO_MAX_BUFFERS_PER_Q
177#define QDIO_DBF_SLSB_OUT_INDEX 8
178#define QDIO_DBF_SLSB_OUT_NR_AREAS 1
179#define QDIO_DBF_SLSB_OUT_LEVEL 6
180
181#define QDIO_DBF_SLSB_IN_NAME "qdio_slsb_in"
182#define QDIO_DBF_SLSB_IN_LEN QDIO_MAX_BUFFERS_PER_Q
183#define QDIO_DBF_SLSB_IN_INDEX 8
184#define QDIO_DBF_SLSB_IN_NR_AREAS 1
185#define QDIO_DBF_SLSB_IN_LEVEL 6
186#endif /* CONFIG_QDIO_DEBUG */
187
188#define QDIO_PRINTK_HEADER QDIO_NAME ": "
189
190#if QDIO_VERBOSE_LEVEL>8
191#define QDIO_PRINT_STUPID(x...) printk( KERN_DEBUG QDIO_PRINTK_HEADER x)
192#else
193#define QDIO_PRINT_STUPID(x...)
194#endif
195
196#if QDIO_VERBOSE_LEVEL>7
197#define QDIO_PRINT_ALL(x...) printk( QDIO_PRINTK_HEADER x)
198#else
199#define QDIO_PRINT_ALL(x...)
200#endif
201
202#if QDIO_VERBOSE_LEVEL>6
203#define QDIO_PRINT_INFO(x...) printk( QDIO_PRINTK_HEADER x)
204#else
205#define QDIO_PRINT_INFO(x...)
206#endif
207
208#if QDIO_VERBOSE_LEVEL>5
209#define QDIO_PRINT_WARN(x...) printk( QDIO_PRINTK_HEADER x)
210#else
211#define QDIO_PRINT_WARN(x...)
212#endif
213
214#if QDIO_VERBOSE_LEVEL>4
215#define QDIO_PRINT_ERR(x...) printk( QDIO_PRINTK_HEADER x)
216#else
217#define QDIO_PRINT_ERR(x...)
218#endif
219
220#if QDIO_VERBOSE_LEVEL>3
221#define QDIO_PRINT_CRIT(x...) printk( QDIO_PRINTK_HEADER x)
222#else
223#define QDIO_PRINT_CRIT(x...)
224#endif
225
226#if QDIO_VERBOSE_LEVEL>2
227#define QDIO_PRINT_ALERT(x...) printk( QDIO_PRINTK_HEADER x)
228#else
229#define QDIO_PRINT_ALERT(x...)
230#endif
231
232#if QDIO_VERBOSE_LEVEL>1
233#define QDIO_PRINT_EMERG(x...) printk( QDIO_PRINTK_HEADER x)
234#else
235#define QDIO_PRINT_EMERG(x...)
236#endif
237
238#define HEXDUMP16(importance,header,ptr) \
239QDIO_PRINT_##importance(header "%02x %02x %02x %02x " \
240 "%02x %02x %02x %02x %02x %02x %02x %02x " \
241 "%02x %02x %02x %02x\n",*(((char*)ptr)), \
242 *(((char*)ptr)+1),*(((char*)ptr)+2), \
243 *(((char*)ptr)+3),*(((char*)ptr)+4), \
244 *(((char*)ptr)+5),*(((char*)ptr)+6), \
245 *(((char*)ptr)+7),*(((char*)ptr)+8), \
246 *(((char*)ptr)+9),*(((char*)ptr)+10), \
247 *(((char*)ptr)+11),*(((char*)ptr)+12), \
248 *(((char*)ptr)+13),*(((char*)ptr)+14), \
249 *(((char*)ptr)+15)); \
250QDIO_PRINT_##importance(header "%02x %02x %02x %02x %02x %02x %02x %02x " \
251 "%02x %02x %02x %02x %02x %02x %02x %02x\n", \
252 *(((char*)ptr)+16),*(((char*)ptr)+17), \
253 *(((char*)ptr)+18),*(((char*)ptr)+19), \
254 *(((char*)ptr)+20),*(((char*)ptr)+21), \
255 *(((char*)ptr)+22),*(((char*)ptr)+23), \
256 *(((char*)ptr)+24),*(((char*)ptr)+25), \
257 *(((char*)ptr)+26),*(((char*)ptr)+27), \
258 *(((char*)ptr)+28),*(((char*)ptr)+29), \
259 *(((char*)ptr)+30),*(((char*)ptr)+31));
260
261/****************** END OF DEBUG FACILITY STUFF *********************/
262
263/*
264 * Some instructions as assembly
265 */
266extern __inline__ int
267do_siga_sync(unsigned int irq, unsigned int mask1, unsigned int mask2)
268{
269 int cc;
270
271#ifndef CONFIG_ARCH_S390X
272 asm volatile (
273 "lhi 0,2 \n\t"
274 "lr 1,%1 \n\t"
275 "lr 2,%2 \n\t"
276 "lr 3,%3 \n\t"
277 "siga 0 \n\t"
278 "ipm %0 \n\t"
279 "srl %0,28 \n\t"
280 : "=d" (cc)
281 : "d" (0x10000|irq), "d" (mask1), "d" (mask2)
282 : "cc", "0", "1", "2", "3"
283 );
284#else /* CONFIG_ARCH_S390X */
285 asm volatile (
286 "lghi 0,2 \n\t"
287 "llgfr 1,%1 \n\t"
288 "llgfr 2,%2 \n\t"
289 "llgfr 3,%3 \n\t"
290 "siga 0 \n\t"
291 "ipm %0 \n\t"
292 "srl %0,28 \n\t"
293 : "=d" (cc)
294 : "d" (0x10000|irq), "d" (mask1), "d" (mask2)
295 : "cc", "0", "1", "2", "3"
296 );
297#endif /* CONFIG_ARCH_S390X */
298 return cc;
299}
300
301extern __inline__ int
302do_siga_input(unsigned int irq, unsigned int mask)
303{
304 int cc;
305
306#ifndef CONFIG_ARCH_S390X
307 asm volatile (
308 "lhi 0,1 \n\t"
309 "lr 1,%1 \n\t"
310 "lr 2,%2 \n\t"
311 "siga 0 \n\t"
312 "ipm %0 \n\t"
313 "srl %0,28 \n\t"
314 : "=d" (cc)
315 : "d" (0x10000|irq), "d" (mask)
316 : "cc", "0", "1", "2", "memory"
317 );
318#else /* CONFIG_ARCH_S390X */
319 asm volatile (
320 "lghi 0,1 \n\t"
321 "llgfr 1,%1 \n\t"
322 "llgfr 2,%2 \n\t"
323 "siga 0 \n\t"
324 "ipm %0 \n\t"
325 "srl %0,28 \n\t"
326 : "=d" (cc)
327 : "d" (0x10000|irq), "d" (mask)
328 : "cc", "0", "1", "2", "memory"
329 );
330#endif /* CONFIG_ARCH_S390X */
331
332 return cc;
333}
334
335extern __inline__ int
336do_siga_output(unsigned long irq, unsigned long mask, __u32 *bb)
337{
338 int cc;
339 __u32 busy_bit;
340
341#ifndef CONFIG_ARCH_S390X
342 asm volatile (
343 "lhi 0,0 \n\t"
344 "lr 1,%2 \n\t"
345 "lr 2,%3 \n\t"
346 "siga 0 \n\t"
347 "0:"
348 "ipm %0 \n\t"
349 "srl %0,28 \n\t"
350 "srl 0,31 \n\t"
351 "lr %1,0 \n\t"
352 "1: \n\t"
353 ".section .fixup,\"ax\"\n\t"
354 "2: \n\t"
355 "lhi %0,%4 \n\t"
356 "bras 1,3f \n\t"
357 ".long 1b \n\t"
358 "3: \n\t"
359 "l 1,0(1) \n\t"
360 "br 1 \n\t"
361 ".previous \n\t"
362 ".section __ex_table,\"a\"\n\t"
363 ".align 4 \n\t"
364 ".long 0b,2b \n\t"
365 ".previous \n\t"
366 : "=d" (cc), "=d" (busy_bit)
367 : "d" (0x10000|irq), "d" (mask),
368 "i" (QDIO_SIGA_ERROR_ACCESS_EXCEPTION)
369 : "cc", "0", "1", "2", "memory"
370 );
371#else /* CONFIG_ARCH_S390X */
372 asm volatile (
373 "lghi 0,0 \n\t"
374 "llgfr 1,%2 \n\t"
375 "llgfr 2,%3 \n\t"
376 "siga 0 \n\t"
377 "0:"
378 "ipm %0 \n\t"
379 "srl %0,28 \n\t"
380 "srl 0,31 \n\t"
381 "llgfr %1,0 \n\t"
382 "1: \n\t"
383 ".section .fixup,\"ax\"\n\t"
384 "lghi %0,%4 \n\t"
385 "jg 1b \n\t"
386 ".previous\n\t"
387 ".section __ex_table,\"a\"\n\t"
388 ".align 8 \n\t"
389 ".quad 0b,1b \n\t"
390 ".previous \n\t"
391 : "=d" (cc), "=d" (busy_bit)
392 : "d" (0x10000|irq), "d" (mask),
393 "i" (QDIO_SIGA_ERROR_ACCESS_EXCEPTION)
394 : "cc", "0", "1", "2", "memory"
395 );
396#endif /* CONFIG_ARCH_S390X */
397
398 (*bb) = busy_bit;
399 return cc;
400}
401
402extern __inline__ unsigned long
403do_clear_global_summary(void)
404{
405
406 unsigned long time;
407
408#ifndef CONFIG_ARCH_S390X
409 asm volatile (
410 "lhi 1,3 \n\t"
411 ".insn rre,0xb2650000,2,0 \n\t"
412 "lr %0,3 \n\t"
413 : "=d" (time) : : "cc", "1", "2", "3"
414 );
415#else /* CONFIG_ARCH_S390X */
416 asm volatile (
417 "lghi 1,3 \n\t"
418 ".insn rre,0xb2650000,2,0 \n\t"
419 "lgr %0,3 \n\t"
420 : "=d" (time) : : "cc", "1", "2", "3"
421 );
422#endif /* CONFIG_ARCH_S390X */
423
424 return time;
425}
426
427/*
428 * QDIO device commands returned by extended Sense-ID
429 */
430#define DEFAULT_ESTABLISH_QS_CMD 0x1b
431#define DEFAULT_ESTABLISH_QS_COUNT 0x1000
432#define DEFAULT_ACTIVATE_QS_CMD 0x1f
433#define DEFAULT_ACTIVATE_QS_COUNT 0
434
435/*
436 * additional CIWs returned by extended Sense-ID
437 */
438#define CIW_TYPE_EQUEUE 0x3 /* establish QDIO queues */
439#define CIW_TYPE_AQUEUE 0x4 /* activate QDIO queues */
440
441#define QDIO_CHSC_RESPONSE_CODE_OK 1
442/* flags for st qdio sch data */
443#define CHSC_FLAG_QDIO_CAPABILITY 0x80
444#define CHSC_FLAG_VALIDITY 0x40
445
446#define CHSC_FLAG_SIGA_INPUT_NECESSARY 0x40
447#define CHSC_FLAG_SIGA_OUTPUT_NECESSARY 0x20
448#define CHSC_FLAG_SIGA_SYNC_NECESSARY 0x10
449#define CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS 0x08
450#define CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS 0x04
451
452#ifdef QDIO_PERFORMANCE_STATS
453struct qdio_perf_stats {
454 unsigned int tl_runs;
455
456 unsigned int siga_outs;
457 unsigned int siga_ins;
458 unsigned int siga_syncs;
459 unsigned int pcis;
460 unsigned int thinints;
461 unsigned int fast_reqs;
462
463 __u64 start_time_outbound;
464 unsigned int outbound_cnt;
465 unsigned int outbound_time;
466 __u64 start_time_inbound;
467 unsigned int inbound_cnt;
468 unsigned int inbound_time;
469};
470#endif /* QDIO_PERFORMANCE_STATS */
471
472#define atomic_swap(a,b) xchg((int*)a.counter,b)
473
474/* unlikely as the later the better */
475#define SYNC_MEMORY if (unlikely(q->siga_sync)) qdio_siga_sync_q(q)
476#define SYNC_MEMORY_ALL if (unlikely(q->siga_sync)) \
477 qdio_siga_sync(q,~0U,~0U)
478#define SYNC_MEMORY_ALL_OUTB if (unlikely(q->siga_sync)) \
479 qdio_siga_sync(q,~0U,0)
480
481#define NOW qdio_get_micros()
482#define SAVE_TIMESTAMP(q) q->timing.last_transfer_time=NOW
483#define GET_SAVED_TIMESTAMP(q) (q->timing.last_transfer_time)
484#define SAVE_FRONTIER(q,val) q->last_move_ftc=val
485#define GET_SAVED_FRONTIER(q) (q->last_move_ftc)
486
487#define MY_MODULE_STRING(x) #x
488
489#ifdef CONFIG_ARCH_S390X
490#define QDIO_GET_ADDR(x) ((__u32)(unsigned long)x)
491#else /* CONFIG_ARCH_S390X */
492#define QDIO_GET_ADDR(x) ((__u32)(long)x)
493#endif /* CONFIG_ARCH_S390X */
494
495#ifdef CONFIG_QDIO_DEBUG
496#define set_slsb(x,y) \
497 if(q->queue_type==QDIO_TRACE_QTYPE) { \
498 if(q->is_input_q) { \
499 QDIO_DBF_HEX2(0,slsb_in,&q->slsb,QDIO_MAX_BUFFERS_PER_Q); \
500 } else { \
501 QDIO_DBF_HEX2(0,slsb_out,&q->slsb,QDIO_MAX_BUFFERS_PER_Q); \
502 } \
503 } \
504 qdio_set_slsb(x,y); \
505 if(q->queue_type==QDIO_TRACE_QTYPE) { \
506 if(q->is_input_q) { \
507 QDIO_DBF_HEX2(0,slsb_in,&q->slsb,QDIO_MAX_BUFFERS_PER_Q); \
508 } else { \
509 QDIO_DBF_HEX2(0,slsb_out,&q->slsb,QDIO_MAX_BUFFERS_PER_Q); \
510 } \
511 }
512#else /* CONFIG_QDIO_DEBUG */
513#define set_slsb(x,y) qdio_set_slsb(x,y)
514#endif /* CONFIG_QDIO_DEBUG */
515
516struct qdio_q {
517 volatile struct slsb slsb;
518
519 char unused[QDIO_MAX_BUFFERS_PER_Q];
520
521 __u32 * volatile dev_st_chg_ind;
522
523 int is_input_q;
524 int irq;
525 struct ccw_device *cdev;
526
527 unsigned int is_iqdio_q;
528 unsigned int is_thinint_q;
529
530 /* bit 0 means queue 0, bit 1 means queue 1, ... */
531 unsigned int mask;
532 unsigned int q_no;
533
534 qdio_handler_t (*handler);
535
536 /* points to the next buffer to be checked for having
537 * been processed by the card (outbound)
538 * or to the next buffer the program should check for (inbound) */
539 volatile int first_to_check;
540 /* and the last time it was: */
541 volatile int last_move_ftc;
542
543 atomic_t number_of_buffers_used;
544 atomic_t polling;
545
546 unsigned int siga_in;
547 unsigned int siga_out;
548 unsigned int siga_sync;
549 unsigned int siga_sync_done_on_thinints;
550 unsigned int siga_sync_done_on_outb_tis;
551 unsigned int hydra_gives_outbound_pcis;
552
553 /* used to save beginning position when calling dd_handlers */
554 int first_element_to_kick;
555
556 atomic_t use_count;
557 atomic_t is_in_shutdown;
558
559 void *irq_ptr;
560
561#ifdef QDIO_USE_TIMERS_FOR_POLLING
562 struct timer_list timer;
563 atomic_t timer_already_set;
564 spinlock_t timer_lock;
565#else /* QDIO_USE_TIMERS_FOR_POLLING */
566 struct tasklet_struct tasklet;
567#endif /* QDIO_USE_TIMERS_FOR_POLLING */
568
569 enum qdio_irq_states state;
570
571 /* used to store the error condition during a data transfer */
572 unsigned int qdio_error;
573 unsigned int siga_error;
574 unsigned int error_status_flags;
575
576 /* list of interesting queues */
577 volatile struct qdio_q *list_next;
578 volatile struct qdio_q *list_prev;
579
580 struct sl *sl;
581 volatile struct sbal *sbal[QDIO_MAX_BUFFERS_PER_Q];
582
583 struct qdio_buffer *qdio_buffers[QDIO_MAX_BUFFERS_PER_Q];
584
585 unsigned long int_parm;
586
587 /*struct {
588 int in_bh_check_limit;
589 int threshold;
590 } threshold_classes[QDIO_STATS_CLASSES];*/
591
592 struct {
593 /* inbound: the time to stop polling
594 outbound: the time to kick peer */
595 int threshold; /* the real value */
596
597 /* outbound: last time of do_QDIO
598 inbound: last time of noticing incoming data */
599 /*__u64 last_transfer_times[QDIO_STATS_NUMBER];
600 int last_transfer_index; */
601
602 __u64 last_transfer_time;
603 __u64 busy_start;
604 } timing;
605 atomic_t busy_siga_counter;
606 unsigned int queue_type;
607
608 /* leave this member at the end. won't be cleared in qdio_fill_qs */
609 struct slib *slib; /* a page is allocated under this pointer,
610 sl points into this page, offset PAGE_SIZE/2
611 (after slib) */
612} __attribute__ ((aligned(256)));
613
614struct qdio_irq {
615 __u32 * volatile dev_st_chg_ind;
616
617 unsigned long int_parm;
618 int irq;
619
620 unsigned int is_iqdio_irq;
621 unsigned int is_thinint_irq;
622 unsigned int hydra_gives_outbound_pcis;
623 unsigned int sync_done_on_outb_pcis;
624
625 enum qdio_irq_states state;
626
627 unsigned int no_input_qs;
628 unsigned int no_output_qs;
629
630 unsigned char qdioac;
631
632 struct ccw1 ccw;
633
634 struct ciw equeue;
635 struct ciw aqueue;
636
637 struct qib qib;
638
639 void (*original_int_handler) (struct ccw_device *,
640 unsigned long, struct irb *);
641
642 /* leave these four members together at the end. won't be cleared in qdio_fill_irq */
643 struct qdr *qdr;
644 struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ];
645 struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ];
646 struct semaphore setting_up_sema;
647};
648#endif