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authorPeter Oberparleiter <peter.oberparleiter@de.ibm.com>2008-10-10 15:33:15 -0400
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2008-10-10 15:33:53 -0400
commitf9c9fe3ecfc0c5ff17728d0c5ee95a4e269ec190 (patch)
tree470a7db33fa868234f4f01d4fa768c95fdc6c5cc /drivers/s390/cio/ioasm.h
parent1f4e7edabc4071cdff0133e7e04db2d7287d0e36 (diff)
[S390] cio: inline assembly cleanup
Fix incorrect in- and output constraints, remove volatile declaration of inline assembly parameters and reformat constraint declarations to be more consistent. Signed-off-by: Peter Oberparleiter <peter.oberparleiter@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'drivers/s390/cio/ioasm.h')
-rw-r--r--drivers/s390/cio/ioasm.h49
1 files changed, 28 insertions, 21 deletions
diff --git a/drivers/s390/cio/ioasm.h b/drivers/s390/cio/ioasm.h
index 9fa2ac13ac85..759262792633 100644
--- a/drivers/s390/cio/ioasm.h
+++ b/drivers/s390/cio/ioasm.h
@@ -23,38 +23,39 @@ struct tpi_info {
23 * Some S390 specific IO instructions as inline 23 * Some S390 specific IO instructions as inline
24 */ 24 */
25 25
26static inline int stsch(struct subchannel_id schid, 26static inline int stsch(struct subchannel_id schid, struct schib *addr)
27 volatile struct schib *addr)
28{ 27{
29 register struct subchannel_id reg1 asm ("1") = schid; 28 register struct subchannel_id reg1 asm ("1") = schid;
30 int ccode; 29 int ccode;
31 30
32 asm volatile( 31 asm volatile(
33 " stsch 0(%2)\n" 32 " stsch 0(%3)\n"
34 " ipm %0\n" 33 " ipm %0\n"
35 " srl %0,28" 34 " srl %0,28"
36 : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); 35 : "=d" (ccode), "=m" (*addr)
36 : "d" (reg1), "a" (addr)
37 : "cc");
37 return ccode; 38 return ccode;
38} 39}
39 40
40static inline int stsch_err(struct subchannel_id schid, 41static inline int stsch_err(struct subchannel_id schid, struct schib *addr)
41 volatile struct schib *addr)
42{ 42{
43 register struct subchannel_id reg1 asm ("1") = schid; 43 register struct subchannel_id reg1 asm ("1") = schid;
44 int ccode = -EIO; 44 int ccode = -EIO;
45 45
46 asm volatile( 46 asm volatile(
47 " stsch 0(%2)\n" 47 " stsch 0(%3)\n"
48 "0: ipm %0\n" 48 "0: ipm %0\n"
49 " srl %0,28\n" 49 " srl %0,28\n"
50 "1:\n" 50 "1:\n"
51 EX_TABLE(0b,1b) 51 EX_TABLE(0b,1b)
52 : "+d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); 52 : "+d" (ccode), "=m" (*addr)
53 : "d" (reg1), "a" (addr)
54 : "cc");
53 return ccode; 55 return ccode;
54} 56}
55 57
56static inline int msch(struct subchannel_id schid, 58static inline int msch(struct subchannel_id schid, struct schib *addr)
57 volatile struct schib *addr)
58{ 59{
59 register struct subchannel_id reg1 asm ("1") = schid; 60 register struct subchannel_id reg1 asm ("1") = schid;
60 int ccode; 61 int ccode;
@@ -63,12 +64,13 @@ static inline int msch(struct subchannel_id schid,
63 " msch 0(%2)\n" 64 " msch 0(%2)\n"
64 " ipm %0\n" 65 " ipm %0\n"
65 " srl %0,28" 66 " srl %0,28"
66 : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); 67 : "=d" (ccode)
68 : "d" (reg1), "a" (addr), "m" (*addr)
69 : "cc");
67 return ccode; 70 return ccode;
68} 71}
69 72
70static inline int msch_err(struct subchannel_id schid, 73static inline int msch_err(struct subchannel_id schid, struct schib *addr)
71 volatile struct schib *addr)
72{ 74{
73 register struct subchannel_id reg1 asm ("1") = schid; 75 register struct subchannel_id reg1 asm ("1") = schid;
74 int ccode = -EIO; 76 int ccode = -EIO;
@@ -79,33 +81,38 @@ static inline int msch_err(struct subchannel_id schid,
79 " srl %0,28\n" 81 " srl %0,28\n"
80 "1:\n" 82 "1:\n"
81 EX_TABLE(0b,1b) 83 EX_TABLE(0b,1b)
82 : "+d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); 84 : "+d" (ccode)
85 : "d" (reg1), "a" (addr), "m" (*addr)
86 : "cc");
83 return ccode; 87 return ccode;
84} 88}
85 89
86static inline int tsch(struct subchannel_id schid, 90static inline int tsch(struct subchannel_id schid, struct irb *addr)
87 volatile struct irb *addr)
88{ 91{
89 register struct subchannel_id reg1 asm ("1") = schid; 92 register struct subchannel_id reg1 asm ("1") = schid;
90 int ccode; 93 int ccode;
91 94
92 asm volatile( 95 asm volatile(
93 " tsch 0(%2)\n" 96 " tsch 0(%3)\n"
94 " ipm %0\n" 97 " ipm %0\n"
95 " srl %0,28" 98 " srl %0,28"
96 : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); 99 : "=d" (ccode), "=m" (*addr)
100 : "d" (reg1), "a" (addr)
101 : "cc");
97 return ccode; 102 return ccode;
98} 103}
99 104
100static inline int tpi( volatile struct tpi_info *addr) 105static inline int tpi(struct tpi_info *addr)
101{ 106{
102 int ccode; 107 int ccode;
103 108
104 asm volatile( 109 asm volatile(
105 " tpi 0(%1)\n" 110 " tpi 0(%2)\n"
106 " ipm %0\n" 111 " ipm %0\n"
107 " srl %0,28" 112 " srl %0,28"
108 : "=d" (ccode) : "a" (addr), "m" (*addr) : "cc"); 113 : "=d" (ccode), "=m" (*addr)
114 : "a" (addr)
115 : "cc");
109 return ccode; 116 return ccode;
110} 117}
111 118