diff options
author | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2006-09-28 10:56:43 -0400 |
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committer | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2006-09-28 10:56:43 -0400 |
commit | 94c12cc7d196bab34aaa98d38521549fa1e5ef76 (patch) | |
tree | 8e0cec0ed44445d74a2cb5160303d6b4dfb1bc31 /drivers/s390/block/xpram.c | |
parent | 25d83cbfaa44e1b9170c0941c3ef52ca39f54ccc (diff) |
[S390] Inline assembly cleanup.
Major cleanup of all s390 inline assemblies. They now have a common
coding style. Quite a few have been shortened, mainly by using register
asm variables. Use of the EX_TABLE macro helps as well. The atomic ops,
bit ops and locking inlines new use the Q-constraint if a newer gcc
is used. That results in slightly better code.
Thanks to Christian Borntraeger for proof reading the changes.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'drivers/s390/block/xpram.c')
-rw-r--r-- | drivers/s390/block/xpram.c | 54 |
1 files changed, 14 insertions, 40 deletions
diff --git a/drivers/s390/block/xpram.c b/drivers/s390/block/xpram.c index cab2c736683a..a04d9120cef0 100644 --- a/drivers/s390/block/xpram.c +++ b/drivers/s390/block/xpram.c | |||
@@ -89,28 +89,15 @@ MODULE_LICENSE("GPL"); | |||
89 | */ | 89 | */ |
90 | static int xpram_page_in (unsigned long page_addr, unsigned int xpage_index) | 90 | static int xpram_page_in (unsigned long page_addr, unsigned int xpage_index) |
91 | { | 91 | { |
92 | int cc; | 92 | int cc = 2; /* return unused cc 2 if pgin traps */ |
93 | 93 | ||
94 | __asm__ __volatile__ ( | 94 | asm volatile( |
95 | " lhi %0,2\n" /* return unused cc 2 if pgin traps */ | 95 | " .insn rre,0xb22e0000,%1,%2\n" /* pgin %1,%2 */ |
96 | " .insn rre,0xb22e0000,%1,%2\n" /* pgin %1,%2 */ | 96 | "0: ipm %0\n" |
97 | "0: ipm %0\n" | 97 | " srl %0,28\n" |
98 | " srl %0,28\n" | ||
99 | "1:\n" | 98 | "1:\n" |
100 | #ifndef CONFIG_64BIT | 99 | EX_TABLE(0b,1b) |
101 | ".section __ex_table,\"a\"\n" | 100 | : "+d" (cc) : "a" (__pa(page_addr)), "d" (xpage_index) : "cc"); |
102 | " .align 4\n" | ||
103 | " .long 0b,1b\n" | ||
104 | ".previous" | ||
105 | #else | ||
106 | ".section __ex_table,\"a\"\n" | ||
107 | " .align 8\n" | ||
108 | " .quad 0b,1b\n" | ||
109 | ".previous" | ||
110 | #endif | ||
111 | : "=&d" (cc) | ||
112 | : "a" (__pa(page_addr)), "a" (xpage_index) | ||
113 | : "cc" ); | ||
114 | if (cc == 3) | 101 | if (cc == 3) |
115 | return -ENXIO; | 102 | return -ENXIO; |
116 | if (cc == 2) { | 103 | if (cc == 2) { |
@@ -137,28 +124,15 @@ static int xpram_page_in (unsigned long page_addr, unsigned int xpage_index) | |||
137 | */ | 124 | */ |
138 | static long xpram_page_out (unsigned long page_addr, unsigned int xpage_index) | 125 | static long xpram_page_out (unsigned long page_addr, unsigned int xpage_index) |
139 | { | 126 | { |
140 | int cc; | 127 | int cc = 2; /* return unused cc 2 if pgin traps */ |
141 | 128 | ||
142 | __asm__ __volatile__ ( | 129 | asm volatile( |
143 | " lhi %0,2\n" /* return unused cc 2 if pgout traps */ | 130 | " .insn rre,0xb22f0000,%1,%2\n" /* pgout %1,%2 */ |
144 | " .insn rre,0xb22f0000,%1,%2\n" /* pgout %1,%2 */ | 131 | "0: ipm %0\n" |
145 | "0: ipm %0\n" | 132 | " srl %0,28\n" |
146 | " srl %0,28\n" | ||
147 | "1:\n" | 133 | "1:\n" |
148 | #ifndef CONFIG_64BIT | 134 | EX_TABLE(0b,1b) |
149 | ".section __ex_table,\"a\"\n" | 135 | : "+d" (cc) : "a" (__pa(page_addr)), "d" (xpage_index) : "cc"); |
150 | " .align 4\n" | ||
151 | " .long 0b,1b\n" | ||
152 | ".previous" | ||
153 | #else | ||
154 | ".section __ex_table,\"a\"\n" | ||
155 | " .align 8\n" | ||
156 | " .quad 0b,1b\n" | ||
157 | ".previous" | ||
158 | #endif | ||
159 | : "=&d" (cc) | ||
160 | : "a" (__pa(page_addr)), "a" (xpage_index) | ||
161 | : "cc" ); | ||
162 | if (cc == 3) | 136 | if (cc == 3) |
163 | return -ENXIO; | 137 | return -ENXIO; |
164 | if (cc == 2) { | 138 | if (cc == 2) { |