aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/rtc
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2010-03-01 12:15:15 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2010-03-01 12:15:15 -0500
commitac0f6f927db539e03e1f3f61bcd4ed57d5cde7a9 (patch)
tree816e5ac643b15c2050c64a7075f0f7e13d86ea09 /drivers/rtc
parentb1bf9368407ae7e89d8a005bb40beb70a41df539 (diff)
parent9f33be2c3a80bdc2cc08342dd77fac87652e0548 (diff)
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (100 commits) ARM: Eliminate decompressor -Dstatic= PIC hack ARM: 5958/1: ARM: U300: fix inverted clk round rate ARM: 5956/1: misplaced parentheses ARM: 5955/1: ep93xx: move timer defines into core.c and document ARM: 5954/1: ep93xx: move gpio interrupt support to gpio.c ARM: 5953/1: ep93xx: fix broken build of clock.c ARM: 5952/1: ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig ARM: 5949/1: NUC900 add gpio virtual memory map ARM: 5948/1: Enable timer0 to time4 clock support for nuc910 ARM: 5940/2: ARM: MMCI: remove custom DBG macro and printk ARM: make_coherent(): fix problems with highpte, part 2 MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself ARM: 5945/1: ep93xx: include correct irq.h in core.c ARM: 5933/1: amba-pl011: support hardware flow control ARM: 5930/1: Add PKMAP area description to memory.txt. ARM: 5929/1: Add checks to detect overlap of memory regions. ARM: 5928/1: Change type of VMALLOC_END to unsigned long. ARM: 5927/1: Make delimiters of DMA area globally visibly. ARM: 5926/1: Add "Virtual kernel memory..." printout. ARM: 5920/1: OMAP4: Enable L2 Cache ... Fix up trivial conflict in arch/arm/mach-mx25/clock.c
Diffstat (limited to 'drivers/rtc')
-rw-r--r--drivers/rtc/rtc-pl031.c365
1 files changed, 327 insertions, 38 deletions
diff --git a/drivers/rtc/rtc-pl031.c b/drivers/rtc/rtc-pl031.c
index 0264b117893b..c256aacfa954 100644
--- a/drivers/rtc/rtc-pl031.c
+++ b/drivers/rtc/rtc-pl031.c
@@ -7,6 +7,9 @@
7 * 7 *
8 * Copyright 2006 (c) MontaVista Software, Inc. 8 * Copyright 2006 (c) MontaVista Software, Inc.
9 * 9 *
10 * Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
11 * Copyright 2010 (c) ST-Ericsson AB
12 *
10 * This program is free software; you can redistribute it and/or 13 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License 14 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 15 * as published by the Free Software Foundation; either version
@@ -18,6 +21,9 @@
18#include <linux/interrupt.h> 21#include <linux/interrupt.h>
19#include <linux/amba/bus.h> 22#include <linux/amba/bus.h>
20#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/bcd.h>
25#include <linux/delay.h>
26#include <linux/version.h>
21 27
22/* 28/*
23 * Register definitions 29 * Register definitions
@@ -30,35 +36,207 @@
30#define RTC_RIS 0x14 /* Raw interrupt status register */ 36#define RTC_RIS 0x14 /* Raw interrupt status register */
31#define RTC_MIS 0x18 /* Masked interrupt status register */ 37#define RTC_MIS 0x18 /* Masked interrupt status register */
32#define RTC_ICR 0x1c /* Interrupt clear register */ 38#define RTC_ICR 0x1c /* Interrupt clear register */
39/* ST variants have additional timer functionality */
40#define RTC_TDR 0x20 /* Timer data read register */
41#define RTC_TLR 0x24 /* Timer data load register */
42#define RTC_TCR 0x28 /* Timer control register */
43#define RTC_YDR 0x30 /* Year data read register */
44#define RTC_YMR 0x34 /* Year match register */
45#define RTC_YLR 0x38 /* Year data load register */
46
47#define RTC_CR_CWEN (1 << 26) /* Clockwatch enable bit */
48
49#define RTC_TCR_EN (1 << 1) /* Periodic timer enable bit */
50
51/* Common bit definitions for Interrupt status and control registers */
52#define RTC_BIT_AI (1 << 0) /* Alarm interrupt bit */
53#define RTC_BIT_PI (1 << 1) /* Periodic interrupt bit. ST variants only. */
54
55/* Common bit definations for ST v2 for reading/writing time */
56#define RTC_SEC_SHIFT 0
57#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
58#define RTC_MIN_SHIFT 6
59#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
60#define RTC_HOUR_SHIFT 12
61#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
62#define RTC_WDAY_SHIFT 17
63#define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
64#define RTC_MDAY_SHIFT 20
65#define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
66#define RTC_MON_SHIFT 25
67#define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */
68
69#define RTC_TIMER_FREQ 32768
33 70
34struct pl031_local { 71struct pl031_local {
35 struct rtc_device *rtc; 72 struct rtc_device *rtc;
36 void __iomem *base; 73 void __iomem *base;
74 u8 hw_designer;
75 u8 hw_revision:4;
37}; 76};
38 77
39static irqreturn_t pl031_interrupt(int irq, void *dev_id) 78static int pl031_alarm_irq_enable(struct device *dev,
79 unsigned int enabled)
80{
81 struct pl031_local *ldata = dev_get_drvdata(dev);
82 unsigned long imsc;
83
84 /* Clear any pending alarm interrupts. */
85 writel(RTC_BIT_AI, ldata->base + RTC_ICR);
86
87 imsc = readl(ldata->base + RTC_IMSC);
88
89 if (enabled == 1)
90 writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC);
91 else
92 writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);
93
94 return 0;
95}
96
97/*
98 * Convert Gregorian date to ST v2 RTC format.
99 */
100static int pl031_stv2_tm_to_time(struct device *dev,
101 struct rtc_time *tm, unsigned long *st_time,
102 unsigned long *bcd_year)
103{
104 int year = tm->tm_year + 1900;
105 int wday = tm->tm_wday;
106
107 /* wday masking is not working in hardware so wday must be valid */
108 if (wday < -1 || wday > 6) {
109 dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
110 return -EINVAL;
111 } else if (wday == -1) {
112 /* wday is not provided, calculate it here */
113 unsigned long time;
114 struct rtc_time calc_tm;
115
116 rtc_tm_to_time(tm, &time);
117 rtc_time_to_tm(time, &calc_tm);
118 wday = calc_tm.tm_wday;
119 }
120
121 *bcd_year = (bin2bcd(year % 100) | bin2bcd(year / 100) << 8);
122
123 *st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
124 | (tm->tm_mday << RTC_MDAY_SHIFT)
125 | ((wday + 1) << RTC_WDAY_SHIFT)
126 | (tm->tm_hour << RTC_HOUR_SHIFT)
127 | (tm->tm_min << RTC_MIN_SHIFT)
128 | (tm->tm_sec << RTC_SEC_SHIFT);
129
130 return 0;
131}
132
133/*
134 * Convert ST v2 RTC format to Gregorian date.
135 */
136static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
137 struct rtc_time *tm)
138{
139 tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
140 tm->tm_mon = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
141 tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
142 tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
143 tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
144 tm->tm_min = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
145 tm->tm_sec = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);
146
147 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
148 tm->tm_year -= 1900;
149
150 return 0;
151}
152
153static int pl031_stv2_read_time(struct device *dev, struct rtc_time *tm)
154{
155 struct pl031_local *ldata = dev_get_drvdata(dev);
156
157 pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
158 readl(ldata->base + RTC_YDR), tm);
159
160 return 0;
161}
162
163static int pl031_stv2_set_time(struct device *dev, struct rtc_time *tm)
164{
165 unsigned long time;
166 unsigned long bcd_year;
167 struct pl031_local *ldata = dev_get_drvdata(dev);
168 int ret;
169
170 ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year);
171 if (ret == 0) {
172 writel(bcd_year, ldata->base + RTC_YLR);
173 writel(time, ldata->base + RTC_LR);
174 }
175
176 return ret;
177}
178
179static int pl031_stv2_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
40{ 180{
41 struct rtc_device *rtc = dev_id; 181 struct pl031_local *ldata = dev_get_drvdata(dev);
182 int ret;
42 183
43 rtc_update_irq(rtc, 1, RTC_AF); 184 ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
185 readl(ldata->base + RTC_YMR), &alarm->time);
44 186
45 return IRQ_HANDLED; 187 alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
188 alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
189
190 return ret;
46} 191}
47 192
48static int pl031_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) 193static int pl031_stv2_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
49{ 194{
50 struct pl031_local *ldata = dev_get_drvdata(dev); 195 struct pl031_local *ldata = dev_get_drvdata(dev);
196 unsigned long time;
197 unsigned long bcd_year;
198 int ret;
199
200 /* At the moment, we can only deal with non-wildcarded alarm times. */
201 ret = rtc_valid_tm(&alarm->time);
202 if (ret == 0) {
203 ret = pl031_stv2_tm_to_time(dev, &alarm->time,
204 &time, &bcd_year);
205 if (ret == 0) {
206 writel(bcd_year, ldata->base + RTC_YMR);
207 writel(time, ldata->base + RTC_MR);
208
209 pl031_alarm_irq_enable(dev, alarm->enabled);
210 }
211 }
212
213 return ret;
214}
215
216static irqreturn_t pl031_interrupt(int irq, void *dev_id)
217{
218 struct pl031_local *ldata = dev_id;
219 unsigned long rtcmis;
220 unsigned long events = 0;
221
222 rtcmis = readl(ldata->base + RTC_MIS);
223 if (rtcmis) {
224 writel(rtcmis, ldata->base + RTC_ICR);
225
226 if (rtcmis & RTC_BIT_AI)
227 events |= (RTC_AF | RTC_IRQF);
228
229 /* Timer interrupt is only available in ST variants */
230 if ((rtcmis & RTC_BIT_PI) &&
231 (ldata->hw_designer == AMBA_VENDOR_ST))
232 events |= (RTC_PF | RTC_IRQF);
233
234 rtc_update_irq(ldata->rtc, 1, events);
51 235
52 switch (cmd) { 236 return IRQ_HANDLED;
53 case RTC_AIE_OFF:
54 writel(1, ldata->base + RTC_MIS);
55 return 0;
56 case RTC_AIE_ON:
57 writel(0, ldata->base + RTC_MIS);
58 return 0;
59 } 237 }
60 238
61 return -ENOIOCTLCMD; 239 return IRQ_NONE;
62} 240}
63 241
64static int pl031_read_time(struct device *dev, struct rtc_time *tm) 242static int pl031_read_time(struct device *dev, struct rtc_time *tm)
@@ -74,11 +252,14 @@ static int pl031_set_time(struct device *dev, struct rtc_time *tm)
74{ 252{
75 unsigned long time; 253 unsigned long time;
76 struct pl031_local *ldata = dev_get_drvdata(dev); 254 struct pl031_local *ldata = dev_get_drvdata(dev);
255 int ret;
77 256
78 rtc_tm_to_time(tm, &time); 257 ret = rtc_tm_to_time(tm, &time);
79 writel(time, ldata->base + RTC_LR);
80 258
81 return 0; 259 if (ret == 0)
260 writel(time, ldata->base + RTC_LR);
261
262 return ret;
82} 263}
83 264
84static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) 265static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
@@ -86,8 +267,9 @@ static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
86 struct pl031_local *ldata = dev_get_drvdata(dev); 267 struct pl031_local *ldata = dev_get_drvdata(dev);
87 268
88 rtc_time_to_tm(readl(ldata->base + RTC_MR), &alarm->time); 269 rtc_time_to_tm(readl(ldata->base + RTC_MR), &alarm->time);
89 alarm->pending = readl(ldata->base + RTC_RIS); 270
90 alarm->enabled = readl(ldata->base + RTC_IMSC); 271 alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
272 alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
91 273
92 return 0; 274 return 0;
93} 275}
@@ -96,22 +278,71 @@ static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
96{ 278{
97 struct pl031_local *ldata = dev_get_drvdata(dev); 279 struct pl031_local *ldata = dev_get_drvdata(dev);
98 unsigned long time; 280 unsigned long time;
281 int ret;
282
283 /* At the moment, we can only deal with non-wildcarded alarm times. */
284 ret = rtc_valid_tm(&alarm->time);
285 if (ret == 0) {
286 ret = rtc_tm_to_time(&alarm->time, &time);
287 if (ret == 0) {
288 writel(time, ldata->base + RTC_MR);
289 pl031_alarm_irq_enable(dev, alarm->enabled);
290 }
291 }
292
293 return ret;
294}
295
296/* Periodic interrupt is only available in ST variants. */
297static int pl031_irq_set_state(struct device *dev, int enabled)
298{
299 struct pl031_local *ldata = dev_get_drvdata(dev);
300
301 if (enabled == 1) {
302 /* Clear any pending timer interrupt. */
303 writel(RTC_BIT_PI, ldata->base + RTC_ICR);
304
305 writel(readl(ldata->base + RTC_IMSC) | RTC_BIT_PI,
306 ldata->base + RTC_IMSC);
99 307
100 rtc_tm_to_time(&alarm->time, &time); 308 /* Now start the timer */
309 writel(readl(ldata->base + RTC_TCR) | RTC_TCR_EN,
310 ldata->base + RTC_TCR);
101 311
102 writel(time, ldata->base + RTC_MR); 312 } else {
103 writel(!alarm->enabled, ldata->base + RTC_MIS); 313 writel(readl(ldata->base + RTC_IMSC) & (~RTC_BIT_PI),
314 ldata->base + RTC_IMSC);
315
316 /* Also stop the timer */
317 writel(readl(ldata->base + RTC_TCR) & (~RTC_TCR_EN),
318 ldata->base + RTC_TCR);
319 }
320 /* Wait at least 1 RTC32 clock cycle to ensure next access
321 * to RTC_TCR will succeed.
322 */
323 udelay(40);
104 324
105 return 0; 325 return 0;
106} 326}
107 327
108static const struct rtc_class_ops pl031_ops = { 328static int pl031_irq_set_freq(struct device *dev, int freq)
109 .ioctl = pl031_ioctl, 329{
110 .read_time = pl031_read_time, 330 struct pl031_local *ldata = dev_get_drvdata(dev);
111 .set_time = pl031_set_time, 331
112 .read_alarm = pl031_read_alarm, 332 /* Cant set timer if it is already enabled */
113 .set_alarm = pl031_set_alarm, 333 if (readl(ldata->base + RTC_TCR) & RTC_TCR_EN) {
114}; 334 dev_err(dev, "can't change frequency while timer enabled\n");
335 return -EINVAL;
336 }
337
338 /* If self start bit in RTC_TCR is set timer will start here,
339 * but we never set that bit. Instead we start the timer when
340 * set_state is called with enabled == 1.
341 */
342 writel(RTC_TIMER_FREQ / freq, ldata->base + RTC_TLR);
343
344 return 0;
345}
115 346
116static int pl031_remove(struct amba_device *adev) 347static int pl031_remove(struct amba_device *adev)
117{ 348{
@@ -131,18 +362,20 @@ static int pl031_probe(struct amba_device *adev, struct amba_id *id)
131{ 362{
132 int ret; 363 int ret;
133 struct pl031_local *ldata; 364 struct pl031_local *ldata;
365 struct rtc_class_ops *ops = id->data;
134 366
135 ret = amba_request_regions(adev, NULL); 367 ret = amba_request_regions(adev, NULL);
136 if (ret) 368 if (ret)
137 goto err_req; 369 goto err_req;
138 370
139 ldata = kmalloc(sizeof(struct pl031_local), GFP_KERNEL); 371 ldata = kzalloc(sizeof(struct pl031_local), GFP_KERNEL);
140 if (!ldata) { 372 if (!ldata) {
141 ret = -ENOMEM; 373 ret = -ENOMEM;
142 goto out; 374 goto out;
143 } 375 }
144 376
145 ldata->base = ioremap(adev->res.start, resource_size(&adev->res)); 377 ldata->base = ioremap(adev->res.start, resource_size(&adev->res));
378
146 if (!ldata->base) { 379 if (!ldata->base) {
147 ret = -ENOMEM; 380 ret = -ENOMEM;
148 goto out_no_remap; 381 goto out_no_remap;
@@ -150,24 +383,36 @@ static int pl031_probe(struct amba_device *adev, struct amba_id *id)
150 383
151 amba_set_drvdata(adev, ldata); 384 amba_set_drvdata(adev, ldata);
152 385
153 if (request_irq(adev->irq[0], pl031_interrupt, IRQF_DISABLED, 386 ldata->hw_designer = amba_manf(adev);
154 "rtc-pl031", ldata->rtc)) { 387 ldata->hw_revision = amba_rev(adev);
155 ret = -EIO; 388
156 goto out_no_irq; 389 dev_dbg(&adev->dev, "designer ID = 0x%02x\n", ldata->hw_designer);
157 } 390 dev_dbg(&adev->dev, "revision = 0x%01x\n", ldata->hw_revision);
158 391
159 ldata->rtc = rtc_device_register("pl031", &adev->dev, &pl031_ops, 392 /* Enable the clockwatch on ST Variants */
160 THIS_MODULE); 393 if ((ldata->hw_designer == AMBA_VENDOR_ST) &&
394 (ldata->hw_revision > 1))
395 writel(readl(ldata->base + RTC_CR) | RTC_CR_CWEN,
396 ldata->base + RTC_CR);
397
398 ldata->rtc = rtc_device_register("pl031", &adev->dev, ops,
399 THIS_MODULE);
161 if (IS_ERR(ldata->rtc)) { 400 if (IS_ERR(ldata->rtc)) {
162 ret = PTR_ERR(ldata->rtc); 401 ret = PTR_ERR(ldata->rtc);
163 goto out_no_rtc; 402 goto out_no_rtc;
164 } 403 }
165 404
405 if (request_irq(adev->irq[0], pl031_interrupt,
406 IRQF_DISABLED | IRQF_SHARED, "rtc-pl031", ldata)) {
407 ret = -EIO;
408 goto out_no_irq;
409 }
410
166 return 0; 411 return 0;
167 412
168out_no_rtc:
169 free_irq(adev->irq[0], ldata->rtc);
170out_no_irq: 413out_no_irq:
414 rtc_device_unregister(ldata->rtc);
415out_no_rtc:
171 iounmap(ldata->base); 416 iounmap(ldata->base);
172 amba_set_drvdata(adev, NULL); 417 amba_set_drvdata(adev, NULL);
173out_no_remap: 418out_no_remap:
@@ -175,13 +420,57 @@ out_no_remap:
175out: 420out:
176 amba_release_regions(adev); 421 amba_release_regions(adev);
177err_req: 422err_req:
423
178 return ret; 424 return ret;
179} 425}
180 426
427/* Operations for the original ARM version */
428static struct rtc_class_ops arm_pl031_ops = {
429 .read_time = pl031_read_time,
430 .set_time = pl031_set_time,
431 .read_alarm = pl031_read_alarm,
432 .set_alarm = pl031_set_alarm,
433 .alarm_irq_enable = pl031_alarm_irq_enable,
434};
435
436/* The First ST derivative */
437static struct rtc_class_ops stv1_pl031_ops = {
438 .read_time = pl031_read_time,
439 .set_time = pl031_set_time,
440 .read_alarm = pl031_read_alarm,
441 .set_alarm = pl031_set_alarm,
442 .alarm_irq_enable = pl031_alarm_irq_enable,
443 .irq_set_state = pl031_irq_set_state,
444 .irq_set_freq = pl031_irq_set_freq,
445};
446
447/* And the second ST derivative */
448static struct rtc_class_ops stv2_pl031_ops = {
449 .read_time = pl031_stv2_read_time,
450 .set_time = pl031_stv2_set_time,
451 .read_alarm = pl031_stv2_read_alarm,
452 .set_alarm = pl031_stv2_set_alarm,
453 .alarm_irq_enable = pl031_alarm_irq_enable,
454 .irq_set_state = pl031_irq_set_state,
455 .irq_set_freq = pl031_irq_set_freq,
456};
457
181static struct amba_id pl031_ids[] __initdata = { 458static struct amba_id pl031_ids[] __initdata = {
182 { 459 {
183 .id = 0x00041031, 460 .id = 0x00041031,
184 .mask = 0x000fffff, 461 .mask = 0x000fffff,
462 .data = &arm_pl031_ops,
463 },
464 /* ST Micro variants */
465 {
466 .id = 0x00180031,
467 .mask = 0x00ffffff,
468 .data = &stv1_pl031_ops,
469 },
470 {
471 .id = 0x00280031,
472 .mask = 0x00ffffff,
473 .data = &stv2_pl031_ops,
185 }, 474 },
186 {0, 0}, 475 {0, 0},
187}; 476};