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authorLinus Torvalds <torvalds@linux-foundation.org>2010-10-27 21:42:52 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-10-27 21:42:52 -0400
commit17bb51d56cdc8cbf252031db3107de034cfeb44c (patch)
treef9fb2c16b29a152d3413fa0028e660e3b6146584 /drivers/rtc
parent0671b7674f42ab3a200401ea0e48d6f47d34acae (diff)
parent95aac7b1cd224f568fb83937044cd303ff11b029 (diff)
Merge branch 'akpm-incoming-2'
* akpm-incoming-2: (139 commits) epoll: make epoll_wait() use the hrtimer range feature select: rename estimate_accuracy() to select_estimate_accuracy() Remove duplicate includes from many files ramoops: use the platform data structure instead of module params kernel/resource.c: handle reinsertion of an already-inserted resource kfifo: fix kfifo_alloc() to return a signed int value w1: don't allow arbitrary users to remove w1 devices alpha: remove dma64_addr_t usage mips: remove dma64_addr_t usage sparc: remove dma64_addr_t usage fuse: use release_pages() taskstats: use real microsecond granularity for CPU times taskstats: split fill_pid function taskstats: separate taskstats commands delayacct: align to 8 byte boundary on 64-bit systems delay-accounting: reimplement -c for getdelays.c to report information on a target command namespaces Kconfig: move namespace menu location after the cgroup namespaces Kconfig: remove the cgroup device whitelist experimental tag namespaces Kconfig: remove pointless cgroup dependency namespaces Kconfig: make namespace a submenu ...
Diffstat (limited to 'drivers/rtc')
-rw-r--r--drivers/rtc/Kconfig12
-rw-r--r--drivers/rtc/Makefile1
-rw-r--r--drivers/rtc/class.c4
-rw-r--r--drivers/rtc/rtc-bfin.c43
-rw-r--r--drivers/rtc/rtc-ds3232.c181
-rw-r--r--drivers/rtc/rtc-jz4740.c45
-rw-r--r--drivers/rtc/rtc-lpc32xx.c414
-rw-r--r--drivers/rtc/rtc-omap.c12
-rw-r--r--drivers/rtc/rtc-s3c.c92
9 files changed, 737 insertions, 67 deletions
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 2785a0f16c9f..6a77437d4f5a 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -171,7 +171,8 @@ config RTC_DRV_DS3232
171 depends on RTC_CLASS && I2C 171 depends on RTC_CLASS && I2C
172 help 172 help
173 If you say yes here you get support for Dallas Semiconductor 173 If you say yes here you get support for Dallas Semiconductor
174 DS3232 real-time clock chips. 174 DS3232 real-time clock chips. If an interrupt is associated
175 with the device, the alarm functionality is supported.
175 176
176 This driver can also be built as a module. If so, the module 177 This driver can also be built as a module. If so, the module
177 will be called rtc-ds3232. 178 will be called rtc-ds3232.
@@ -952,4 +953,13 @@ config RTC_DRV_JZ4740
952 This driver can also be buillt as a module. If so, the module 953 This driver can also be buillt as a module. If so, the module
953 will be called rtc-jz4740. 954 will be called rtc-jz4740.
954 955
956config RTC_DRV_LPC32XX
957 depends on ARCH_LPC32XX
958 tristate "NXP LPC32XX RTC"
959 help
960 This enables support for the NXP RTC in the LPC32XX
961
962 This driver can also be buillt as a module. If so, the module
963 will be called rtc-lpc32xx.
964
955endif # RTC_CLASS 965endif # RTC_CLASS
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 0f207b3b5833..7a7cb3228a1d 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_RTC_DRV_IMXDI) += rtc-imxdi.o
51obj-$(CONFIG_RTC_DRV_ISL1208) += rtc-isl1208.o 51obj-$(CONFIG_RTC_DRV_ISL1208) += rtc-isl1208.o
52obj-$(CONFIG_RTC_DRV_ISL12022) += rtc-isl12022.o 52obj-$(CONFIG_RTC_DRV_ISL12022) += rtc-isl12022.o
53obj-$(CONFIG_RTC_DRV_JZ4740) += rtc-jz4740.o 53obj-$(CONFIG_RTC_DRV_JZ4740) += rtc-jz4740.o
54obj-$(CONFIG_RTC_DRV_LPC32XX) += rtc-lpc32xx.o
54obj-$(CONFIG_RTC_DRV_M41T80) += rtc-m41t80.o 55obj-$(CONFIG_RTC_DRV_M41T80) += rtc-m41t80.o
55obj-$(CONFIG_RTC_DRV_M41T94) += rtc-m41t94.o 56obj-$(CONFIG_RTC_DRV_M41T94) += rtc-m41t94.o
56obj-$(CONFIG_RTC_DRV_M48T35) += rtc-m48t35.o 57obj-$(CONFIG_RTC_DRV_M48T35) += rtc-m48t35.o
diff --git a/drivers/rtc/class.c b/drivers/rtc/class.c
index 565562ba6ac9..e6539cbabb35 100644
--- a/drivers/rtc/class.c
+++ b/drivers/rtc/class.c
@@ -158,8 +158,10 @@ struct rtc_device *rtc_device_register(const char *name, struct device *dev,
158 rtc_dev_prepare(rtc); 158 rtc_dev_prepare(rtc);
159 159
160 err = device_register(&rtc->dev); 160 err = device_register(&rtc->dev);
161 if (err) 161 if (err) {
162 put_device(&rtc->dev);
162 goto exit_kfree; 163 goto exit_kfree;
164 }
163 165
164 rtc_dev_add_device(rtc); 166 rtc_dev_add_device(rtc);
165 rtc_sysfs_add_device(rtc); 167 rtc_sysfs_add_device(rtc);
diff --git a/drivers/rtc/rtc-bfin.c b/drivers/rtc/rtc-bfin.c
index d4fb82d85e9b..b4b6087f2234 100644
--- a/drivers/rtc/rtc-bfin.c
+++ b/drivers/rtc/rtc-bfin.c
@@ -2,7 +2,7 @@
2 * Blackfin On-Chip Real Time Clock Driver 2 * Blackfin On-Chip Real Time Clock Driver
3 * Supports BF51x/BF52x/BF53[123]/BF53[467]/BF54x 3 * Supports BF51x/BF52x/BF53[123]/BF53[467]/BF54x
4 * 4 *
5 * Copyright 2004-2009 Analog Devices Inc. 5 * Copyright 2004-2010 Analog Devices Inc.
6 * 6 *
7 * Enter bugs at http://blackfin.uclinux.org/ 7 * Enter bugs at http://blackfin.uclinux.org/
8 * 8 *
@@ -183,29 +183,33 @@ static irqreturn_t bfin_rtc_interrupt(int irq, void *dev_id)
183 struct bfin_rtc *rtc = dev_get_drvdata(dev); 183 struct bfin_rtc *rtc = dev_get_drvdata(dev);
184 unsigned long events = 0; 184 unsigned long events = 0;
185 bool write_complete = false; 185 bool write_complete = false;
186 u16 rtc_istat, rtc_ictl; 186 u16 rtc_istat, rtc_istat_clear, rtc_ictl, bits;
187 187
188 dev_dbg_stamp(dev); 188 dev_dbg_stamp(dev);
189 189
190 rtc_istat = bfin_read_RTC_ISTAT(); 190 rtc_istat = bfin_read_RTC_ISTAT();
191 rtc_ictl = bfin_read_RTC_ICTL(); 191 rtc_ictl = bfin_read_RTC_ICTL();
192 rtc_istat_clear = 0;
192 193
193 if (rtc_istat & RTC_ISTAT_WRITE_COMPLETE) { 194 bits = RTC_ISTAT_WRITE_COMPLETE;
194 bfin_write_RTC_ISTAT(RTC_ISTAT_WRITE_COMPLETE); 195 if (rtc_istat & bits) {
196 rtc_istat_clear |= bits;
195 write_complete = true; 197 write_complete = true;
196 complete(&bfin_write_complete); 198 complete(&bfin_write_complete);
197 } 199 }
198 200
199 if (rtc_ictl & (RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY)) { 201 bits = (RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY);
200 if (rtc_istat & (RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY)) { 202 if (rtc_ictl & bits) {
201 bfin_write_RTC_ISTAT(RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY); 203 if (rtc_istat & bits) {
204 rtc_istat_clear |= bits;
202 events |= RTC_AF | RTC_IRQF; 205 events |= RTC_AF | RTC_IRQF;
203 } 206 }
204 } 207 }
205 208
206 if (rtc_ictl & RTC_ISTAT_SEC) { 209 bits = RTC_ISTAT_SEC;
207 if (rtc_istat & RTC_ISTAT_SEC) { 210 if (rtc_ictl & bits) {
208 bfin_write_RTC_ISTAT(RTC_ISTAT_SEC); 211 if (rtc_istat & bits) {
212 rtc_istat_clear |= bits;
209 events |= RTC_UF | RTC_IRQF; 213 events |= RTC_UF | RTC_IRQF;
210 } 214 }
211 } 215 }
@@ -213,9 +217,10 @@ static irqreturn_t bfin_rtc_interrupt(int irq, void *dev_id)
213 if (events) 217 if (events)
214 rtc_update_irq(rtc->rtc_dev, 1, events); 218 rtc_update_irq(rtc->rtc_dev, 1, events);
215 219
216 if (write_complete || events) 220 if (write_complete || events) {
221 bfin_write_RTC_ISTAT(rtc_istat_clear);
217 return IRQ_HANDLED; 222 return IRQ_HANDLED;
218 else 223 } else
219 return IRQ_NONE; 224 return IRQ_NONE;
220} 225}
221 226
@@ -422,9 +427,13 @@ static int __devexit bfin_rtc_remove(struct platform_device *pdev)
422#ifdef CONFIG_PM 427#ifdef CONFIG_PM
423static int bfin_rtc_suspend(struct platform_device *pdev, pm_message_t state) 428static int bfin_rtc_suspend(struct platform_device *pdev, pm_message_t state)
424{ 429{
425 if (device_may_wakeup(&pdev->dev)) { 430 struct device *dev = &pdev->dev;
431
432 dev_dbg_stamp(dev);
433
434 if (device_may_wakeup(dev)) {
426 enable_irq_wake(IRQ_RTC); 435 enable_irq_wake(IRQ_RTC);
427 bfin_rtc_sync_pending(&pdev->dev); 436 bfin_rtc_sync_pending(dev);
428 } else 437 } else
429 bfin_rtc_int_clear(0); 438 bfin_rtc_int_clear(0);
430 439
@@ -433,7 +442,11 @@ static int bfin_rtc_suspend(struct platform_device *pdev, pm_message_t state)
433 442
434static int bfin_rtc_resume(struct platform_device *pdev) 443static int bfin_rtc_resume(struct platform_device *pdev)
435{ 444{
436 if (device_may_wakeup(&pdev->dev)) 445 struct device *dev = &pdev->dev;
446
447 dev_dbg_stamp(dev);
448
449 if (device_may_wakeup(dev))
437 disable_irq_wake(IRQ_RTC); 450 disable_irq_wake(IRQ_RTC);
438 451
439 /* 452 /*
diff --git a/drivers/rtc/rtc-ds3232.c b/drivers/rtc/rtc-ds3232.c
index 9de8516e3531..57063552d3b7 100644
--- a/drivers/rtc/rtc-ds3232.c
+++ b/drivers/rtc/rtc-ds3232.c
@@ -2,6 +2,7 @@
2 * RTC client/driver for the Maxim/Dallas DS3232 Real-Time Clock over I2C 2 * RTC client/driver for the Maxim/Dallas DS3232 Real-Time Clock over I2C
3 * 3 *
4 * Copyright (C) 2009-2010 Freescale Semiconductor. 4 * Copyright (C) 2009-2010 Freescale Semiconductor.
5 * Author: Jack Lan <jack.lan@freescale.com>
5 * 6 *
6 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 8 * under the terms of the GNU General Public License as published by the
@@ -175,6 +176,182 @@ static int ds3232_set_time(struct device *dev, struct rtc_time *time)
175 DS3232_REG_SECONDS, 7, buf); 176 DS3232_REG_SECONDS, 7, buf);
176} 177}
177 178
179/*
180 * DS3232 has two alarm, we only use alarm1
181 * According to linux specification, only support one-shot alarm
182 * no periodic alarm mode
183 */
184static int ds3232_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
185{
186 struct i2c_client *client = to_i2c_client(dev);
187 struct ds3232 *ds3232 = i2c_get_clientdata(client);
188 int control, stat;
189 int ret;
190 u8 buf[4];
191
192 mutex_lock(&ds3232->mutex);
193
194 ret = i2c_smbus_read_byte_data(client, DS3232_REG_SR);
195 if (ret < 0)
196 goto out;
197 stat = ret;
198 ret = i2c_smbus_read_byte_data(client, DS3232_REG_CR);
199 if (ret < 0)
200 goto out;
201 control = ret;
202 ret = i2c_smbus_read_i2c_block_data(client, DS3232_REG_ALARM1, 4, buf);
203 if (ret < 0)
204 goto out;
205
206 alarm->time.tm_sec = bcd2bin(buf[0] & 0x7F);
207 alarm->time.tm_min = bcd2bin(buf[1] & 0x7F);
208 alarm->time.tm_hour = bcd2bin(buf[2] & 0x7F);
209 alarm->time.tm_mday = bcd2bin(buf[3] & 0x7F);
210
211 alarm->time.tm_mon = -1;
212 alarm->time.tm_year = -1;
213 alarm->time.tm_wday = -1;
214 alarm->time.tm_yday = -1;
215 alarm->time.tm_isdst = -1;
216
217 alarm->enabled = !!(control & DS3232_REG_CR_A1IE);
218 alarm->pending = !!(stat & DS3232_REG_SR_A1F);
219
220 ret = 0;
221out:
222 mutex_unlock(&ds3232->mutex);
223 return ret;
224}
225
226/*
227 * linux rtc-module does not support wday alarm
228 * and only 24h time mode supported indeed
229 */
230static int ds3232_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
231{
232 struct i2c_client *client = to_i2c_client(dev);
233 struct ds3232 *ds3232 = i2c_get_clientdata(client);
234 int control, stat;
235 int ret;
236 u8 buf[4];
237
238 if (client->irq <= 0)
239 return -EINVAL;
240
241 mutex_lock(&ds3232->mutex);
242
243 buf[0] = bin2bcd(alarm->time.tm_sec);
244 buf[1] = bin2bcd(alarm->time.tm_min);
245 buf[2] = bin2bcd(alarm->time.tm_hour);
246 buf[3] = bin2bcd(alarm->time.tm_mday);
247
248 /* clear alarm interrupt enable bit */
249 ret = i2c_smbus_read_byte_data(client, DS3232_REG_CR);
250 if (ret < 0)
251 goto out;
252 control = ret;
253 control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE);
254 ret = i2c_smbus_write_byte_data(client, DS3232_REG_CR, control);
255 if (ret < 0)
256 goto out;
257
258 /* clear any pending alarm flag */
259 ret = i2c_smbus_read_byte_data(client, DS3232_REG_SR);
260 if (ret < 0)
261 goto out;
262 stat = ret;
263 stat &= ~(DS3232_REG_SR_A1F | DS3232_REG_SR_A2F);
264 ret = i2c_smbus_write_byte_data(client, DS3232_REG_SR, stat);
265 if (ret < 0)
266 goto out;
267
268 ret = i2c_smbus_write_i2c_block_data(client, DS3232_REG_ALARM1, 4, buf);
269
270 if (alarm->enabled) {
271 control |= DS3232_REG_CR_A1IE;
272 ret = i2c_smbus_write_byte_data(client, DS3232_REG_CR, control);
273 }
274out:
275 mutex_unlock(&ds3232->mutex);
276 return ret;
277}
278
279static void ds3232_update_alarm(struct i2c_client *client)
280{
281 struct ds3232 *ds3232 = i2c_get_clientdata(client);
282 int control;
283 int ret;
284 u8 buf[4];
285
286 mutex_lock(&ds3232->mutex);
287
288 ret = i2c_smbus_read_i2c_block_data(client, DS3232_REG_ALARM1, 4, buf);
289 if (ret < 0)
290 goto unlock;
291
292 buf[0] = bcd2bin(buf[0]) < 0 || (ds3232->rtc->irq_data & RTC_UF) ?
293 0x80 : buf[0];
294 buf[1] = bcd2bin(buf[1]) < 0 || (ds3232->rtc->irq_data & RTC_UF) ?
295 0x80 : buf[1];
296 buf[2] = bcd2bin(buf[2]) < 0 || (ds3232->rtc->irq_data & RTC_UF) ?
297 0x80 : buf[2];
298 buf[3] = bcd2bin(buf[3]) < 0 || (ds3232->rtc->irq_data & RTC_UF) ?
299 0x80 : buf[3];
300
301 ret = i2c_smbus_write_i2c_block_data(client, DS3232_REG_ALARM1, 4, buf);
302 if (ret < 0)
303 goto unlock;
304
305 control = i2c_smbus_read_byte_data(client, DS3232_REG_CR);
306 if (control < 0)
307 goto unlock;
308
309 if (ds3232->rtc->irq_data & (RTC_AF | RTC_UF))
310 /* enable alarm1 interrupt */
311 control |= DS3232_REG_CR_A1IE;
312 else
313 /* disable alarm1 interrupt */
314 control &= ~(DS3232_REG_CR_A1IE);
315 i2c_smbus_write_byte_data(client, DS3232_REG_CR, control);
316
317unlock:
318 mutex_unlock(&ds3232->mutex);
319}
320
321static int ds3232_alarm_irq_enable(struct device *dev, unsigned int enabled)
322{
323 struct i2c_client *client = to_i2c_client(dev);
324 struct ds3232 *ds3232 = i2c_get_clientdata(client);
325
326 if (client->irq <= 0)
327 return -EINVAL;
328
329 if (enabled)
330 ds3232->rtc->irq_data |= RTC_AF;
331 else
332 ds3232->rtc->irq_data &= ~RTC_AF;
333
334 ds3232_update_alarm(client);
335 return 0;
336}
337
338static int ds3232_update_irq_enable(struct device *dev, unsigned int enabled)
339{
340 struct i2c_client *client = to_i2c_client(dev);
341 struct ds3232 *ds3232 = i2c_get_clientdata(client);
342
343 if (client->irq <= 0)
344 return -EINVAL;
345
346 if (enabled)
347 ds3232->rtc->irq_data |= RTC_UF;
348 else
349 ds3232->rtc->irq_data &= ~RTC_UF;
350
351 ds3232_update_alarm(client);
352 return 0;
353}
354
178static irqreturn_t ds3232_irq(int irq, void *dev_id) 355static irqreturn_t ds3232_irq(int irq, void *dev_id)
179{ 356{
180 struct i2c_client *client = dev_id; 357 struct i2c_client *client = dev_id;
@@ -222,6 +399,10 @@ unlock:
222static const struct rtc_class_ops ds3232_rtc_ops = { 399static const struct rtc_class_ops ds3232_rtc_ops = {
223 .read_time = ds3232_read_time, 400 .read_time = ds3232_read_time,
224 .set_time = ds3232_set_time, 401 .set_time = ds3232_set_time,
402 .read_alarm = ds3232_read_alarm,
403 .set_alarm = ds3232_set_alarm,
404 .alarm_irq_enable = ds3232_alarm_irq_enable,
405 .update_irq_enable = ds3232_update_irq_enable,
225}; 406};
226 407
227static int __devinit ds3232_probe(struct i2c_client *client, 408static int __devinit ds3232_probe(struct i2c_client *client,
diff --git a/drivers/rtc/rtc-jz4740.c b/drivers/rtc/rtc-jz4740.c
index 2619d57b91d7..2e16f72c9056 100644
--- a/drivers/rtc/rtc-jz4740.c
+++ b/drivers/rtc/rtc-jz4740.c
@@ -1,5 +1,6 @@
1/* 1/*
2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de> 2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
3 * Copyright (C) 2010, Paul Cercueil <paul@crapouillou.net>
3 * JZ4740 SoC RTC driver 4 * JZ4740 SoC RTC driver
4 * 5 *
5 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
@@ -161,7 +162,8 @@ static int jz4740_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
161 162
162 ret = jz4740_rtc_reg_write(rtc, JZ_REG_RTC_SEC_ALARM, secs); 163 ret = jz4740_rtc_reg_write(rtc, JZ_REG_RTC_SEC_ALARM, secs);
163 if (!ret) 164 if (!ret)
164 ret = jz4740_rtc_ctrl_set_bits(rtc, JZ_RTC_CTRL_AE, alrm->enabled); 165 ret = jz4740_rtc_ctrl_set_bits(rtc,
166 JZ_RTC_CTRL_AE | JZ_RTC_CTRL_AF_IRQ, alrm->enabled);
165 167
166 return ret; 168 return ret;
167} 169}
@@ -258,6 +260,8 @@ static int __devinit jz4740_rtc_probe(struct platform_device *pdev)
258 260
259 platform_set_drvdata(pdev, rtc); 261 platform_set_drvdata(pdev, rtc);
260 262
263 device_init_wakeup(&pdev->dev, 1);
264
261 rtc->rtc = rtc_device_register(pdev->name, &pdev->dev, &jz4740_rtc_ops, 265 rtc->rtc = rtc_device_register(pdev->name, &pdev->dev, &jz4740_rtc_ops,
262 THIS_MODULE); 266 THIS_MODULE);
263 if (IS_ERR(rtc->rtc)) { 267 if (IS_ERR(rtc->rtc)) {
@@ -318,12 +322,43 @@ static int __devexit jz4740_rtc_remove(struct platform_device *pdev)
318 return 0; 322 return 0;
319} 323}
320 324
325
326#ifdef CONFIG_PM
327static int jz4740_rtc_suspend(struct device *dev)
328{
329 struct jz4740_rtc *rtc = dev_get_drvdata(dev);
330
331 if (device_may_wakeup(dev))
332 enable_irq_wake(rtc->irq);
333 return 0;
334}
335
336static int jz4740_rtc_resume(struct device *dev)
337{
338 struct jz4740_rtc *rtc = dev_get_drvdata(dev);
339
340 if (device_may_wakeup(dev))
341 disable_irq_wake(rtc->irq);
342 return 0;
343}
344
345static const struct dev_pm_ops jz4740_pm_ops = {
346 .suspend = jz4740_rtc_suspend,
347 .resume = jz4740_rtc_resume,
348};
349#define JZ4740_RTC_PM_OPS (&jz4740_pm_ops)
350
351#else
352#define JZ4740_RTC_PM_OPS NULL
353#endif /* CONFIG_PM */
354
321struct platform_driver jz4740_rtc_driver = { 355struct platform_driver jz4740_rtc_driver = {
322 .probe = jz4740_rtc_probe, 356 .probe = jz4740_rtc_probe,
323 .remove = __devexit_p(jz4740_rtc_remove), 357 .remove = __devexit_p(jz4740_rtc_remove),
324 .driver = { 358 .driver = {
325 .name = "jz4740-rtc", 359 .name = "jz4740-rtc",
326 .owner = THIS_MODULE, 360 .owner = THIS_MODULE,
361 .pm = JZ4740_RTC_PM_OPS,
327 }, 362 },
328}; 363};
329 364
diff --git a/drivers/rtc/rtc-lpc32xx.c b/drivers/rtc/rtc-lpc32xx.c
new file mode 100644
index 000000000000..ec8701ce99f9
--- /dev/null
+++ b/drivers/rtc/rtc-lpc32xx.c
@@ -0,0 +1,414 @@
1/*
2 * Copyright (C) 2010 NXP Semiconductors
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * You should have received a copy of the GNU General Public License along
10 * with this program; if not, write to the Free Software Foundation, Inc.,
11 * 675 Mass Ave, Cambridge, MA 02139, USA.
12 */
13
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/spinlock.h>
19#include <linux/rtc.h>
20#include <linux/slab.h>
21#include <linux/io.h>
22
23/*
24 * Clock and Power control register offsets
25 */
26#define LPC32XX_RTC_UCOUNT 0x00
27#define LPC32XX_RTC_DCOUNT 0x04
28#define LPC32XX_RTC_MATCH0 0x08
29#define LPC32XX_RTC_MATCH1 0x0C
30#define LPC32XX_RTC_CTRL 0x10
31#define LPC32XX_RTC_INTSTAT 0x14
32#define LPC32XX_RTC_KEY 0x18
33#define LPC32XX_RTC_SRAM 0x80
34
35#define LPC32XX_RTC_CTRL_MATCH0 (1 << 0)
36#define LPC32XX_RTC_CTRL_MATCH1 (1 << 1)
37#define LPC32XX_RTC_CTRL_ONSW_MATCH0 (1 << 2)
38#define LPC32XX_RTC_CTRL_ONSW_MATCH1 (1 << 3)
39#define LPC32XX_RTC_CTRL_SW_RESET (1 << 4)
40#define LPC32XX_RTC_CTRL_CNTR_DIS (1 << 6)
41#define LPC32XX_RTC_CTRL_ONSW_FORCE_HI (1 << 7)
42
43#define LPC32XX_RTC_INTSTAT_MATCH0 (1 << 0)
44#define LPC32XX_RTC_INTSTAT_MATCH1 (1 << 1)
45#define LPC32XX_RTC_INTSTAT_ONSW (1 << 2)
46
47#define LPC32XX_RTC_KEY_ONSW_LOADVAL 0xB5C13F27
48
49#define RTC_NAME "rtc-lpc32xx"
50
51#define rtc_readl(dev, reg) \
52 __raw_readl((dev)->rtc_base + (reg))
53#define rtc_writel(dev, reg, val) \
54 __raw_writel((val), (dev)->rtc_base + (reg))
55
56struct lpc32xx_rtc {
57 void __iomem *rtc_base;
58 int irq;
59 unsigned char alarm_enabled;
60 struct rtc_device *rtc;
61 spinlock_t lock;
62};
63
64static int lpc32xx_rtc_read_time(struct device *dev, struct rtc_time *time)
65{
66 unsigned long elapsed_sec;
67 struct lpc32xx_rtc *rtc = dev_get_drvdata(dev);
68
69 elapsed_sec = rtc_readl(rtc, LPC32XX_RTC_UCOUNT);
70 rtc_time_to_tm(elapsed_sec, time);
71
72 return rtc_valid_tm(time);
73}
74
75static int lpc32xx_rtc_set_mmss(struct device *dev, unsigned long secs)
76{
77 struct lpc32xx_rtc *rtc = dev_get_drvdata(dev);
78 u32 tmp;
79
80 spin_lock_irq(&rtc->lock);
81
82 /* RTC must be disabled during count update */
83 tmp = rtc_readl(rtc, LPC32XX_RTC_CTRL);
84 rtc_writel(rtc, LPC32XX_RTC_CTRL, tmp | LPC32XX_RTC_CTRL_CNTR_DIS);
85 rtc_writel(rtc, LPC32XX_RTC_UCOUNT, secs);
86 rtc_writel(rtc, LPC32XX_RTC_DCOUNT, 0xFFFFFFFF - secs);
87 rtc_writel(rtc, LPC32XX_RTC_CTRL, tmp &= ~LPC32XX_RTC_CTRL_CNTR_DIS);
88
89 spin_unlock_irq(&rtc->lock);
90
91 return 0;
92}
93
94static int lpc32xx_rtc_read_alarm(struct device *dev,
95 struct rtc_wkalrm *wkalrm)
96{
97 struct lpc32xx_rtc *rtc = dev_get_drvdata(dev);
98
99 rtc_time_to_tm(rtc_readl(rtc, LPC32XX_RTC_MATCH0), &wkalrm->time);
100 wkalrm->enabled = rtc->alarm_enabled;
101 wkalrm->pending = !!(rtc_readl(rtc, LPC32XX_RTC_INTSTAT) &
102 LPC32XX_RTC_INTSTAT_MATCH0);
103
104 return rtc_valid_tm(&wkalrm->time);
105}
106
107static int lpc32xx_rtc_set_alarm(struct device *dev,
108 struct rtc_wkalrm *wkalrm)
109{
110 struct lpc32xx_rtc *rtc = dev_get_drvdata(dev);
111 unsigned long alarmsecs;
112 u32 tmp;
113 int ret;
114
115 ret = rtc_tm_to_time(&wkalrm->time, &alarmsecs);
116 if (ret < 0) {
117 dev_warn(dev, "Failed to convert time: %d\n", ret);
118 return ret;
119 }
120
121 spin_lock_irq(&rtc->lock);
122
123 /* Disable alarm during update */
124 tmp = rtc_readl(rtc, LPC32XX_RTC_CTRL);
125 rtc_writel(rtc, LPC32XX_RTC_CTRL, tmp & ~LPC32XX_RTC_CTRL_MATCH0);
126
127 rtc_writel(rtc, LPC32XX_RTC_MATCH0, alarmsecs);
128
129 rtc->alarm_enabled = wkalrm->enabled;
130 if (wkalrm->enabled) {
131 rtc_writel(rtc, LPC32XX_RTC_INTSTAT,
132 LPC32XX_RTC_INTSTAT_MATCH0);
133 rtc_writel(rtc, LPC32XX_RTC_CTRL, tmp |
134 LPC32XX_RTC_CTRL_MATCH0);
135 }
136
137 spin_unlock_irq(&rtc->lock);
138
139 return 0;
140}
141
142static int lpc32xx_rtc_alarm_irq_enable(struct device *dev,
143 unsigned int enabled)
144{
145 struct lpc32xx_rtc *rtc = dev_get_drvdata(dev);
146 u32 tmp;
147
148 spin_lock_irq(&rtc->lock);
149 tmp = rtc_readl(rtc, LPC32XX_RTC_CTRL);
150
151 if (enabled) {
152 rtc->alarm_enabled = 1;
153 tmp |= LPC32XX_RTC_CTRL_MATCH0;
154 } else {
155 rtc->alarm_enabled = 0;
156 tmp &= ~LPC32XX_RTC_CTRL_MATCH0;
157 }
158
159 rtc_writel(rtc, LPC32XX_RTC_CTRL, tmp);
160 spin_unlock_irq(&rtc->lock);
161
162 return 0;
163}
164
165static irqreturn_t lpc32xx_rtc_alarm_interrupt(int irq, void *dev)
166{
167 struct lpc32xx_rtc *rtc = dev;
168
169 spin_lock(&rtc->lock);
170
171 /* Disable alarm interrupt */
172 rtc_writel(rtc, LPC32XX_RTC_CTRL,
173 rtc_readl(rtc, LPC32XX_RTC_CTRL) &
174 ~LPC32XX_RTC_CTRL_MATCH0);
175 rtc->alarm_enabled = 0;
176
177 /*
178 * Write a large value to the match value so the RTC won't
179 * keep firing the match status
180 */
181 rtc_writel(rtc, LPC32XX_RTC_MATCH0, 0xFFFFFFFF);
182 rtc_writel(rtc, LPC32XX_RTC_INTSTAT, LPC32XX_RTC_INTSTAT_MATCH0);
183
184 spin_unlock(&rtc->lock);
185
186 rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
187
188 return IRQ_HANDLED;
189}
190
191static const struct rtc_class_ops lpc32xx_rtc_ops = {
192 .read_time = lpc32xx_rtc_read_time,
193 .set_mmss = lpc32xx_rtc_set_mmss,
194 .read_alarm = lpc32xx_rtc_read_alarm,
195 .set_alarm = lpc32xx_rtc_set_alarm,
196 .alarm_irq_enable = lpc32xx_rtc_alarm_irq_enable,
197};
198
199static int __devinit lpc32xx_rtc_probe(struct platform_device *pdev)
200{
201 struct resource *res;
202 struct lpc32xx_rtc *rtc;
203 resource_size_t size;
204 int rtcirq;
205 u32 tmp;
206
207 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
208 if (!res) {
209 dev_err(&pdev->dev, "Can't get memory resource\n");
210 return -ENOENT;
211 }
212
213 rtcirq = platform_get_irq(pdev, 0);
214 if (rtcirq < 0 || rtcirq >= NR_IRQS) {
215 dev_warn(&pdev->dev, "Can't get interrupt resource\n");
216 rtcirq = -1;
217 }
218
219 rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
220 if (unlikely(!rtc)) {
221 dev_err(&pdev->dev, "Can't allocate memory\n");
222 return -ENOMEM;
223 }
224 rtc->irq = rtcirq;
225
226 size = resource_size(res);
227
228 if (!devm_request_mem_region(&pdev->dev, res->start, size,
229 pdev->name)) {
230 dev_err(&pdev->dev, "RTC registers are not free\n");
231 return -EBUSY;
232 }
233
234 rtc->rtc_base = devm_ioremap(&pdev->dev, res->start, size);
235 if (!rtc->rtc_base) {
236 dev_err(&pdev->dev, "Can't map memory\n");
237 return -ENOMEM;
238 }
239
240 spin_lock_init(&rtc->lock);
241
242 /*
243 * The RTC is on a seperate power domain and can keep it's state
244 * across a chip power cycle. If the RTC has never been previously
245 * setup, then set it up now for the first time.
246 */
247 tmp = rtc_readl(rtc, LPC32XX_RTC_CTRL);
248 if (rtc_readl(rtc, LPC32XX_RTC_KEY) != LPC32XX_RTC_KEY_ONSW_LOADVAL) {
249 tmp &= ~(LPC32XX_RTC_CTRL_SW_RESET |
250 LPC32XX_RTC_CTRL_CNTR_DIS |
251 LPC32XX_RTC_CTRL_MATCH0 |
252 LPC32XX_RTC_CTRL_MATCH1 |
253 LPC32XX_RTC_CTRL_ONSW_MATCH0 |
254 LPC32XX_RTC_CTRL_ONSW_MATCH1 |
255 LPC32XX_RTC_CTRL_ONSW_FORCE_HI);
256 rtc_writel(rtc, LPC32XX_RTC_CTRL, tmp);
257
258 /* Clear latched interrupt states */
259 rtc_writel(rtc, LPC32XX_RTC_MATCH0, 0xFFFFFFFF);
260 rtc_writel(rtc, LPC32XX_RTC_INTSTAT,
261 LPC32XX_RTC_INTSTAT_MATCH0 |
262 LPC32XX_RTC_INTSTAT_MATCH1 |
263 LPC32XX_RTC_INTSTAT_ONSW);
264
265 /* Write key value to RTC so it won't reload on reset */
266 rtc_writel(rtc, LPC32XX_RTC_KEY,
267 LPC32XX_RTC_KEY_ONSW_LOADVAL);
268 } else {
269 rtc_writel(rtc, LPC32XX_RTC_CTRL,
270 tmp & ~LPC32XX_RTC_CTRL_MATCH0);
271 }
272
273 platform_set_drvdata(pdev, rtc);
274
275 rtc->rtc = rtc_device_register(RTC_NAME, &pdev->dev, &lpc32xx_rtc_ops,
276 THIS_MODULE);
277 if (IS_ERR(rtc->rtc)) {
278 dev_err(&pdev->dev, "Can't get RTC\n");
279 platform_set_drvdata(pdev, NULL);
280 return PTR_ERR(rtc->rtc);
281 }
282
283 /*
284 * IRQ is enabled after device registration in case alarm IRQ
285 * is pending upon suspend exit.
286 */
287 if (rtc->irq >= 0) {
288 if (devm_request_irq(&pdev->dev, rtc->irq,
289 lpc32xx_rtc_alarm_interrupt,
290 IRQF_DISABLED, pdev->name, rtc) < 0) {
291 dev_warn(&pdev->dev, "Can't request interrupt.\n");
292 rtc->irq = -1;
293 } else {
294 device_init_wakeup(&pdev->dev, 1);
295 }
296 }
297
298 return 0;
299}
300
301static int __devexit lpc32xx_rtc_remove(struct platform_device *pdev)
302{
303 struct lpc32xx_rtc *rtc = platform_get_drvdata(pdev);
304
305 if (rtc->irq >= 0)
306 device_init_wakeup(&pdev->dev, 0);
307
308 platform_set_drvdata(pdev, NULL);
309 rtc_device_unregister(rtc->rtc);
310
311 return 0;
312}
313
314#ifdef CONFIG_PM
315static int lpc32xx_rtc_suspend(struct device *dev)
316{
317 struct platform_device *pdev = to_platform_device(dev);
318 struct lpc32xx_rtc *rtc = platform_get_drvdata(pdev);
319
320 if (rtc->irq >= 0) {
321 if (device_may_wakeup(&pdev->dev))
322 enable_irq_wake(rtc->irq);
323 else
324 disable_irq_wake(rtc->irq);
325 }
326
327 return 0;
328}
329
330static int lpc32xx_rtc_resume(struct device *dev)
331{
332 struct platform_device *pdev = to_platform_device(dev);
333 struct lpc32xx_rtc *rtc = platform_get_drvdata(pdev);
334
335 if (rtc->irq >= 0 && device_may_wakeup(&pdev->dev))
336 disable_irq_wake(rtc->irq);
337
338 return 0;
339}
340
341/* Unconditionally disable the alarm */
342static int lpc32xx_rtc_freeze(struct device *dev)
343{
344 struct platform_device *pdev = to_platform_device(dev);
345 struct lpc32xx_rtc *rtc = platform_get_drvdata(pdev);
346
347 spin_lock_irq(&rtc->lock);
348
349 rtc_writel(rtc, LPC32XX_RTC_CTRL,
350 rtc_readl(rtc, LPC32XX_RTC_CTRL) &
351 ~LPC32XX_RTC_CTRL_MATCH0);
352
353 spin_unlock_irq(&rtc->lock);
354
355 return 0;
356}
357
358static int lpc32xx_rtc_thaw(struct device *dev)
359{
360 struct platform_device *pdev = to_platform_device(dev);
361 struct lpc32xx_rtc *rtc = platform_get_drvdata(pdev);
362
363 if (rtc->alarm_enabled) {
364 spin_lock_irq(&rtc->lock);
365
366 rtc_writel(rtc, LPC32XX_RTC_CTRL,
367 rtc_readl(rtc, LPC32XX_RTC_CTRL) |
368 LPC32XX_RTC_CTRL_MATCH0);
369
370 spin_unlock_irq(&rtc->lock);
371 }
372
373 return 0;
374}
375
376static const struct dev_pm_ops lpc32xx_rtc_pm_ops = {
377 .suspend = lpc32xx_rtc_suspend,
378 .resume = lpc32xx_rtc_resume,
379 .freeze = lpc32xx_rtc_freeze,
380 .thaw = lpc32xx_rtc_thaw,
381 .restore = lpc32xx_rtc_resume
382};
383
384#define LPC32XX_RTC_PM_OPS (&lpc32xx_rtc_pm_ops)
385#else
386#define LPC32XX_RTC_PM_OPS NULL
387#endif
388
389static struct platform_driver lpc32xx_rtc_driver = {
390 .probe = lpc32xx_rtc_probe,
391 .remove = __devexit_p(lpc32xx_rtc_remove),
392 .driver = {
393 .name = RTC_NAME,
394 .owner = THIS_MODULE,
395 .pm = LPC32XX_RTC_PM_OPS
396 },
397};
398
399static int __init lpc32xx_rtc_init(void)
400{
401 return platform_driver_register(&lpc32xx_rtc_driver);
402}
403module_init(lpc32xx_rtc_init);
404
405static void __exit lpc32xx_rtc_exit(void)
406{
407 platform_driver_unregister(&lpc32xx_rtc_driver);
408}
409module_exit(lpc32xx_rtc_exit);
410
411MODULE_AUTHOR("Kevin Wells <wellsk40@gmail.com");
412MODULE_DESCRIPTION("RTC driver for the LPC32xx SoC");
413MODULE_LICENSE("GPL");
414MODULE_ALIAS("platform:rtc-lpc32xx");
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index 64d9727b7229..73377b0d65da 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -34,7 +34,8 @@
34 * Board-specific wiring options include using split power mode with 34 * Board-specific wiring options include using split power mode with
35 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset), 35 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
36 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from 36 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
37 * low power modes). See the BOARD-SPECIFIC CUSTOMIZATION comment. 37 * low power modes) for OMAP1 boards (OMAP-L138 has this built into
38 * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
38 */ 39 */
39 40
40#define OMAP_RTC_BASE 0xfffb4800 41#define OMAP_RTC_BASE 0xfffb4800
@@ -401,16 +402,17 @@ static int __init omap_rtc_probe(struct platform_device *pdev)
401 402
402 /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE: 403 /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
403 * 404 *
404 * - Boards wired so that RTC_WAKE_INT does something, and muxed 405 * - Device wake-up capability setting should come through chip
405 * right (W13_1610_RTC_WAKE_INT is the default after chip reset), 406 * init logic. OMAP1 boards should initialize the "wakeup capable"
406 * should initialize the device wakeup flag appropriately. 407 * flag in the platform device if the board is wired right for
408 * being woken up by RTC alarm. For OMAP-L138, this capability
409 * is built into the SoC by the "Deep Sleep" capability.
407 * 410 *
408 * - Boards wired so RTC_ON_nOFF is used as the reset signal, 411 * - Boards wired so RTC_ON_nOFF is used as the reset signal,
409 * rather than nPWRON_RESET, should forcibly enable split 412 * rather than nPWRON_RESET, should forcibly enable split
410 * power mode. (Some chip errata report that RTC_CTRL_SPLIT 413 * power mode. (Some chip errata report that RTC_CTRL_SPLIT
411 * is write-only, and always reads as zero...) 414 * is write-only, and always reads as zero...)
412 */ 415 */
413 device_init_wakeup(&pdev->dev, 0);
414 416
415 if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT) 417 if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
416 pr_info("%s: split power mode\n", pdev->name); 418 pr_info("%s: split power mode\n", pdev->name);
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index f57a87f4ae96..cf953ecbfca9 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -100,7 +100,7 @@ static int s3c_rtc_setpie(struct device *dev, int enabled)
100 spin_lock_irq(&s3c_rtc_pie_lock); 100 spin_lock_irq(&s3c_rtc_pie_lock);
101 101
102 if (s3c_rtc_cpu_type == TYPE_S3C64XX) { 102 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
103 tmp = readb(s3c_rtc_base + S3C2410_RTCCON); 103 tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
104 tmp &= ~S3C64XX_RTCCON_TICEN; 104 tmp &= ~S3C64XX_RTCCON_TICEN;
105 105
106 if (enabled) 106 if (enabled)
@@ -171,8 +171,8 @@ static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
171 goto retry_get_time; 171 goto retry_get_time;
172 } 172 }
173 173
174 pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n", 174 pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n",
175 rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday, 175 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
176 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec); 176 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
177 177
178 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec); 178 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
@@ -185,7 +185,7 @@ static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
185 rtc_tm->tm_year += 100; 185 rtc_tm->tm_year += 100;
186 rtc_tm->tm_mon -= 1; 186 rtc_tm->tm_mon -= 1;
187 187
188 return 0; 188 return rtc_valid_tm(rtc_tm);
189} 189}
190 190
191static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) 191static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
@@ -193,8 +193,8 @@ static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
193 void __iomem *base = s3c_rtc_base; 193 void __iomem *base = s3c_rtc_base;
194 int year = tm->tm_year - 100; 194 int year = tm->tm_year - 100;
195 195
196 pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n", 196 pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n",
197 tm->tm_year, tm->tm_mon, tm->tm_mday, 197 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
198 tm->tm_hour, tm->tm_min, tm->tm_sec); 198 tm->tm_hour, tm->tm_min, tm->tm_sec);
199 199
200 /* we get around y2k by simply not supporting it */ 200 /* we get around y2k by simply not supporting it */
@@ -231,9 +231,9 @@ static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
231 231
232 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0; 232 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
233 233
234 pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n", 234 pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
235 alm_en, 235 alm_en,
236 alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday, 236 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
237 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec); 237 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
238 238
239 239
@@ -242,34 +242,34 @@ static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
242 if (alm_en & S3C2410_RTCALM_SECEN) 242 if (alm_en & S3C2410_RTCALM_SECEN)
243 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec); 243 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
244 else 244 else
245 alm_tm->tm_sec = 0xff; 245 alm_tm->tm_sec = -1;
246 246
247 if (alm_en & S3C2410_RTCALM_MINEN) 247 if (alm_en & S3C2410_RTCALM_MINEN)
248 alm_tm->tm_min = bcd2bin(alm_tm->tm_min); 248 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
249 else 249 else
250 alm_tm->tm_min = 0xff; 250 alm_tm->tm_min = -1;
251 251
252 if (alm_en & S3C2410_RTCALM_HOUREN) 252 if (alm_en & S3C2410_RTCALM_HOUREN)
253 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour); 253 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
254 else 254 else
255 alm_tm->tm_hour = 0xff; 255 alm_tm->tm_hour = -1;
256 256
257 if (alm_en & S3C2410_RTCALM_DAYEN) 257 if (alm_en & S3C2410_RTCALM_DAYEN)
258 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday); 258 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
259 else 259 else
260 alm_tm->tm_mday = 0xff; 260 alm_tm->tm_mday = -1;
261 261
262 if (alm_en & S3C2410_RTCALM_MONEN) { 262 if (alm_en & S3C2410_RTCALM_MONEN) {
263 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon); 263 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
264 alm_tm->tm_mon -= 1; 264 alm_tm->tm_mon -= 1;
265 } else { 265 } else {
266 alm_tm->tm_mon = 0xff; 266 alm_tm->tm_mon = -1;
267 } 267 }
268 268
269 if (alm_en & S3C2410_RTCALM_YEAREN) 269 if (alm_en & S3C2410_RTCALM_YEAREN)
270 alm_tm->tm_year = bcd2bin(alm_tm->tm_year); 270 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
271 else 271 else
272 alm_tm->tm_year = 0xffff; 272 alm_tm->tm_year = -1;
273 273
274 return 0; 274 return 0;
275} 275}
@@ -280,10 +280,10 @@ static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
280 void __iomem *base = s3c_rtc_base; 280 void __iomem *base = s3c_rtc_base;
281 unsigned int alrm_en; 281 unsigned int alrm_en;
282 282
283 pr_debug("s3c_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n", 283 pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
284 alrm->enabled, 284 alrm->enabled,
285 tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff, 285 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
286 tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec); 286 tm->tm_hour, tm->tm_min, tm->tm_sec);
287 287
288 288
289 alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; 289 alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
@@ -318,7 +318,7 @@ static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
318 unsigned int ticnt; 318 unsigned int ticnt;
319 319
320 if (s3c_rtc_cpu_type == TYPE_S3C64XX) { 320 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
321 ticnt = readb(s3c_rtc_base + S3C2410_RTCCON); 321 ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
322 ticnt &= S3C64XX_RTCCON_TICEN; 322 ticnt &= S3C64XX_RTCCON_TICEN;
323 } else { 323 } else {
324 ticnt = readb(s3c_rtc_base + S3C2410_TICNT); 324 ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
@@ -379,7 +379,8 @@ static const struct rtc_class_ops s3c_rtcops = {
379 .set_alarm = s3c_rtc_setalarm, 379 .set_alarm = s3c_rtc_setalarm,
380 .irq_set_freq = s3c_rtc_setfreq, 380 .irq_set_freq = s3c_rtc_setfreq,
381 .irq_set_state = s3c_rtc_setpie, 381 .irq_set_state = s3c_rtc_setpie,
382 .proc = s3c_rtc_proc, 382 .proc = s3c_rtc_proc,
383 .alarm_irq_enable = s3c_rtc_setaie,
383}; 384};
384 385
385static void s3c_rtc_enable(struct platform_device *pdev, int en) 386static void s3c_rtc_enable(struct platform_device *pdev, int en)
@@ -391,11 +392,11 @@ static void s3c_rtc_enable(struct platform_device *pdev, int en)
391 return; 392 return;
392 393
393 if (!en) { 394 if (!en) {
394 tmp = readb(base + S3C2410_RTCCON); 395 tmp = readw(base + S3C2410_RTCCON);
395 if (s3c_rtc_cpu_type == TYPE_S3C64XX) 396 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
396 tmp &= ~S3C64XX_RTCCON_TICEN; 397 tmp &= ~S3C64XX_RTCCON_TICEN;
397 tmp &= ~S3C2410_RTCCON_RTCEN; 398 tmp &= ~S3C2410_RTCCON_RTCEN;
398 writeb(tmp, base + S3C2410_RTCCON); 399 writew(tmp, base + S3C2410_RTCCON);
399 400
400 if (s3c_rtc_cpu_type == TYPE_S3C2410) { 401 if (s3c_rtc_cpu_type == TYPE_S3C2410) {
401 tmp = readb(base + S3C2410_TICNT); 402 tmp = readb(base + S3C2410_TICNT);
@@ -405,25 +406,28 @@ static void s3c_rtc_enable(struct platform_device *pdev, int en)
405 } else { 406 } else {
406 /* re-enable the device, and check it is ok */ 407 /* re-enable the device, and check it is ok */
407 408
408 if ((readb(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0){ 409 if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
409 dev_info(&pdev->dev, "rtc disabled, re-enabling\n"); 410 dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
410 411
411 tmp = readb(base + S3C2410_RTCCON); 412 tmp = readw(base + S3C2410_RTCCON);
412 writeb(tmp|S3C2410_RTCCON_RTCEN, base+S3C2410_RTCCON); 413 writew(tmp | S3C2410_RTCCON_RTCEN,
414 base + S3C2410_RTCCON);
413 } 415 }
414 416
415 if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)){ 417 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
416 dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n"); 418 dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
417 419
418 tmp = readb(base + S3C2410_RTCCON); 420 tmp = readw(base + S3C2410_RTCCON);
419 writeb(tmp& ~S3C2410_RTCCON_CNTSEL, base+S3C2410_RTCCON); 421 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
422 base + S3C2410_RTCCON);
420 } 423 }
421 424
422 if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)){ 425 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
423 dev_info(&pdev->dev, "removing RTCCON_CLKRST\n"); 426 dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
424 427
425 tmp = readb(base + S3C2410_RTCCON); 428 tmp = readw(base + S3C2410_RTCCON);
426 writeb(tmp & ~S3C2410_RTCCON_CLKRST, base+S3C2410_RTCCON); 429 writew(tmp & ~S3C2410_RTCCON_CLKRST,
430 base + S3C2410_RTCCON);
427 } 431 }
428 } 432 }
429} 433}
@@ -452,8 +456,8 @@ static int __devexit s3c_rtc_remove(struct platform_device *dev)
452static int __devinit s3c_rtc_probe(struct platform_device *pdev) 456static int __devinit s3c_rtc_probe(struct platform_device *pdev)
453{ 457{
454 struct rtc_device *rtc; 458 struct rtc_device *rtc;
459 struct rtc_time rtc_tm;
455 struct resource *res; 460 struct resource *res;
456 unsigned int tmp, i;
457 int ret; 461 int ret;
458 462
459 pr_debug("%s: probe=%p\n", __func__, pdev); 463 pr_debug("%s: probe=%p\n", __func__, pdev);
@@ -514,8 +518,8 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
514 518
515 s3c_rtc_enable(pdev, 1); 519 s3c_rtc_enable(pdev, 1);
516 520
517 pr_debug("s3c2410_rtc: RTCCON=%02x\n", 521 pr_debug("s3c2410_rtc: RTCCON=%02x\n",
518 readb(s3c_rtc_base + S3C2410_RTCCON)); 522 readw(s3c_rtc_base + S3C2410_RTCCON));
519 523
520 device_init_wakeup(&pdev->dev, 1); 524 device_init_wakeup(&pdev->dev, 1);
521 525
@@ -534,11 +538,19 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
534 538
535 /* Check RTC Time */ 539 /* Check RTC Time */
536 540
537 for (i = S3C2410_RTCSEC; i <= S3C2410_RTCYEAR; i += 0x4) { 541 s3c_rtc_gettime(NULL, &rtc_tm);
538 tmp = readb(s3c_rtc_base + i); 542
543 if (rtc_valid_tm(&rtc_tm)) {
544 rtc_tm.tm_year = 100;
545 rtc_tm.tm_mon = 0;
546 rtc_tm.tm_mday = 1;
547 rtc_tm.tm_hour = 0;
548 rtc_tm.tm_min = 0;
549 rtc_tm.tm_sec = 0;
550
551 s3c_rtc_settime(NULL, &rtc_tm);
539 552
540 if ((tmp & 0xf) > 0x9 || ((tmp >> 4) & 0xf) > 0x9) 553 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
541 writeb(0, s3c_rtc_base + i);
542 } 554 }
543 555
544 if (s3c_rtc_cpu_type == TYPE_S3C64XX) 556 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
@@ -578,7 +590,7 @@ static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
578 /* save TICNT for anyone using periodic interrupts */ 590 /* save TICNT for anyone using periodic interrupts */
579 ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT); 591 ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
580 if (s3c_rtc_cpu_type == TYPE_S3C64XX) { 592 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
581 ticnt_en_save = readb(s3c_rtc_base + S3C2410_RTCCON); 593 ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
582 ticnt_en_save &= S3C64XX_RTCCON_TICEN; 594 ticnt_en_save &= S3C64XX_RTCCON_TICEN;
583 } 595 }
584 s3c_rtc_enable(pdev, 0); 596 s3c_rtc_enable(pdev, 0);
@@ -596,8 +608,8 @@ static int s3c_rtc_resume(struct platform_device *pdev)
596 s3c_rtc_enable(pdev, 1); 608 s3c_rtc_enable(pdev, 1);
597 writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT); 609 writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
598 if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) { 610 if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
599 tmp = readb(s3c_rtc_base + S3C2410_RTCCON); 611 tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
600 writeb(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON); 612 writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
601 } 613 }
602 614
603 if (device_may_wakeup(&pdev->dev)) 615 if (device_may_wakeup(&pdev->dev))