diff options
author | Chanwoo Choi <cw00.choi@samsung.com> | 2014-10-13 18:52:28 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-10-13 20:18:17 -0400 |
commit | 19be09f51d36101e4dc1577eb73ff8397bedd0a3 (patch) | |
tree | c276a76314358e8236ae637f75fffd151ac0df8c /drivers/rtc | |
parent | 473b86451276d6d342ecd26d5e503163c30ea974 (diff) |
rtc: s3c: define s3c_rtc structure to remove global variables.
Define s3c_rtc structure including necessary variables for S3C RTC device
instead of global variables. This patch improves the readability by
removing global variables.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/rtc')
-rw-r--r-- | drivers/rtc/rtc-s3c.c | 431 |
1 files changed, 216 insertions, 215 deletions
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c index 4958a363b2c7..2f71b13c00d6 100644 --- a/drivers/rtc/rtc-s3c.c +++ b/drivers/rtc/rtc-s3c.c | |||
@@ -43,125 +43,132 @@ struct s3c_rtc_drv_data { | |||
43 | int cpu_type; | 43 | int cpu_type; |
44 | }; | 44 | }; |
45 | 45 | ||
46 | /* I have yet to find an S3C implementation with more than one | 46 | struct s3c_rtc { |
47 | * of these rtc blocks in */ | 47 | struct device *dev; |
48 | struct rtc_device *rtc; | ||
49 | |||
50 | void __iomem *base; | ||
51 | struct clk *rtc_clk; | ||
52 | bool enabled; | ||
53 | |||
54 | enum s3c_cpu_type cpu_type; | ||
48 | 55 | ||
49 | static struct clk *rtc_clk; | 56 | int irq_alarm; |
50 | static void __iomem *s3c_rtc_base; | 57 | int irq_tick; |
51 | static int s3c_rtc_alarmno; | ||
52 | static int s3c_rtc_tickno; | ||
53 | static enum s3c_cpu_type s3c_rtc_cpu_type; | ||
54 | 58 | ||
55 | static DEFINE_SPINLOCK(s3c_rtc_pie_lock); | 59 | spinlock_t pie_lock; |
60 | spinlock_t alarm_clk_lock; | ||
56 | 61 | ||
57 | static void s3c_rtc_alarm_clk_enable(bool enable) | 62 | int ticnt_save, ticnt_en_save; |
63 | bool wake_en; | ||
64 | }; | ||
65 | |||
66 | static void s3c_rtc_alarm_clk_enable(struct s3c_rtc *info, bool enable) | ||
58 | { | 67 | { |
59 | static DEFINE_SPINLOCK(s3c_rtc_alarm_clk_lock); | ||
60 | static bool alarm_clk_enabled; | ||
61 | unsigned long irq_flags; | 68 | unsigned long irq_flags; |
62 | 69 | ||
63 | spin_lock_irqsave(&s3c_rtc_alarm_clk_lock, irq_flags); | 70 | spin_lock_irqsave(&info->alarm_clk_lock, irq_flags); |
64 | if (enable) { | 71 | if (enable) { |
65 | if (!alarm_clk_enabled) { | 72 | if (!info->enabled) { |
66 | clk_enable(rtc_clk); | 73 | clk_enable(info->rtc_clk); |
67 | alarm_clk_enabled = true; | 74 | info->enabled = true; |
68 | } | 75 | } |
69 | } else { | 76 | } else { |
70 | if (alarm_clk_enabled) { | 77 | if (info->enabled) { |
71 | clk_disable(rtc_clk); | 78 | clk_disable(info->rtc_clk); |
72 | alarm_clk_enabled = false; | 79 | info->enabled = false; |
73 | } | 80 | } |
74 | } | 81 | } |
75 | spin_unlock_irqrestore(&s3c_rtc_alarm_clk_lock, irq_flags); | 82 | spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags); |
76 | } | 83 | } |
77 | 84 | ||
78 | /* IRQ Handlers */ | 85 | /* IRQ Handlers */ |
79 | |||
80 | static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) | 86 | static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) |
81 | { | 87 | { |
82 | struct rtc_device *rdev = id; | 88 | struct s3c_rtc *info = (struct s3c_rtc *)id; |
83 | 89 | ||
84 | clk_enable(rtc_clk); | 90 | clk_enable(info->rtc_clk); |
85 | rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF); | 91 | rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF); |
86 | 92 | ||
87 | if (s3c_rtc_cpu_type == TYPE_S3C64XX) | 93 | if (info->cpu_type == TYPE_S3C64XX) |
88 | writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP); | 94 | writeb(S3C2410_INTP_ALM, info->base + S3C2410_INTP); |
89 | 95 | ||
90 | clk_disable(rtc_clk); | 96 | clk_disable(info->rtc_clk); |
91 | 97 | ||
92 | s3c_rtc_alarm_clk_enable(false); | 98 | s3c_rtc_alarm_clk_enable(info, false); |
93 | 99 | ||
94 | return IRQ_HANDLED; | 100 | return IRQ_HANDLED; |
95 | } | 101 | } |
96 | 102 | ||
97 | static irqreturn_t s3c_rtc_tickirq(int irq, void *id) | 103 | static irqreturn_t s3c_rtc_tickirq(int irq, void *id) |
98 | { | 104 | { |
99 | struct rtc_device *rdev = id; | 105 | struct s3c_rtc *info = (struct s3c_rtc *)id; |
100 | 106 | ||
101 | clk_enable(rtc_clk); | 107 | clk_enable(info->rtc_clk); |
102 | rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF); | 108 | rtc_update_irq(info->rtc, 1, RTC_PF | RTC_IRQF); |
103 | 109 | ||
104 | if (s3c_rtc_cpu_type == TYPE_S3C64XX) | 110 | if (info->cpu_type == TYPE_S3C64XX) |
105 | writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP); | 111 | writeb(S3C2410_INTP_TIC, info->base + S3C2410_INTP); |
112 | |||
113 | clk_disable(info->rtc_clk); | ||
106 | 114 | ||
107 | clk_disable(rtc_clk); | ||
108 | return IRQ_HANDLED; | 115 | return IRQ_HANDLED; |
109 | } | 116 | } |
110 | 117 | ||
111 | /* Update control registers */ | 118 | /* Update control registers */ |
112 | static int s3c_rtc_setaie(struct device *dev, unsigned int enabled) | 119 | static int s3c_rtc_setaie(struct device *dev, unsigned int enabled) |
113 | { | 120 | { |
121 | struct s3c_rtc *info = dev_get_drvdata(dev); | ||
114 | unsigned int tmp; | 122 | unsigned int tmp; |
115 | 123 | ||
116 | dev_dbg(dev, "%s: aie=%d\n", __func__, enabled); | 124 | dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled); |
117 | 125 | ||
118 | clk_enable(rtc_clk); | 126 | clk_enable(info->rtc_clk); |
119 | tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; | 127 | tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; |
120 | 128 | ||
121 | if (enabled) | 129 | if (enabled) |
122 | tmp |= S3C2410_RTCALM_ALMEN; | 130 | tmp |= S3C2410_RTCALM_ALMEN; |
123 | 131 | ||
124 | writeb(tmp, s3c_rtc_base + S3C2410_RTCALM); | 132 | writeb(tmp, info->base + S3C2410_RTCALM); |
125 | clk_disable(rtc_clk); | 133 | clk_disable(info->rtc_clk); |
126 | 134 | ||
127 | s3c_rtc_alarm_clk_enable(enabled); | 135 | s3c_rtc_alarm_clk_enable(info, enabled); |
128 | 136 | ||
129 | return 0; | 137 | return 0; |
130 | } | 138 | } |
131 | 139 | ||
132 | static int s3c_rtc_setfreq(struct device *dev, int freq) | 140 | static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq) |
133 | { | 141 | { |
134 | struct platform_device *pdev = to_platform_device(dev); | ||
135 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | ||
136 | unsigned int tmp = 0; | 142 | unsigned int tmp = 0; |
137 | int val; | 143 | int val; |
138 | 144 | ||
139 | if (!is_power_of_2(freq)) | 145 | if (!is_power_of_2(freq)) |
140 | return -EINVAL; | 146 | return -EINVAL; |
141 | 147 | ||
142 | clk_enable(rtc_clk); | 148 | clk_enable(info->rtc_clk); |
143 | spin_lock_irq(&s3c_rtc_pie_lock); | 149 | spin_lock_irq(&info->pie_lock); |
144 | 150 | ||
145 | if (s3c_rtc_cpu_type != TYPE_S3C64XX) { | 151 | if (info->cpu_type != TYPE_S3C64XX) { |
146 | tmp = readb(s3c_rtc_base + S3C2410_TICNT); | 152 | tmp = readb(info->base + S3C2410_TICNT); |
147 | tmp &= S3C2410_TICNT_ENABLE; | 153 | tmp &= S3C2410_TICNT_ENABLE; |
148 | } | 154 | } |
149 | 155 | ||
150 | val = (rtc_dev->max_user_freq / freq) - 1; | 156 | val = (info->rtc->max_user_freq / freq) - 1; |
151 | 157 | ||
152 | if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) { | 158 | if (info->cpu_type == TYPE_S3C2416 || info->cpu_type == TYPE_S3C2443) { |
153 | tmp |= S3C2443_TICNT_PART(val); | 159 | tmp |= S3C2443_TICNT_PART(val); |
154 | writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1); | 160 | writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1); |
155 | 161 | ||
156 | if (s3c_rtc_cpu_type == TYPE_S3C2416) | 162 | if (info->cpu_type == TYPE_S3C2416) |
157 | writel(S3C2416_TICNT2_PART(val), s3c_rtc_base + S3C2416_TICNT2); | 163 | writel(S3C2416_TICNT2_PART(val), |
164 | info->base + S3C2416_TICNT2); | ||
158 | } else { | 165 | } else { |
159 | tmp |= val; | 166 | tmp |= val; |
160 | } | 167 | } |
161 | 168 | ||
162 | writel(tmp, s3c_rtc_base + S3C2410_TICNT); | 169 | writel(tmp, info->base + S3C2410_TICNT); |
163 | spin_unlock_irq(&s3c_rtc_pie_lock); | 170 | spin_unlock_irq(&info->pie_lock); |
164 | clk_disable(rtc_clk); | 171 | clk_disable(info->rtc_clk); |
165 | 172 | ||
166 | return 0; | 173 | return 0; |
167 | } | 174 | } |
@@ -170,17 +177,17 @@ static int s3c_rtc_setfreq(struct device *dev, int freq) | |||
170 | 177 | ||
171 | static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) | 178 | static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) |
172 | { | 179 | { |
180 | struct s3c_rtc *info = dev_get_drvdata(dev); | ||
173 | unsigned int have_retried = 0; | 181 | unsigned int have_retried = 0; |
174 | void __iomem *base = s3c_rtc_base; | ||
175 | 182 | ||
176 | clk_enable(rtc_clk); | 183 | clk_enable(info->rtc_clk); |
177 | retry_get_time: | 184 | retry_get_time: |
178 | rtc_tm->tm_min = readb(base + S3C2410_RTCMIN); | 185 | rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN); |
179 | rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR); | 186 | rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR); |
180 | rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE); | 187 | rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE); |
181 | rtc_tm->tm_mon = readb(base + S3C2410_RTCMON); | 188 | rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON); |
182 | rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR); | 189 | rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR); |
183 | rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC); | 190 | rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC); |
184 | 191 | ||
185 | /* the only way to work out whether the system was mid-update | 192 | /* the only way to work out whether the system was mid-update |
186 | * when we read it is to check the second counter, and if it | 193 | * when we read it is to check the second counter, and if it |
@@ -207,13 +214,14 @@ static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) | |||
207 | 214 | ||
208 | rtc_tm->tm_mon -= 1; | 215 | rtc_tm->tm_mon -= 1; |
209 | 216 | ||
210 | clk_disable(rtc_clk); | 217 | clk_disable(info->rtc_clk); |
218 | |||
211 | return rtc_valid_tm(rtc_tm); | 219 | return rtc_valid_tm(rtc_tm); |
212 | } | 220 | } |
213 | 221 | ||
214 | static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) | 222 | static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) |
215 | { | 223 | { |
216 | void __iomem *base = s3c_rtc_base; | 224 | struct s3c_rtc *info = dev_get_drvdata(dev); |
217 | int year = tm->tm_year - 100; | 225 | int year = tm->tm_year - 100; |
218 | 226 | ||
219 | dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n", | 227 | dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n", |
@@ -227,33 +235,35 @@ static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) | |||
227 | return -EINVAL; | 235 | return -EINVAL; |
228 | } | 236 | } |
229 | 237 | ||
230 | clk_enable(rtc_clk); | 238 | clk_enable(info->rtc_clk); |
231 | writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC); | 239 | |
232 | writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN); | 240 | writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC); |
233 | writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR); | 241 | writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN); |
234 | writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE); | 242 | writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR); |
235 | writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON); | 243 | writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE); |
236 | writeb(bin2bcd(year), base + S3C2410_RTCYEAR); | 244 | writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON); |
237 | clk_disable(rtc_clk); | 245 | writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR); |
246 | |||
247 | clk_disable(info->rtc_clk); | ||
238 | 248 | ||
239 | return 0; | 249 | return 0; |
240 | } | 250 | } |
241 | 251 | ||
242 | static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm) | 252 | static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm) |
243 | { | 253 | { |
254 | struct s3c_rtc *info = dev_get_drvdata(dev); | ||
244 | struct rtc_time *alm_tm = &alrm->time; | 255 | struct rtc_time *alm_tm = &alrm->time; |
245 | void __iomem *base = s3c_rtc_base; | ||
246 | unsigned int alm_en; | 256 | unsigned int alm_en; |
247 | 257 | ||
248 | clk_enable(rtc_clk); | 258 | clk_enable(info->rtc_clk); |
249 | alm_tm->tm_sec = readb(base + S3C2410_ALMSEC); | 259 | alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC); |
250 | alm_tm->tm_min = readb(base + S3C2410_ALMMIN); | 260 | alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN); |
251 | alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR); | 261 | alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR); |
252 | alm_tm->tm_mon = readb(base + S3C2410_ALMMON); | 262 | alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON); |
253 | alm_tm->tm_mday = readb(base + S3C2410_ALMDATE); | 263 | alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE); |
254 | alm_tm->tm_year = readb(base + S3C2410_ALMYEAR); | 264 | alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR); |
255 | 265 | ||
256 | alm_en = readb(base + S3C2410_RTCALM); | 266 | alm_en = readb(info->base + S3C2410_RTCALM); |
257 | 267 | ||
258 | alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0; | 268 | alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0; |
259 | 269 | ||
@@ -297,65 +307,67 @@ static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
297 | else | 307 | else |
298 | alm_tm->tm_year = -1; | 308 | alm_tm->tm_year = -1; |
299 | 309 | ||
300 | clk_disable(rtc_clk); | 310 | clk_disable(info->rtc_clk); |
301 | return 0; | 311 | return 0; |
302 | } | 312 | } |
303 | 313 | ||
304 | static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | 314 | static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) |
305 | { | 315 | { |
316 | struct s3c_rtc *info = dev_get_drvdata(dev); | ||
306 | struct rtc_time *tm = &alrm->time; | 317 | struct rtc_time *tm = &alrm->time; |
307 | void __iomem *base = s3c_rtc_base; | ||
308 | unsigned int alrm_en; | 318 | unsigned int alrm_en; |
309 | 319 | ||
310 | clk_enable(rtc_clk); | 320 | clk_enable(info->rtc_clk); |
311 | dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n", | 321 | dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n", |
312 | alrm->enabled, | 322 | alrm->enabled, |
313 | 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday, | 323 | 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday, |
314 | tm->tm_hour, tm->tm_min, tm->tm_sec); | 324 | tm->tm_hour, tm->tm_min, tm->tm_sec); |
315 | 325 | ||
316 | alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; | 326 | alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; |
317 | writeb(0x00, base + S3C2410_RTCALM); | 327 | writeb(0x00, info->base + S3C2410_RTCALM); |
318 | 328 | ||
319 | if (tm->tm_sec < 60 && tm->tm_sec >= 0) { | 329 | if (tm->tm_sec < 60 && tm->tm_sec >= 0) { |
320 | alrm_en |= S3C2410_RTCALM_SECEN; | 330 | alrm_en |= S3C2410_RTCALM_SECEN; |
321 | writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC); | 331 | writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC); |
322 | } | 332 | } |
323 | 333 | ||
324 | if (tm->tm_min < 60 && tm->tm_min >= 0) { | 334 | if (tm->tm_min < 60 && tm->tm_min >= 0) { |
325 | alrm_en |= S3C2410_RTCALM_MINEN; | 335 | alrm_en |= S3C2410_RTCALM_MINEN; |
326 | writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN); | 336 | writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN); |
327 | } | 337 | } |
328 | 338 | ||
329 | if (tm->tm_hour < 24 && tm->tm_hour >= 0) { | 339 | if (tm->tm_hour < 24 && tm->tm_hour >= 0) { |
330 | alrm_en |= S3C2410_RTCALM_HOUREN; | 340 | alrm_en |= S3C2410_RTCALM_HOUREN; |
331 | writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR); | 341 | writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR); |
332 | } | 342 | } |
333 | 343 | ||
334 | dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en); | 344 | dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en); |
335 | 345 | ||
336 | writeb(alrm_en, base + S3C2410_RTCALM); | 346 | writeb(alrm_en, info->base + S3C2410_RTCALM); |
337 | 347 | ||
338 | s3c_rtc_setaie(dev, alrm->enabled); | 348 | s3c_rtc_setaie(dev, alrm->enabled); |
339 | 349 | ||
340 | clk_disable(rtc_clk); | 350 | clk_disable(info->rtc_clk); |
351 | |||
341 | return 0; | 352 | return 0; |
342 | } | 353 | } |
343 | 354 | ||
344 | static int s3c_rtc_proc(struct device *dev, struct seq_file *seq) | 355 | static int s3c_rtc_proc(struct device *dev, struct seq_file *seq) |
345 | { | 356 | { |
357 | struct s3c_rtc *info = dev_get_drvdata(dev); | ||
346 | unsigned int ticnt; | 358 | unsigned int ticnt; |
347 | 359 | ||
348 | clk_enable(rtc_clk); | 360 | clk_enable(info->rtc_clk); |
349 | if (s3c_rtc_cpu_type == TYPE_S3C64XX) { | 361 | if (info->cpu_type == TYPE_S3C64XX) { |
350 | ticnt = readw(s3c_rtc_base + S3C2410_RTCCON); | 362 | ticnt = readw(info->base + S3C2410_RTCCON); |
351 | ticnt &= S3C64XX_RTCCON_TICEN; | 363 | ticnt &= S3C64XX_RTCCON_TICEN; |
352 | } else { | 364 | } else { |
353 | ticnt = readb(s3c_rtc_base + S3C2410_TICNT); | 365 | ticnt = readb(info->base + S3C2410_TICNT); |
354 | ticnt &= S3C2410_TICNT_ENABLE; | 366 | ticnt &= S3C2410_TICNT_ENABLE; |
355 | } | 367 | } |
356 | 368 | ||
357 | seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no"); | 369 | seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no"); |
358 | clk_disable(rtc_clk); | 370 | clk_disable(info->rtc_clk); |
359 | return 0; | 371 | return 0; |
360 | } | 372 | } |
361 | 373 | ||
@@ -368,63 +380,61 @@ static const struct rtc_class_ops s3c_rtcops = { | |||
368 | .alarm_irq_enable = s3c_rtc_setaie, | 380 | .alarm_irq_enable = s3c_rtc_setaie, |
369 | }; | 381 | }; |
370 | 382 | ||
371 | static void s3c_rtc_enable(struct platform_device *pdev, int en) | 383 | static void s3c_rtc_enable(struct s3c_rtc *info, int en) |
372 | { | 384 | { |
373 | void __iomem *base = s3c_rtc_base; | ||
374 | unsigned int tmp; | 385 | unsigned int tmp; |
375 | 386 | ||
376 | if (s3c_rtc_base == NULL) | 387 | clk_enable(info->rtc_clk); |
377 | return; | ||
378 | |||
379 | clk_enable(rtc_clk); | ||
380 | if (!en) { | 388 | if (!en) { |
381 | tmp = readw(base + S3C2410_RTCCON); | 389 | tmp = readw(info->base + S3C2410_RTCCON); |
382 | if (s3c_rtc_cpu_type == TYPE_S3C64XX) | 390 | if (info->cpu_type == TYPE_S3C64XX) |
383 | tmp &= ~S3C64XX_RTCCON_TICEN; | 391 | tmp &= ~S3C64XX_RTCCON_TICEN; |
384 | tmp &= ~S3C2410_RTCCON_RTCEN; | 392 | tmp &= ~S3C2410_RTCCON_RTCEN; |
385 | writew(tmp, base + S3C2410_RTCCON); | 393 | writew(tmp, info->base + S3C2410_RTCCON); |
386 | 394 | ||
387 | if (s3c_rtc_cpu_type != TYPE_S3C64XX) { | 395 | if (info->cpu_type != TYPE_S3C64XX) { |
388 | tmp = readb(base + S3C2410_TICNT); | 396 | tmp = readb(info->base + S3C2410_TICNT); |
389 | tmp &= ~S3C2410_TICNT_ENABLE; | 397 | tmp &= ~S3C2410_TICNT_ENABLE; |
390 | writeb(tmp, base + S3C2410_TICNT); | 398 | writeb(tmp, info->base + S3C2410_TICNT); |
391 | } | 399 | } |
392 | } else { | 400 | } else { |
393 | /* re-enable the device, and check it is ok */ | 401 | /* re-enable the device, and check it is ok */ |
394 | 402 | ||
395 | if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) { | 403 | if ((readw(info->base + S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) { |
396 | dev_info(&pdev->dev, "rtc disabled, re-enabling\n"); | 404 | dev_info(info->dev, "rtc disabled, re-enabling\n"); |
397 | 405 | ||
398 | tmp = readw(base + S3C2410_RTCCON); | 406 | tmp = readw(info->base + S3C2410_RTCCON); |
399 | writew(tmp | S3C2410_RTCCON_RTCEN, | 407 | writew(tmp | S3C2410_RTCCON_RTCEN, |
400 | base + S3C2410_RTCCON); | 408 | info->base + S3C2410_RTCCON); |
401 | } | 409 | } |
402 | 410 | ||
403 | if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) { | 411 | if ((readw(info->base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) { |
404 | dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n"); | 412 | dev_info(info->dev, "removing RTCCON_CNTSEL\n"); |
405 | 413 | ||
406 | tmp = readw(base + S3C2410_RTCCON); | 414 | tmp = readw(info->base + S3C2410_RTCCON); |
407 | writew(tmp & ~S3C2410_RTCCON_CNTSEL, | 415 | writew(tmp & ~S3C2410_RTCCON_CNTSEL, |
408 | base + S3C2410_RTCCON); | 416 | info->base + S3C2410_RTCCON); |
409 | } | 417 | } |
410 | 418 | ||
411 | if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) { | 419 | if ((readw(info->base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) { |
412 | dev_info(&pdev->dev, "removing RTCCON_CLKRST\n"); | 420 | dev_info(info->dev, "removing RTCCON_CLKRST\n"); |
413 | 421 | ||
414 | tmp = readw(base + S3C2410_RTCCON); | 422 | tmp = readw(info->base + S3C2410_RTCCON); |
415 | writew(tmp & ~S3C2410_RTCCON_CLKRST, | 423 | writew(tmp & ~S3C2410_RTCCON_CLKRST, |
416 | base + S3C2410_RTCCON); | 424 | info->base + S3C2410_RTCCON); |
417 | } | 425 | } |
418 | } | 426 | } |
419 | clk_disable(rtc_clk); | 427 | clk_disable(info->rtc_clk); |
420 | } | 428 | } |
421 | 429 | ||
422 | static int s3c_rtc_remove(struct platform_device *dev) | 430 | static int s3c_rtc_remove(struct platform_device *pdev) |
423 | { | 431 | { |
424 | s3c_rtc_setaie(&dev->dev, 0); | 432 | struct s3c_rtc *info = platform_get_drvdata(pdev); |
433 | |||
434 | s3c_rtc_setaie(info->dev, 0); | ||
425 | 435 | ||
426 | clk_unprepare(rtc_clk); | 436 | clk_unprepare(info->rtc_clk); |
427 | rtc_clk = NULL; | 437 | info->rtc_clk = NULL; |
428 | 438 | ||
429 | return 0; | 439 | return 0; |
430 | } | 440 | } |
@@ -447,73 +457,85 @@ static inline int s3c_rtc_get_driver_data(struct platform_device *pdev) | |||
447 | 457 | ||
448 | static int s3c_rtc_probe(struct platform_device *pdev) | 458 | static int s3c_rtc_probe(struct platform_device *pdev) |
449 | { | 459 | { |
450 | struct rtc_device *rtc; | 460 | struct s3c_rtc *info = NULL; |
451 | struct rtc_time rtc_tm; | 461 | struct rtc_time rtc_tm; |
452 | struct resource *res; | 462 | struct resource *res; |
453 | int ret; | 463 | int ret; |
454 | int tmp; | 464 | int tmp; |
455 | 465 | ||
456 | dev_dbg(&pdev->dev, "%s: probe=%p\n", __func__, pdev); | 466 | info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); |
467 | if (!info) | ||
468 | return -ENOMEM; | ||
457 | 469 | ||
458 | /* find the IRQs */ | 470 | /* find the IRQs */ |
459 | 471 | info->irq_tick = platform_get_irq(pdev, 1); | |
460 | s3c_rtc_tickno = platform_get_irq(pdev, 1); | 472 | if (info->irq_tick < 0) { |
461 | if (s3c_rtc_tickno < 0) { | ||
462 | dev_err(&pdev->dev, "no irq for rtc tick\n"); | 473 | dev_err(&pdev->dev, "no irq for rtc tick\n"); |
463 | return s3c_rtc_tickno; | 474 | return info->irq_tick; |
464 | } | 475 | } |
465 | 476 | ||
466 | s3c_rtc_alarmno = platform_get_irq(pdev, 0); | 477 | info->dev = &pdev->dev; |
467 | if (s3c_rtc_alarmno < 0) { | 478 | info->cpu_type = s3c_rtc_get_driver_data(pdev); |
479 | spin_lock_init(&info->pie_lock); | ||
480 | spin_lock_init(&info->alarm_clk_lock); | ||
481 | |||
482 | platform_set_drvdata(pdev, info); | ||
483 | |||
484 | info->irq_alarm = platform_get_irq(pdev, 0); | ||
485 | if (info->irq_alarm < 0) { | ||
468 | dev_err(&pdev->dev, "no irq for alarm\n"); | 486 | dev_err(&pdev->dev, "no irq for alarm\n"); |
469 | return s3c_rtc_alarmno; | 487 | return info->irq_alarm; |
470 | } | 488 | } |
471 | 489 | ||
472 | dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n", | 490 | dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n", |
473 | s3c_rtc_tickno, s3c_rtc_alarmno); | 491 | info->irq_tick, info->irq_alarm); |
474 | 492 | ||
475 | /* get the memory region */ | 493 | /* get the memory region */ |
476 | |||
477 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 494 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
478 | s3c_rtc_base = devm_ioremap_resource(&pdev->dev, res); | 495 | info->base = devm_ioremap_resource(&pdev->dev, res); |
479 | if (IS_ERR(s3c_rtc_base)) | 496 | if (IS_ERR(info->base)) |
480 | return PTR_ERR(s3c_rtc_base); | 497 | return PTR_ERR(info->base); |
481 | 498 | ||
482 | rtc_clk = devm_clk_get(&pdev->dev, "rtc"); | 499 | info->rtc_clk = devm_clk_get(&pdev->dev, "rtc"); |
483 | if (IS_ERR(rtc_clk)) { | 500 | if (IS_ERR(info->rtc_clk)) { |
484 | dev_err(&pdev->dev, "failed to find rtc clock source\n"); | 501 | dev_err(&pdev->dev, "failed to find rtc clock source\n"); |
485 | ret = PTR_ERR(rtc_clk); | 502 | return PTR_ERR(info->rtc_clk); |
486 | rtc_clk = NULL; | ||
487 | return ret; | ||
488 | } | 503 | } |
489 | 504 | clk_prepare_enable(info->rtc_clk); | |
490 | clk_prepare_enable(rtc_clk); | ||
491 | 505 | ||
492 | /* check to see if everything is setup correctly */ | 506 | /* check to see if everything is setup correctly */ |
493 | 507 | s3c_rtc_enable(info, 1); | |
494 | s3c_rtc_enable(pdev, 1); | ||
495 | 508 | ||
496 | dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n", | 509 | dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n", |
497 | readw(s3c_rtc_base + S3C2410_RTCCON)); | 510 | readw(info->base + S3C2410_RTCCON)); |
498 | 511 | ||
499 | device_init_wakeup(&pdev->dev, 1); | 512 | device_init_wakeup(&pdev->dev, 1); |
500 | 513 | ||
501 | /* register RTC and exit */ | 514 | /* register RTC and exit */ |
502 | 515 | info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops, | |
503 | rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops, | ||
504 | THIS_MODULE); | 516 | THIS_MODULE); |
505 | 517 | if (IS_ERR(info->rtc)) { | |
506 | if (IS_ERR(rtc)) { | ||
507 | dev_err(&pdev->dev, "cannot attach rtc\n"); | 518 | dev_err(&pdev->dev, "cannot attach rtc\n"); |
508 | ret = PTR_ERR(rtc); | 519 | ret = PTR_ERR(info->rtc); |
509 | goto err_nortc; | 520 | goto err_nortc; |
510 | } | 521 | } |
511 | 522 | ||
512 | s3c_rtc_cpu_type = s3c_rtc_get_driver_data(pdev); | 523 | ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq, |
524 | 0, "s3c2410-rtc alarm", info); | ||
525 | if (ret) { | ||
526 | dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret); | ||
527 | goto err_nortc; | ||
528 | } | ||
513 | 529 | ||
514 | /* Check RTC Time */ | 530 | ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq, |
531 | 0, "s3c2410-rtc tick", info); | ||
532 | if (ret) { | ||
533 | dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret); | ||
534 | goto err_nortc; | ||
535 | } | ||
515 | 536 | ||
516 | s3c_rtc_gettime(NULL, &rtc_tm); | 537 | /* Check RTC Time */ |
538 | s3c_rtc_gettime(&pdev->dev, &rtc_tm); | ||
517 | 539 | ||
518 | if (rtc_valid_tm(&rtc_tm)) { | 540 | if (rtc_valid_tm(&rtc_tm)) { |
519 | rtc_tm.tm_year = 100; | 541 | rtc_tm.tm_year = 100; |
@@ -523,111 +545,90 @@ static int s3c_rtc_probe(struct platform_device *pdev) | |||
523 | rtc_tm.tm_min = 0; | 545 | rtc_tm.tm_min = 0; |
524 | rtc_tm.tm_sec = 0; | 546 | rtc_tm.tm_sec = 0; |
525 | 547 | ||
526 | s3c_rtc_settime(NULL, &rtc_tm); | 548 | s3c_rtc_settime(&pdev->dev, &rtc_tm); |
527 | 549 | ||
528 | dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n"); | 550 | dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n"); |
529 | } | 551 | } |
530 | 552 | ||
531 | if (s3c_rtc_cpu_type != TYPE_S3C2410) | 553 | if (info->cpu_type != TYPE_S3C2410) |
532 | rtc->max_user_freq = 32768; | 554 | info->rtc->max_user_freq = 32768; |
533 | else | 555 | else |
534 | rtc->max_user_freq = 128; | 556 | info->rtc->max_user_freq = 128; |
535 | 557 | ||
536 | if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) { | 558 | if (info->cpu_type == TYPE_S3C2416 || info->cpu_type == TYPE_S3C2443) { |
537 | tmp = readw(s3c_rtc_base + S3C2410_RTCCON); | 559 | tmp = readw(info->base + S3C2410_RTCCON); |
538 | tmp |= S3C2443_RTCCON_TICSEL; | 560 | tmp |= S3C2443_RTCCON_TICSEL; |
539 | writew(tmp, s3c_rtc_base + S3C2410_RTCCON); | 561 | writew(tmp, info->base + S3C2410_RTCCON); |
540 | } | ||
541 | |||
542 | platform_set_drvdata(pdev, rtc); | ||
543 | |||
544 | s3c_rtc_setfreq(&pdev->dev, 1); | ||
545 | |||
546 | ret = devm_request_irq(&pdev->dev, s3c_rtc_alarmno, s3c_rtc_alarmirq, | ||
547 | 0, "s3c2410-rtc alarm", rtc); | ||
548 | if (ret) { | ||
549 | dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret); | ||
550 | goto err_nortc; | ||
551 | } | 562 | } |
552 | 563 | ||
553 | ret = devm_request_irq(&pdev->dev, s3c_rtc_tickno, s3c_rtc_tickirq, | 564 | s3c_rtc_setfreq(info, 1); |
554 | 0, "s3c2410-rtc tick", rtc); | ||
555 | if (ret) { | ||
556 | dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret); | ||
557 | goto err_nortc; | ||
558 | } | ||
559 | 565 | ||
560 | clk_disable(rtc_clk); | 566 | clk_disable(info->rtc_clk); |
561 | 567 | ||
562 | return 0; | 568 | return 0; |
563 | 569 | ||
564 | err_nortc: | 570 | err_nortc: |
565 | s3c_rtc_enable(pdev, 0); | 571 | s3c_rtc_enable(info, 0); |
566 | clk_disable_unprepare(rtc_clk); | 572 | clk_disable_unprepare(info->rtc_clk); |
567 | 573 | ||
568 | return ret; | 574 | return ret; |
569 | } | 575 | } |
570 | 576 | ||
571 | #ifdef CONFIG_PM_SLEEP | 577 | #ifdef CONFIG_PM_SLEEP |
572 | /* RTC Power management control */ | ||
573 | |||
574 | static int ticnt_save, ticnt_en_save; | ||
575 | static bool wake_en; | ||
576 | 578 | ||
577 | static int s3c_rtc_suspend(struct device *dev) | 579 | static int s3c_rtc_suspend(struct device *dev) |
578 | { | 580 | { |
579 | struct platform_device *pdev = to_platform_device(dev); | 581 | struct s3c_rtc *info = dev_get_drvdata(dev); |
580 | 582 | ||
581 | clk_enable(rtc_clk); | 583 | clk_enable(info->rtc_clk); |
582 | /* save TICNT for anyone using periodic interrupts */ | 584 | /* save TICNT for anyone using periodic interrupts */ |
583 | if (s3c_rtc_cpu_type == TYPE_S3C64XX) { | 585 | if (info->cpu_type == TYPE_S3C64XX) { |
584 | ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON); | 586 | info->ticnt_en_save = readw(info->base + S3C2410_RTCCON); |
585 | ticnt_en_save &= S3C64XX_RTCCON_TICEN; | 587 | info->ticnt_en_save &= S3C64XX_RTCCON_TICEN; |
586 | ticnt_save = readl(s3c_rtc_base + S3C2410_TICNT); | 588 | info->ticnt_save = readl(info->base + S3C2410_TICNT); |
587 | } else { | 589 | } else { |
588 | ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT); | 590 | info->ticnt_save = readb(info->base + S3C2410_TICNT); |
589 | } | 591 | } |
590 | s3c_rtc_enable(pdev, 0); | 592 | s3c_rtc_enable(info, 0); |
591 | 593 | ||
592 | if (device_may_wakeup(dev) && !wake_en) { | 594 | if (device_may_wakeup(dev) && !info->wake_en) { |
593 | if (enable_irq_wake(s3c_rtc_alarmno) == 0) | 595 | if (enable_irq_wake(info->irq_alarm) == 0) |
594 | wake_en = true; | 596 | info->wake_en = true; |
595 | else | 597 | else |
596 | dev_err(dev, "enable_irq_wake failed\n"); | 598 | dev_err(dev, "enable_irq_wake failed\n"); |
597 | } | 599 | } |
598 | clk_disable(rtc_clk); | 600 | clk_disable(info->rtc_clk); |
599 | 601 | ||
600 | return 0; | 602 | return 0; |
601 | } | 603 | } |
602 | 604 | ||
603 | static int s3c_rtc_resume(struct device *dev) | 605 | static int s3c_rtc_resume(struct device *dev) |
604 | { | 606 | { |
605 | struct platform_device *pdev = to_platform_device(dev); | 607 | struct s3c_rtc *info = dev_get_drvdata(dev); |
606 | unsigned int tmp; | 608 | unsigned int tmp; |
607 | 609 | ||
608 | clk_enable(rtc_clk); | 610 | clk_enable(info->rtc_clk); |
609 | s3c_rtc_enable(pdev, 1); | 611 | s3c_rtc_enable(info, 1); |
610 | if (s3c_rtc_cpu_type == TYPE_S3C64XX) { | 612 | if (info->cpu_type == TYPE_S3C64XX) { |
611 | writel(ticnt_save, s3c_rtc_base + S3C2410_TICNT); | 613 | writel(info->ticnt_save, info->base + S3C2410_TICNT); |
612 | if (ticnt_en_save) { | 614 | if (info->ticnt_en_save) { |
613 | tmp = readw(s3c_rtc_base + S3C2410_RTCCON); | 615 | tmp = readw(info->base + S3C2410_RTCCON); |
614 | writew(tmp | ticnt_en_save, | 616 | writew(tmp | info->ticnt_en_save, |
615 | s3c_rtc_base + S3C2410_RTCCON); | 617 | info->base + S3C2410_RTCCON); |
616 | } | 618 | } |
617 | } else { | 619 | } else { |
618 | writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT); | 620 | writeb(info->ticnt_save, info->base + S3C2410_TICNT); |
619 | } | 621 | } |
620 | 622 | ||
621 | if (device_may_wakeup(dev) && wake_en) { | 623 | if (device_may_wakeup(dev) && info->wake_en) { |
622 | disable_irq_wake(s3c_rtc_alarmno); | 624 | disable_irq_wake(info->irq_alarm); |
623 | wake_en = false; | 625 | info->wake_en = false; |
624 | } | 626 | } |
625 | clk_disable(rtc_clk); | 627 | clk_disable(info->rtc_clk); |
626 | 628 | ||
627 | return 0; | 629 | return 0; |
628 | } | 630 | } |
629 | #endif | 631 | #endif |
630 | |||
631 | static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume); | 632 | static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume); |
632 | 633 | ||
633 | #ifdef CONFIG_OF | 634 | #ifdef CONFIG_OF |