diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-12-29 13:08:11 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-12-29 13:08:11 -0500 |
commit | 47992cbdaef2f18a47871b2ed01ad27f568c8b73 (patch) | |
tree | bfed4f8c7ea3164afc75a85ab3624586c37c37f4 /drivers/rtc | |
parent | 4655a0de36e8e903e99a8d152818e3aae86dae1a (diff) | |
parent | 198fc108ee4c2cd3f08954eae6a819c81c03214b (diff) |
Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into devel
Diffstat (limited to 'drivers/rtc')
-rw-r--r-- | drivers/rtc/rtc-sa1100.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/rtc/rtc-sa1100.c b/drivers/rtc/rtc-sa1100.c index 66a9bb85bbe8..d26a5f82aaba 100644 --- a/drivers/rtc/rtc-sa1100.c +++ b/drivers/rtc/rtc-sa1100.c | |||
@@ -38,11 +38,11 @@ | |||
38 | #include <mach/pxa-regs.h> | 38 | #include <mach/pxa-regs.h> |
39 | #endif | 39 | #endif |
40 | 40 | ||
41 | #define TIMER_FREQ CLOCK_TICK_RATE | ||
42 | #define RTC_DEF_DIVIDER 32768 - 1 | 41 | #define RTC_DEF_DIVIDER 32768 - 1 |
43 | #define RTC_DEF_TRIM 0 | 42 | #define RTC_DEF_TRIM 0 |
44 | 43 | ||
45 | static unsigned long rtc_freq = 1024; | 44 | static unsigned long rtc_freq = 1024; |
45 | static unsigned long timer_freq; | ||
46 | static struct rtc_time rtc_alarm; | 46 | static struct rtc_time rtc_alarm; |
47 | static DEFINE_SPINLOCK(sa1100_rtc_lock); | 47 | static DEFINE_SPINLOCK(sa1100_rtc_lock); |
48 | 48 | ||
@@ -157,7 +157,7 @@ static irqreturn_t timer1_interrupt(int irq, void *dev_id) | |||
157 | rtc_update_irq(rtc, rtc_timer1_count, RTC_PF | RTC_IRQF); | 157 | rtc_update_irq(rtc, rtc_timer1_count, RTC_PF | RTC_IRQF); |
158 | 158 | ||
159 | if (rtc_timer1_count == 1) | 159 | if (rtc_timer1_count == 1) |
160 | rtc_timer1_count = (rtc_freq * ((1<<30)/(TIMER_FREQ>>2))); | 160 | rtc_timer1_count = (rtc_freq * ((1 << 30) / (timer_freq >> 2))); |
161 | 161 | ||
162 | return IRQ_HANDLED; | 162 | return IRQ_HANDLED; |
163 | } | 163 | } |
@@ -166,7 +166,7 @@ static int sa1100_rtc_read_callback(struct device *dev, int data) | |||
166 | { | 166 | { |
167 | if (data & RTC_PF) { | 167 | if (data & RTC_PF) { |
168 | /* interpolate missed periods and set match for the next */ | 168 | /* interpolate missed periods and set match for the next */ |
169 | unsigned long period = TIMER_FREQ/rtc_freq; | 169 | unsigned long period = timer_freq / rtc_freq; |
170 | unsigned long oscr = OSCR; | 170 | unsigned long oscr = OSCR; |
171 | unsigned long osmr1 = OSMR1; | 171 | unsigned long osmr1 = OSMR1; |
172 | unsigned long missed = (oscr - osmr1)/period; | 172 | unsigned long missed = (oscr - osmr1)/period; |
@@ -263,7 +263,7 @@ static int sa1100_rtc_ioctl(struct device *dev, unsigned int cmd, | |||
263 | return 0; | 263 | return 0; |
264 | case RTC_PIE_ON: | 264 | case RTC_PIE_ON: |
265 | spin_lock_irq(&sa1100_rtc_lock); | 265 | spin_lock_irq(&sa1100_rtc_lock); |
266 | OSMR1 = TIMER_FREQ/rtc_freq + OSCR; | 266 | OSMR1 = timer_freq / rtc_freq + OSCR; |
267 | OIER |= OIER_E1; | 267 | OIER |= OIER_E1; |
268 | rtc_timer1_count = 1; | 268 | rtc_timer1_count = 1; |
269 | spin_unlock_irq(&sa1100_rtc_lock); | 269 | spin_unlock_irq(&sa1100_rtc_lock); |
@@ -271,7 +271,7 @@ static int sa1100_rtc_ioctl(struct device *dev, unsigned int cmd, | |||
271 | case RTC_IRQP_READ: | 271 | case RTC_IRQP_READ: |
272 | return put_user(rtc_freq, (unsigned long *)arg); | 272 | return put_user(rtc_freq, (unsigned long *)arg); |
273 | case RTC_IRQP_SET: | 273 | case RTC_IRQP_SET: |
274 | if (arg < 1 || arg > TIMER_FREQ) | 274 | if (arg < 1 || arg > timer_freq) |
275 | return -EINVAL; | 275 | return -EINVAL; |
276 | rtc_freq = arg; | 276 | rtc_freq = arg; |
277 | return 0; | 277 | return 0; |
@@ -352,6 +352,8 @@ static int sa1100_rtc_probe(struct platform_device *pdev) | |||
352 | { | 352 | { |
353 | struct rtc_device *rtc; | 353 | struct rtc_device *rtc; |
354 | 354 | ||
355 | timer_freq = get_clock_tick_rate(); | ||
356 | |||
355 | /* | 357 | /* |
356 | * According to the manual we should be able to let RTTR be zero | 358 | * According to the manual we should be able to let RTTR be zero |
357 | * and then a default diviser for a 32.768KHz clock is used. | 359 | * and then a default diviser for a 32.768KHz clock is used. |