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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2006-09-29 05:01:37 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-09-29 12:18:24 -0400
commit13c73f045f2ac33219729678f4a9389d4ccab799 (patch)
tree9be3f3f917a6a766090381d202c059c5c5d1875c /drivers/rtc/rtc-rs5c348.c
parentb9dd6ffc3d6b56417a2c4c917f51dab6470166e6 (diff)
[PATCH] RTC: more XSTP/VDET support for rtc-rs5c348 driver
If the chip detected "oscillator stop" condition, show an warning message. And initialize it with the Epoch time instead of leaving it with unknown date/time. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Acked-by: Alessandro Zummo <a.zummo@towertech.it> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/rtc/rtc-rs5c348.c')
-rw-r--r--drivers/rtc/rtc-rs5c348.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/rtc/rtc-rs5c348.c b/drivers/rtc/rtc-rs5c348.c
index 0964d1dba925..25589061f931 100644
--- a/drivers/rtc/rtc-rs5c348.c
+++ b/drivers/rtc/rtc-rs5c348.c
@@ -23,7 +23,7 @@
23#include <linux/workqueue.h> 23#include <linux/workqueue.h>
24#include <linux/spi/spi.h> 24#include <linux/spi/spi.h>
25 25
26#define DRV_VERSION "0.1" 26#define DRV_VERSION "0.2"
27 27
28#define RS5C348_REG_SECS 0 28#define RS5C348_REG_SECS 0
29#define RS5C348_REG_MINS 1 29#define RS5C348_REG_MINS 1
@@ -175,8 +175,15 @@ static int __devinit rs5c348_probe(struct spi_device *spi)
175 goto kfree_exit; 175 goto kfree_exit;
176 if (ret & (RS5C348_BIT_XSTP | RS5C348_BIT_VDET)) { 176 if (ret & (RS5C348_BIT_XSTP | RS5C348_BIT_VDET)) {
177 u8 buf[2]; 177 u8 buf[2];
178 struct rtc_time tm;
178 if (ret & RS5C348_BIT_VDET) 179 if (ret & RS5C348_BIT_VDET)
179 dev_warn(&spi->dev, "voltage-low detected.\n"); 180 dev_warn(&spi->dev, "voltage-low detected.\n");
181 if (ret & RS5C348_BIT_XSTP)
182 dev_warn(&spi->dev, "oscillator-stop detected.\n");
183 rtc_time_to_tm(0, &tm); /* 1970/1/1 */
184 ret = rs5c348_rtc_set_time(&spi->dev, &tm);
185 if (ret < 0)
186 goto kfree_exit;
180 buf[0] = RS5C348_CMD_W(RS5C348_REG_CTL2); 187 buf[0] = RS5C348_CMD_W(RS5C348_REG_CTL2);
181 buf[1] = 0; 188 buf[1] = 0;
182 ret = spi_write_then_read(spi, buf, sizeof(buf), NULL, 0); 189 ret = spi_write_then_read(spi, buf, sizeof(buf), NULL, 0);