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authorJuha Keski-Saari <ext-juha.1.keski-saari@nokia.com>2009-12-16 07:49:52 -0500
committerLiam Girdwood <lrg@slimlogic.co.uk>2009-12-17 05:27:29 -0500
commit045f972f2c254070652a59958591cac650e8684e (patch)
treebf871a3db088c0856f46f09a0d792bfc55bd4548 /drivers/regulator
parent205e5cd3d933a9ea7b75630355c8f8ec5ef16f6c (diff)
twl-regulator: Add turnon-delay and REMAP config to twlreg_info struct
This change includes regulator turnon delay values and the REMAP reset configuration to the twlreg_info struct, since they are basic attributes of every TWL regulator Signed-off-by: Juha Keski-Saari <ext-juha.1.keski-saari@nokia.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
Diffstat (limited to 'drivers/regulator')
-rw-r--r--drivers/regulator/twl-regulator.c103
1 files changed, 62 insertions, 41 deletions
diff --git a/drivers/regulator/twl-regulator.c b/drivers/regulator/twl-regulator.c
index aadf4cfe354e..3df02267e1e7 100644
--- a/drivers/regulator/twl-regulator.c
+++ b/drivers/regulator/twl-regulator.c
@@ -40,6 +40,12 @@ struct twlreg_info {
40 u8 table_len; 40 u8 table_len;
41 const u16 *table; 41 const u16 *table;
42 42
43 /* regulator specific turn-on delay */
44 u16 delay;
45
46 /* State REMAP default configuration */
47 u8 remap;
48
43 /* chip constraints on regulator behavior */ 49 /* chip constraints on regulator behavior */
44 u16 min_mV; 50 u16 min_mV;
45 51
@@ -426,20 +432,30 @@ static struct regulator_ops twlfixed_ops = {
426 432
427/*----------------------------------------------------------------------*/ 433/*----------------------------------------------------------------------*/
428 434
429#define TWL4030_ADJUSTABLE_LDO(label, offset, num) \ 435#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
430 TWL_ADJUSTABLE_LDO(label, offset, num, TWL4030) 436 TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
431#define TWL4030_FIXED_LDO(label, offset, mVolts, num) \ 437 remap_conf, TWL4030)
432 TWL_FIXED_LDO(label, offset, mVolts, num, TWL4030) 438#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
433#define TWL6030_ADJUSTABLE_LDO(label, offset, num) \ 439 remap_conf) \
434 TWL_ADJUSTABLE_LDO(label, offset, num, TWL6030) 440 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
435#define TWL6030_FIXED_LDO(label, offset, mVolts, num) \ 441 remap_conf, TWL4030)
436 TWL_FIXED_LDO(label, offset, mVolts, num, TWL6030) 442#define TWL6030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
437 443 remap_conf) \
438#define TWL_ADJUSTABLE_LDO(label, offset, num, family) { \ 444 TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
445 remap_conf, TWL6030)
446#define TWL6030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
447 remap_conf) \
448 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
449 remap_conf, TWL6030)
450
451#define TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf, \
452 family) { \
439 .base = offset, \ 453 .base = offset, \
440 .id = num, \ 454 .id = num, \
441 .table_len = ARRAY_SIZE(label##_VSEL_table), \ 455 .table_len = ARRAY_SIZE(label##_VSEL_table), \
442 .table = label##_VSEL_table, \ 456 .table = label##_VSEL_table, \
457 .delay = turnon_delay, \
458 .remap = remap_conf, \
443 .desc = { \ 459 .desc = { \
444 .name = #label, \ 460 .name = #label, \
445 .id = family##_REG_##label, \ 461 .id = family##_REG_##label, \
@@ -450,10 +466,13 @@ static struct regulator_ops twlfixed_ops = {
450 }, \ 466 }, \
451 } 467 }
452 468
453#define TWL_FIXED_LDO(label, offset, mVolts, num, family) { \ 469#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
470 family) { \
454 .base = offset, \ 471 .base = offset, \
455 .id = num, \ 472 .id = num, \
456 .min_mV = mVolts, \ 473 .min_mV = mVolts, \
474 .delay = turnon_delay, \
475 .remap = remap_conf, \
457 .desc = { \ 476 .desc = { \
458 .name = #label, \ 477 .name = #label, \
459 .id = family##_REG_##label, \ 478 .id = family##_REG_##label, \
@@ -469,39 +488,41 @@ static struct regulator_ops twlfixed_ops = {
469 * software control over them after boot. 488 * software control over them after boot.
470 */ 489 */
471static struct twlreg_info twl_regs[] = { 490static struct twlreg_info twl_regs[] = {
472 TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1), 491 TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08),
473 TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2), 492 TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08),
474 TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2), 493 TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08),
475 TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3), 494 TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08),
476 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4), 495 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08),
477 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5), 496 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08),
478 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6), 497 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08),
479 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7), 498 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00),
480 TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8), 499 TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08),
481 TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9), 500 TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00),
482 TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10), 501 TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08),
483 TWL4030_FIXED_LDO(VINTANA1, 0x3f, 11), 502 TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08),
484 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12), 503 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08),
485 TWL4030_FIXED_LDO(VINTDIG, 0x47, 13), 504 TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08),
486 TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14), 505 TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08),
487 TWL4030_ADJUSTABLE_LDO(VDD1, 0x55, 15), 506 TWL4030_ADJUSTABLE_LDO(VDD1, 0x55, 15, 1000, 0x08),
488 TWL4030_ADJUSTABLE_LDO(VDD2, 0x63, 16), 507 TWL4030_ADJUSTABLE_LDO(VDD2, 0x63, 16, 1000, 0x08),
489 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17), 508 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08),
490 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18), 509 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08),
491 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19), 510 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08),
492 /* VUSBCP is managed *only* by the USB subchip */ 511 /* VUSBCP is managed *only* by the USB subchip */
493 512
494 /* 6030 REG with base as PMC Slave Misc : 0x0030 */ 513 /* 6030 REG with base as PMC Slave Misc : 0x0030 */
495 TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1), 514 /* Turnon-delay and remap configuration values for 6030 are not
496 TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 2), 515 verified since the specification is not public */
497 TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 3), 516 TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1, 0, 0x08),
498 TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 4), 517 TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 2, 0, 0x08),
499 TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 5), 518 TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 3, 0, 0x08),
500 TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 7), 519 TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 4, 0, 0x08),
501 TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15), 520 TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 5, 0, 0x08),
502 TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16), 521 TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 7, 0, 0x08),
503 TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17), 522 TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15, 0, 0x08),
504 TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18) 523 TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16, 0, 0x08),
524 TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17, 0, 0x08),
525 TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18, 0, 0x08)
505}; 526};
506 527
507static int twlreg_probe(struct platform_device *pdev) 528static int twlreg_probe(struct platform_device *pdev)