diff options
author | Axel Lin <axel.lin@gmail.com> | 2012-03-22 18:25:05 -0400 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-03-26 13:35:35 -0400 |
commit | eb4168158f79237498e4d3ddcef6e9436db15a4a (patch) | |
tree | 2eb95ae05bc283290bd87ca52df9f914613a8227 /drivers/regulator | |
parent | 5777d9b34aec841429ddade56403b3f53a821a1d (diff) |
regulator: Fix restoring pmic.dcdcx_hib_mode settings in wm8350_dcdc_set_suspend_enable
What we want is to restore wm8350->pmic.dcdcx_hib_mode settings to
WM8350_DCDCx_LOW_POWER registers. Current code also clears all other
bits of WM8350_DCDCx_LOW_POWER registers which is wrong.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'drivers/regulator')
-rw-r--r-- | drivers/regulator/wm8350-regulator.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/regulator/wm8350-regulator.c b/drivers/regulator/wm8350-regulator.c index ab1e183a74b5..1c548218e12a 100644 --- a/drivers/regulator/wm8350-regulator.c +++ b/drivers/regulator/wm8350-regulator.c | |||
@@ -495,25 +495,25 @@ static int wm8350_dcdc_set_suspend_enable(struct regulator_dev *rdev) | |||
495 | val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER) | 495 | val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER) |
496 | & ~WM8350_DCDC_HIB_MODE_MASK; | 496 | & ~WM8350_DCDC_HIB_MODE_MASK; |
497 | wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER, | 497 | wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER, |
498 | wm8350->pmic.dcdc1_hib_mode); | 498 | val | wm8350->pmic.dcdc1_hib_mode); |
499 | break; | 499 | break; |
500 | case WM8350_DCDC_3: | 500 | case WM8350_DCDC_3: |
501 | val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER) | 501 | val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER) |
502 | & ~WM8350_DCDC_HIB_MODE_MASK; | 502 | & ~WM8350_DCDC_HIB_MODE_MASK; |
503 | wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER, | 503 | wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER, |
504 | wm8350->pmic.dcdc3_hib_mode); | 504 | val | wm8350->pmic.dcdc3_hib_mode); |
505 | break; | 505 | break; |
506 | case WM8350_DCDC_4: | 506 | case WM8350_DCDC_4: |
507 | val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER) | 507 | val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER) |
508 | & ~WM8350_DCDC_HIB_MODE_MASK; | 508 | & ~WM8350_DCDC_HIB_MODE_MASK; |
509 | wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER, | 509 | wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER, |
510 | wm8350->pmic.dcdc4_hib_mode); | 510 | val | wm8350->pmic.dcdc4_hib_mode); |
511 | break; | 511 | break; |
512 | case WM8350_DCDC_6: | 512 | case WM8350_DCDC_6: |
513 | val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER) | 513 | val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER) |
514 | & ~WM8350_DCDC_HIB_MODE_MASK; | 514 | & ~WM8350_DCDC_HIB_MODE_MASK; |
515 | wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER, | 515 | wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER, |
516 | wm8350->pmic.dcdc6_hib_mode); | 516 | val | wm8350->pmic.dcdc6_hib_mode); |
517 | break; | 517 | break; |
518 | case WM8350_DCDC_2: | 518 | case WM8350_DCDC_2: |
519 | case WM8350_DCDC_5: | 519 | case WM8350_DCDC_5: |