diff options
author | Axel Lin <axel.lin@gmail.com> | 2012-03-22 18:27:10 -0400 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-03-26 13:35:35 -0400 |
commit | 9300928692f835f76f5604b3b51c3085977edf68 (patch) | |
tree | 293d6acf7b14b978677fe9f3c41c76a2d0bafd85 /drivers/regulator | |
parent | eb4168158f79237498e4d3ddcef6e9436db15a4a (diff) |
regulator: Do proper shift to set correct bit for DC[2|5]_HIB_MODE setting
DC[2|5]_HIB_MODE is BIT 12 of DCDC[2|5] Control register.
WM8350_DC2_HIB_MODE_ACTIVE/WM8350_DC2_HIB_MODE_DISABLE are defined as 1/0.
Thus we need to left shift WM8350_DC2_HIB_MODE_SHIFT bits.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'drivers/regulator')
-rw-r--r-- | drivers/regulator/wm8350-regulator.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/regulator/wm8350-regulator.c b/drivers/regulator/wm8350-regulator.c index 1c548218e12a..ff3465423be1 100644 --- a/drivers/regulator/wm8350-regulator.c +++ b/drivers/regulator/wm8350-regulator.c | |||
@@ -575,13 +575,13 @@ static int wm8350_dcdc25_set_suspend_enable(struct regulator_dev *rdev) | |||
575 | val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL) | 575 | val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL) |
576 | & ~WM8350_DC2_HIB_MODE_MASK; | 576 | & ~WM8350_DC2_HIB_MODE_MASK; |
577 | wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val | | 577 | wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val | |
578 | WM8350_DC2_HIB_MODE_ACTIVE); | 578 | (WM8350_DC2_HIB_MODE_ACTIVE << WM8350_DC2_HIB_MODE_SHIFT)); |
579 | break; | 579 | break; |
580 | case WM8350_DCDC_5: | 580 | case WM8350_DCDC_5: |
581 | val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL) | 581 | val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL) |
582 | & ~WM8350_DC2_HIB_MODE_MASK; | 582 | & ~WM8350_DC5_HIB_MODE_MASK; |
583 | wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val | | 583 | wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val | |
584 | WM8350_DC5_HIB_MODE_ACTIVE); | 584 | (WM8350_DC5_HIB_MODE_ACTIVE << WM8350_DC5_HIB_MODE_SHIFT)); |
585 | break; | 585 | break; |
586 | default: | 586 | default: |
587 | return -EINVAL; | 587 | return -EINVAL; |
@@ -600,13 +600,13 @@ static int wm8350_dcdc25_set_suspend_disable(struct regulator_dev *rdev) | |||
600 | val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL) | 600 | val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL) |
601 | & ~WM8350_DC2_HIB_MODE_MASK; | 601 | & ~WM8350_DC2_HIB_MODE_MASK; |
602 | wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val | | 602 | wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val | |
603 | WM8350_DC2_HIB_MODE_DISABLE); | 603 | (WM8350_DC2_HIB_MODE_DISABLE << WM8350_DC2_HIB_MODE_SHIFT)); |
604 | break; | 604 | break; |
605 | case WM8350_DCDC_5: | 605 | case WM8350_DCDC_5: |
606 | val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL) | 606 | val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL) |
607 | & ~WM8350_DC2_HIB_MODE_MASK; | 607 | & ~WM8350_DC5_HIB_MODE_MASK; |
608 | wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val | | 608 | wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val | |
609 | WM8350_DC2_HIB_MODE_DISABLE); | 609 | (WM8350_DC5_HIB_MODE_DISABLE << WM8350_DC5_HIB_MODE_SHIFT)); |
610 | break; | 610 | break; |
611 | default: | 611 | default: |
612 | return -EINVAL; | 612 | return -EINVAL; |