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authorJuha Keski-Saari <ext-juha.1.keski-saari@nokia.com>2009-12-16 08:27:55 -0500
committerLiam Girdwood <lrg@slimlogic.co.uk>2009-12-17 05:27:28 -0500
commit07fc493f03019b5a98de1a498ab1b235afc394db (patch)
tree7400a1ce75345f4a40b156f1c61c13785a162724 /drivers/regulator
parent735eb93ae267f0b5638045b86dbc1e0b7019e3e8 (diff)
twl-regulator: Add all twl4030 regulators to twlreg_info
Define all twl4030 regulators in the twlreg_info table, along with appropriate VSEL tables for adjustable regulators Signed-off-by: Juha Keski-Saari <ext-juha.1.keski-saari@nokia.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
Diffstat (limited to 'drivers/regulator')
-rw-r--r--drivers/regulator/twl-regulator.c26
1 files changed, 17 insertions, 9 deletions
diff --git a/drivers/regulator/twl-regulator.c b/drivers/regulator/twl-regulator.c
index 7ea1c3a31081..43d7494fbd8e 100644
--- a/drivers/regulator/twl-regulator.c
+++ b/drivers/regulator/twl-regulator.c
@@ -294,6 +294,18 @@ static const u16 VSIM_VSEL_table[] = {
294static const u16 VDAC_VSEL_table[] = { 294static const u16 VDAC_VSEL_table[] = {
295 1200, 1300, 1800, 1800, 295 1200, 1300, 1800, 1800,
296}; 296};
297static const u16 VDD1_VSEL_table[] = {
298 800, 1450,
299};
300static const u16 VDD2_VSEL_table[] = {
301 800, 1450, 1500,
302};
303static const u16 VIO_VSEL_table[] = {
304 1800, 1850,
305};
306static const u16 VINTANA2_VSEL_table[] = {
307 2500, 2750,
308};
297static const u16 VAUX1_6030_VSEL_table[] = { 309static const u16 VAUX1_6030_VSEL_table[] = {
298 1000, 1300, 1800, 2500, 310 1000, 1300, 1800, 2500,
299 2800, 2900, 3000, 3000, 311 2800, 2900, 3000, 3000,
@@ -464,20 +476,16 @@ static struct twlreg_info twl_regs[] = {
464 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4), 476 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4),
465 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5), 477 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5),
466 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6), 478 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6),
467 /*
468 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7), 479 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7),
469 */
470 TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8), 480 TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8),
471 TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9), 481 TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9),
472 TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10), 482 TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10),
473 /* 483 TWL4030_FIXED_LDO(VINTANA1, 0x3f, 11),
474 TWL4030_ADJUSTABLE_LDO(VINTANA1, 0x3f, 11),
475 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12), 484 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12),
476 TWL4030_ADJUSTABLE_LDO(VINTDIG, 0x47, 13), 485 TWL4030_FIXED_LDO(VINTDIG, 0x47, 13),
477 TWL4030_SMPS(VIO, 0x4b, 14), 486 TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14),
478 TWL4030_SMPS(VDD1, 0x55, 15), 487 TWL4030_ADJUSTABLE_LDO(VDD1, 0x55, 15),
479 TWL4030_SMPS(VDD2, 0x63, 16), 488 TWL4030_ADJUSTABLE_LDO(VDD2, 0x63, 16),
480 */
481 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17), 489 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17),
482 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18), 490 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18),
483 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19), 491 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19),