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authorLee Jones <lee.jones@linaro.org>2013-03-28 12:11:11 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2013-04-01 08:23:37 -0400
commit8e6a8d7d23f904fb86686bcb835af971b68ae4b8 (patch)
tree046eab39b1c71b2f7d224ea5ec3d01d9de80b273 /drivers/regulator/ab8500.c
parentb54969ac406f0765989619469d74d79496431624 (diff)
regulator: ab8500: Add support for the ab9540
To obtain full AB9540 regulator support, the AB8500 regulator driver first needs to know its register layout and their initialisation values for each. That information is provided via a couple of large data structures which we provide here. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'drivers/regulator/ab8500.c')
-rw-r--r--drivers/regulator/ab8500.c582
1 files changed, 573 insertions, 9 deletions
diff --git a/drivers/regulator/ab8500.c b/drivers/regulator/ab8500.c
index 7ccd7fedea91..4d4d9dc33576 100644
--- a/drivers/regulator/ab8500.c
+++ b/drivers/regulator/ab8500.c
@@ -377,6 +377,7 @@ static struct regulator_ops ab8500_regulator_ops = {
377 .list_voltage = regulator_list_voltage_linear, 377 .list_voltage = regulator_list_voltage_linear,
378}; 378};
379 379
380/* AB8500 regulator information */
380static struct ab8500_regulator_info 381static struct ab8500_regulator_info
381 ab8500_regulator_info[AB8500_NUM_REGULATORS] = { 382 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
382 /* 383 /*
@@ -586,8 +587,264 @@ static struct ab8500_regulator_info
586 .update_val_idle = 0x0c, 587 .update_val_idle = 0x0c,
587 .update_val_normal = 0x04, 588 .update_val_normal = 0x04,
588 }, 589 },
590};
589 591
592/* AB9540 regulator information */
593static struct ab8500_regulator_info
594 ab9540_regulator_info[AB9540_NUM_REGULATORS] = {
595 /*
596 * Variable Voltage Regulators
597 * name, min mV, max mV,
598 * update bank, reg, mask, enable val
599 * volt bank, reg, mask, table, table length
600 */
601 [AB9540_LDO_AUX1] = {
602 .desc = {
603 .name = "LDO-AUX1",
604 .ops = &ab8500_regulator_volt_mode_ops,
605 .type = REGULATOR_VOLTAGE,
606 .id = AB8500_LDO_AUX1,
607 .owner = THIS_MODULE,
608 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
609 },
610 .min_uV = 1100000,
611 .max_uV = 3300000,
612 .load_lp_uA = 5000,
613 .update_bank = 0x04,
614 .update_reg = 0x09,
615 .update_mask = 0x03,
616 .update_val = 0x01,
617 .update_val_idle = 0x03,
618 .update_val_normal = 0x01,
619 .voltage_bank = 0x04,
620 .voltage_reg = 0x1f,
621 .voltage_mask = 0x0f,
622 .voltages = ldo_vauxn_voltages,
623 .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
624 },
625 [AB9540_LDO_AUX2] = {
626 .desc = {
627 .name = "LDO-AUX2",
628 .ops = &ab8500_regulator_volt_mode_ops,
629 .type = REGULATOR_VOLTAGE,
630 .id = AB8500_LDO_AUX2,
631 .owner = THIS_MODULE,
632 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
633 },
634 .min_uV = 1100000,
635 .max_uV = 3300000,
636 .load_lp_uA = 5000,
637 .update_bank = 0x04,
638 .update_reg = 0x09,
639 .update_mask = 0x0c,
640 .update_val = 0x04,
641 .update_val_idle = 0x0c,
642 .update_val_normal = 0x04,
643 .voltage_bank = 0x04,
644 .voltage_reg = 0x20,
645 .voltage_mask = 0x0f,
646 .voltages = ldo_vauxn_voltages,
647 .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
648 },
649 [AB9540_LDO_AUX3] = {
650 .desc = {
651 .name = "LDO-AUX3",
652 .ops = &ab8500_regulator_volt_mode_ops,
653 .type = REGULATOR_VOLTAGE,
654 .id = AB8500_LDO_AUX3,
655 .owner = THIS_MODULE,
656 .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
657 },
658 .min_uV = 1100000,
659 .max_uV = 3300000,
660 .load_lp_uA = 5000,
661 .update_bank = 0x04,
662 .update_reg = 0x0a,
663 .update_mask = 0x03,
664 .update_val = 0x01,
665 .update_val_idle = 0x03,
666 .update_val_normal = 0x01,
667 .voltage_bank = 0x04,
668 .voltage_reg = 0x21,
669 .voltage_mask = 0x07,
670 .voltages = ldo_vaux3_voltages,
671 .voltages_len = ARRAY_SIZE(ldo_vaux3_voltages),
672 },
673 [AB9540_LDO_AUX4] = {
674 .desc = {
675 .name = "LDO-AUX4",
676 .ops = &ab8500_regulator_volt_mode_ops,
677 .type = REGULATOR_VOLTAGE,
678 .id = AB9540_LDO_AUX4,
679 .owner = THIS_MODULE,
680 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
681 },
682 .min_uV = 1100000,
683 .max_uV = 3300000,
684 .load_lp_uA = 5000,
685 /* values for Vaux4Regu register */
686 .update_bank = 0x04,
687 .update_reg = 0x2e,
688 .update_mask = 0x03,
689 .update_val = 0x01,
690 .update_val_idle = 0x03,
691 .update_val_normal = 0x01,
692 /* values for Vaux4SEL register */
693 .voltage_bank = 0x04,
694 .voltage_reg = 0x2f,
695 .voltage_mask = 0x0f,
696 .voltages = ldo_vauxn_voltages,
697 .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
698 },
699 [AB9540_LDO_INTCORE] = {
700 .desc = {
701 .name = "LDO-INTCORE",
702 .ops = &ab8500_regulator_volt_mode_ops,
703 .type = REGULATOR_VOLTAGE,
704 .id = AB8500_LDO_INTCORE,
705 .owner = THIS_MODULE,
706 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
707 },
708 .min_uV = 1100000,
709 .max_uV = 3300000,
710 .load_lp_uA = 5000,
711 .update_bank = 0x03,
712 .update_reg = 0x80,
713 .update_mask = 0x44,
714 .update_val = 0x44,
715 .update_val_idle = 0x44,
716 .update_val_normal = 0x04,
717 .voltage_bank = 0x03,
718 .voltage_reg = 0x80,
719 .voltage_mask = 0x38,
720 .voltages = ldo_vintcore_voltages,
721 .voltages_len = ARRAY_SIZE(ldo_vintcore_voltages),
722 .voltage_shift = 3,
723 },
590 724
725 /*
726 * Fixed Voltage Regulators
727 * name, fixed mV,
728 * update bank, reg, mask, enable val
729 */
730 [AB9540_LDO_TVOUT] = {
731 .desc = {
732 .name = "LDO-TVOUT",
733 .ops = &ab8500_regulator_mode_ops,
734 .type = REGULATOR_VOLTAGE,
735 .id = AB8500_LDO_TVOUT,
736 .owner = THIS_MODULE,
737 .n_voltages = 1,
738 },
739 .delay = 10000,
740 .fixed_uV = 2000000,
741 .load_lp_uA = 1000,
742 .update_bank = 0x03,
743 .update_reg = 0x80,
744 .update_mask = 0x82,
745 .update_val = 0x02,
746 .update_val_idle = 0x82,
747 .update_val_normal = 0x02,
748 },
749 [AB9540_LDO_USB] = {
750 .desc = {
751 .name = "LDO-USB",
752 .ops = &ab8500_regulator_ops,
753 .type = REGULATOR_VOLTAGE,
754 .id = AB9540_LDO_USB,
755 .owner = THIS_MODULE,
756 .n_voltages = 1,
757 },
758 .fixed_uV = 3300000,
759 .update_bank = 0x03,
760 .update_reg = 0x82,
761 .update_mask = 0x03,
762 .update_val = 0x01,
763 .update_val_idle = 0x03,
764 .update_val_normal = 0x01,
765 },
766 [AB9540_LDO_AUDIO] = {
767 .desc = {
768 .name = "LDO-AUDIO",
769 .ops = &ab8500_regulator_ops,
770 .type = REGULATOR_VOLTAGE,
771 .id = AB8500_LDO_AUDIO,
772 .owner = THIS_MODULE,
773 .n_voltages = 1,
774 },
775 .fixed_uV = 2000000,
776 .update_bank = 0x03,
777 .update_reg = 0x83,
778 .update_mask = 0x02,
779 .update_val = 0x02,
780 },
781 [AB9540_LDO_ANAMIC1] = {
782 .desc = {
783 .name = "LDO-ANAMIC1",
784 .ops = &ab8500_regulator_ops,
785 .type = REGULATOR_VOLTAGE,
786 .id = AB8500_LDO_ANAMIC1,
787 .owner = THIS_MODULE,
788 .n_voltages = 1,
789 },
790 .fixed_uV = 2050000,
791 .update_bank = 0x03,
792 .update_reg = 0x83,
793 .update_mask = 0x08,
794 .update_val = 0x08,
795 },
796 [AB9540_LDO_ANAMIC2] = {
797 .desc = {
798 .name = "LDO-ANAMIC2",
799 .ops = &ab8500_regulator_ops,
800 .type = REGULATOR_VOLTAGE,
801 .id = AB8500_LDO_ANAMIC2,
802 .owner = THIS_MODULE,
803 .n_voltages = 1,
804 },
805 .fixed_uV = 2050000,
806 .update_bank = 0x03,
807 .update_reg = 0x83,
808 .update_mask = 0x10,
809 .update_val = 0x10,
810 },
811 [AB9540_LDO_DMIC] = {
812 .desc = {
813 .name = "LDO-DMIC",
814 .ops = &ab8500_regulator_ops,
815 .type = REGULATOR_VOLTAGE,
816 .id = AB8500_LDO_DMIC,
817 .owner = THIS_MODULE,
818 .n_voltages = 1,
819 },
820 .fixed_uV = 1800000,
821 .update_bank = 0x03,
822 .update_reg = 0x83,
823 .update_mask = 0x04,
824 .update_val = 0x04,
825 },
826
827 /*
828 * Regulators with fixed voltage and normal/idle modes
829 */
830 [AB9540_LDO_ANA] = {
831 .desc = {
832 .name = "LDO-ANA",
833 .ops = &ab8500_regulator_mode_ops,
834 .type = REGULATOR_VOLTAGE,
835 .id = AB8500_LDO_ANA,
836 .owner = THIS_MODULE,
837 .n_voltages = 1,
838 },
839 .fixed_uV = 1200000,
840 .load_lp_uA = 1000,
841 .update_bank = 0x04,
842 .update_reg = 0x06,
843 .update_mask = 0x0c,
844 .update_val = 0x08,
845 .update_val_idle = 0x0c,
846 .update_val_normal = 0x08,
847 },
591}; 848};
592 849
593struct ab8500_reg_init { 850struct ab8500_reg_init {
@@ -603,6 +860,7 @@ struct ab8500_reg_init {
603 .mask = _mask, \ 860 .mask = _mask, \
604 } 861 }
605 862
863/* AB8500 register init */
606static struct ab8500_reg_init ab8500_reg_init[] = { 864static struct ab8500_reg_init ab8500_reg_init[] = {
607 /* 865 /*
608 * 0x30, VanaRequestCtrl 866 * 0x30, VanaRequestCtrl
@@ -773,6 +1031,281 @@ static struct ab8500_reg_init ab8500_reg_init[] = {
773 REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16), 1031 REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
774}; 1032};
775 1033
1034/* AB9540 register init */
1035static struct ab8500_reg_init ab9540_reg_init[] = {
1036 /*
1037 * 0x03, VarmRequestCtrl
1038 * 0x0c, VapeRequestCtrl
1039 * 0x30, Vsmps1RequestCtrl
1040 * 0xc0, Vsmps2RequestCtrl
1041 */
1042 REG_INIT(AB9540_REGUREQUESTCTRL1, 0x03, 0x03, 0xff),
1043 /*
1044 * 0x03, Vsmps3RequestCtrl
1045 * 0x0c, VpllRequestCtrl
1046 * 0x30, VanaRequestCtrl
1047 * 0xc0, VextSupply1RequestCtrl
1048 */
1049 REG_INIT(AB9540_REGUREQUESTCTRL2, 0x03, 0x04, 0xff),
1050 /*
1051 * 0x03, VextSupply2RequestCtrl
1052 * 0x0c, VextSupply3RequestCtrl
1053 * 0x30, Vaux1RequestCtrl
1054 * 0xc0, Vaux2RequestCtrl
1055 */
1056 REG_INIT(AB9540_REGUREQUESTCTRL3, 0x03, 0x05, 0xff),
1057 /*
1058 * 0x03, Vaux3RequestCtrl
1059 * 0x04, SwHPReq
1060 */
1061 REG_INIT(AB9540_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
1062 /*
1063 * 0x01, Vsmps1SysClkReq1HPValid
1064 * 0x02, Vsmps2SysClkReq1HPValid
1065 * 0x04, Vsmps3SysClkReq1HPValid
1066 * 0x08, VanaSysClkReq1HPValid
1067 * 0x10, VpllSysClkReq1HPValid
1068 * 0x20, Vaux1SysClkReq1HPValid
1069 * 0x40, Vaux2SysClkReq1HPValid
1070 * 0x80, Vaux3SysClkReq1HPValid
1071 */
1072 REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
1073 /*
1074 * 0x01, VapeSysClkReq1HPValid
1075 * 0x02, VarmSysClkReq1HPValid
1076 * 0x04, VbbSysClkReq1HPValid
1077 * 0x08, VmodSysClkReq1HPValid
1078 * 0x10, VextSupply1SysClkReq1HPValid
1079 * 0x20, VextSupply2SysClkReq1HPValid
1080 * 0x40, VextSupply3SysClkReq1HPValid
1081 */
1082 REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x7f),
1083 /*
1084 * 0x01, Vsmps1HwHPReq1Valid
1085 * 0x02, Vsmps2HwHPReq1Valid
1086 * 0x04, Vsmps3HwHPReq1Valid
1087 * 0x08, VanaHwHPReq1Valid
1088 * 0x10, VpllHwHPReq1Valid
1089 * 0x20, Vaux1HwHPReq1Valid
1090 * 0x40, Vaux2HwHPReq1Valid
1091 * 0x80, Vaux3HwHPReq1Valid
1092 */
1093 REG_INIT(AB9540_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xff),
1094 /*
1095 * 0x01, VextSupply1HwHPReq1Valid
1096 * 0x02, VextSupply2HwHPReq1Valid
1097 * 0x04, VextSupply3HwHPReq1Valid
1098 * 0x08, VmodHwHPReq1Valid
1099 */
1100 REG_INIT(AB9540_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x0f),
1101 /*
1102 * 0x01, Vsmps1HwHPReq2Valid
1103 * 0x02, Vsmps2HwHPReq2Valid
1104 * 0x03, Vsmps3HwHPReq2Valid
1105 * 0x08, VanaHwHPReq2Valid
1106 * 0x10, VpllHwHPReq2Valid
1107 * 0x20, Vaux1HwHPReq2Valid
1108 * 0x40, Vaux2HwHPReq2Valid
1109 * 0x80, Vaux3HwHPReq2Valid
1110 */
1111 REG_INIT(AB9540_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xff),
1112 /*
1113 * 0x01, VextSupply1HwHPReq2Valid
1114 * 0x02, VextSupply2HwHPReq2Valid
1115 * 0x04, VextSupply3HwHPReq2Valid
1116 * 0x08, VmodHwHPReq2Valid
1117 */
1118 REG_INIT(AB9540_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x0f),
1119 /*
1120 * 0x01, VapeSwHPReqValid
1121 * 0x02, VarmSwHPReqValid
1122 * 0x04, Vsmps1SwHPReqValid
1123 * 0x08, Vsmps2SwHPReqValid
1124 * 0x10, Vsmps3SwHPReqValid
1125 * 0x20, VanaSwHPReqValid
1126 * 0x40, VpllSwHPReqValid
1127 * 0x80, Vaux1SwHPReqValid
1128 */
1129 REG_INIT(AB9540_REGUSWHPREQVALID1, 0x03, 0x0d, 0xff),
1130 /*
1131 * 0x01, Vaux2SwHPReqValid
1132 * 0x02, Vaux3SwHPReqValid
1133 * 0x04, VextSupply1SwHPReqValid
1134 * 0x08, VextSupply2SwHPReqValid
1135 * 0x10, VextSupply3SwHPReqValid
1136 * 0x20, VmodSwHPReqValid
1137 */
1138 REG_INIT(AB9540_REGUSWHPREQVALID2, 0x03, 0x0e, 0x3f),
1139 /*
1140 * 0x02, SysClkReq2Valid1
1141 * ...
1142 * 0x80, SysClkReq8Valid1
1143 */
1144 REG_INIT(AB9540_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe),
1145 /*
1146 * 0x02, SysClkReq2Valid2
1147 * ...
1148 * 0x80, SysClkReq8Valid2
1149 */
1150 REG_INIT(AB9540_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe),
1151 /*
1152 * 0x01, Vaux4SwHPReqValid
1153 * 0x02, Vaux4HwHPReq2Valid
1154 * 0x04, Vaux4HwHPReq1Valid
1155 * 0x08, Vaux4SysClkReq1HPValid
1156 */
1157 REG_INIT(AB9540_REGUVAUX4REQVALID, 0x03, 0x11, 0x0f),
1158 /*
1159 * 0x02, VTVoutEna
1160 * 0x04, Vintcore12Ena
1161 * 0x38, Vintcore12Sel
1162 * 0x40, Vintcore12LP
1163 * 0x80, VTVoutLP
1164 */
1165 REG_INIT(AB9540_REGUMISC1, 0x03, 0x80, 0xfe),
1166 /*
1167 * 0x02, VaudioEna
1168 * 0x04, VdmicEna
1169 * 0x08, Vamic1Ena
1170 * 0x10, Vamic2Ena
1171 */
1172 REG_INIT(AB9540_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
1173 /*
1174 * 0x01, Vamic1_dzout
1175 * 0x02, Vamic2_dzout
1176 */
1177 REG_INIT(AB9540_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
1178 /*
1179 * 0x03, Vsmps1Regu
1180 * 0x0c, Vsmps1SelCtrl
1181 * 0x10, Vsmps1AutoMode
1182 * 0x20, Vsmps1PWMMode
1183 */
1184 REG_INIT(AB9540_VSMPS1REGU, 0x04, 0x03, 0x3f),
1185 /*
1186 * 0x03, Vsmps2Regu
1187 * 0x0c, Vsmps2SelCtrl
1188 * 0x10, Vsmps2AutoMode
1189 * 0x20, Vsmps2PWMMode
1190 */
1191 REG_INIT(AB9540_VSMPS2REGU, 0x04, 0x04, 0x3f),
1192 /*
1193 * 0x03, Vsmps3Regu
1194 * 0x0c, Vsmps3SelCtrl
1195 * NOTE! PRCMU register
1196 */
1197 REG_INIT(AB9540_VSMPS3REGU, 0x04, 0x05, 0x0f),
1198 /*
1199 * 0x03, VpllRegu
1200 * 0x0c, VanaRegu
1201 */
1202 REG_INIT(AB9540_VPLLVANAREGU, 0x04, 0x06, 0x0f),
1203 /*
1204 * 0x03, VextSupply1Regu
1205 * 0x0c, VextSupply2Regu
1206 * 0x30, VextSupply3Regu
1207 * 0x40, ExtSupply2Bypass
1208 * 0x80, ExtSupply3Bypass
1209 */
1210 REG_INIT(AB9540_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
1211 /*
1212 * 0x03, Vaux1Regu
1213 * 0x0c, Vaux2Regu
1214 */
1215 REG_INIT(AB9540_VAUX12REGU, 0x04, 0x09, 0x0f),
1216 /*
1217 * 0x0c, Vrf1Regu
1218 * 0x03, Vaux3Regu
1219 */
1220 REG_INIT(AB9540_VRF1VAUX3REGU, 0x04, 0x0a, 0x0f),
1221 /*
1222 * 0x3f, Vsmps1Sel1
1223 */
1224 REG_INIT(AB9540_VSMPS1SEL1, 0x04, 0x13, 0x3f),
1225 /*
1226 * 0x3f, Vsmps1Sel2
1227 */
1228 REG_INIT(AB9540_VSMPS1SEL2, 0x04, 0x14, 0x3f),
1229 /*
1230 * 0x3f, Vsmps1Sel3
1231 */
1232 REG_INIT(AB9540_VSMPS1SEL3, 0x04, 0x15, 0x3f),
1233 /*
1234 * 0x3f, Vsmps2Sel1
1235 */
1236 REG_INIT(AB9540_VSMPS2SEL1, 0x04, 0x17, 0x3f),
1237 /*
1238 * 0x3f, Vsmps2Sel2
1239 */
1240 REG_INIT(AB9540_VSMPS2SEL2, 0x04, 0x18, 0x3f),
1241 /*
1242 * 0x3f, Vsmps2Sel3
1243 */
1244 REG_INIT(AB9540_VSMPS2SEL3, 0x04, 0x19, 0x3f),
1245 /*
1246 * 0x7f, Vsmps3Sel1
1247 * NOTE! PRCMU register
1248 */
1249 REG_INIT(AB9540_VSMPS3SEL1, 0x04, 0x1b, 0x7f),
1250 /*
1251 * 0x7f, Vsmps3Sel2
1252 * NOTE! PRCMU register
1253 */
1254 REG_INIT(AB9540_VSMPS3SEL2, 0x04, 0x1c, 0x7f),
1255 /*
1256 * 0x0f, Vaux1Sel
1257 */
1258 REG_INIT(AB9540_VAUX1SEL, 0x04, 0x1f, 0x0f),
1259 /*
1260 * 0x0f, Vaux2Sel
1261 */
1262 REG_INIT(AB9540_VAUX2SEL, 0x04, 0x20, 0x0f),
1263 /*
1264 * 0x07, Vaux3Sel
1265 * 0x30, Vrf1Sel
1266 */
1267 REG_INIT(AB9540_VRF1VAUX3SEL, 0x04, 0x21, 0x37),
1268 /*
1269 * 0x01, VextSupply12LP
1270 */
1271 REG_INIT(AB9540_REGUCTRL2SPARE, 0x04, 0x22, 0x01),
1272 /*
1273 * 0x03, Vaux4RequestCtrl
1274 */
1275 REG_INIT(AB9540_VAUX4REQCTRL, 0x04, 0x2d, 0x03),
1276 /*
1277 * 0x03, Vaux4Regu
1278 */
1279 REG_INIT(AB9540_VAUX4REGU, 0x04, 0x2e, 0x03),
1280 /*
1281 * 0x08, Vaux4Sel
1282 */
1283 REG_INIT(AB9540_VAUX4SEL, 0x04, 0x2f, 0x0f),
1284 /*
1285 * 0x01, VpllDisch
1286 * 0x02, Vrf1Disch
1287 * 0x04, Vaux1Disch
1288 * 0x08, Vaux2Disch
1289 * 0x10, Vaux3Disch
1290 * 0x20, Vintcore12Disch
1291 * 0x40, VTVoutDisch
1292 * 0x80, VaudioDisch
1293 */
1294 REG_INIT(AB9540_REGUCTRLDISCH, 0x04, 0x43, 0xff),
1295 /*
1296 * 0x01, VsimDisch
1297 * 0x02, VanaDisch
1298 * 0x04, VdmicPullDownEna
1299 * 0x08, VpllPullDownEna
1300 * 0x10, VdmicDisch
1301 */
1302 REG_INIT(AB9540_REGUCTRLDISCH2, 0x04, 0x44, 0x1f),
1303 /*
1304 * 0x01, Vaux4Disch
1305 */
1306 REG_INIT(AB9540_REGUCTRLDISCH3, 0x04, 0x48, 0x01),
1307};
1308
776static int ab8500_regulator_init_registers(struct platform_device *pdev, 1309static int ab8500_regulator_init_registers(struct platform_device *pdev,
777 struct ab8500_reg_init *reg_init, 1310 struct ab8500_reg_init *reg_init,
778 int id, int mask, int value) 1311 int id, int mask, int value)
@@ -809,6 +1342,7 @@ static int ab8500_regulator_register(struct platform_device *pdev,
809 struct ab8500_regulator_info *regulator_info, 1342 struct ab8500_regulator_info *regulator_info,
810 int id, struct device_node *np) 1343 int id, struct device_node *np)
811{ 1344{
1345 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
812 struct ab8500_regulator_info *info = NULL; 1346 struct ab8500_regulator_info *info = NULL;
813 struct regulator_config config = { }; 1347 struct regulator_config config = { };
814 int err; 1348 int err;
@@ -823,7 +1357,7 @@ static int ab8500_regulator_register(struct platform_device *pdev,
823 config.of_node = np; 1357 config.of_node = np;
824 1358
825 /* fix for hardware before ab8500v2.0 */ 1359 /* fix for hardware before ab8500v2.0 */
826 if (abx500_get_chip_id(info->dev) < 0x20) { 1360 if (is_ab8500_1p1_or_earlier(ab8500)) {
827 if (info->desc.id == AB8500_LDO_AUX3) { 1361 if (info->desc.id == AB8500_LDO_AUX3) {
828 info->desc.n_voltages = 1362 info->desc.n_voltages =
829 ARRAY_SIZE(ldo_vauxn_voltages); 1363 ARRAY_SIZE(ldo_vauxn_voltages);
@@ -862,6 +1396,20 @@ static struct of_regulator_match ab8500_regulator_match[] = {
862 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, }, 1396 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, },
863}; 1397};
864 1398
1399static struct of_regulator_match ab9540_regulator_match[] = {
1400 { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB9540_LDO_AUX1, },
1401 { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB9540_LDO_AUX2, },
1402 { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB9540_LDO_AUX3, },
1403 { .name = "ab8500_ldo_aux4", .driver_data = (void *) AB9540_LDO_AUX4, },
1404 { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB9540_LDO_INTCORE, },
1405 { .name = "ab8500_ldo_tvout", .driver_data = (void *) AB9540_LDO_TVOUT, },
1406 { .name = "ab8500_ldo_audio", .driver_data = (void *) AB9540_LDO_AUDIO, },
1407 { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB9540_LDO_ANAMIC1, },
1408 { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB9540_LDO_ANAMIC2, },
1409 { .name = "ab8500_ldo_dmic", .driver_data = (void *) AB9540_LDO_DMIC, },
1410 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB9540_LDO_ANA, },
1411};
1412
865static int 1413static int
866ab8500_regulator_of_probe(struct platform_device *pdev, 1414ab8500_regulator_of_probe(struct platform_device *pdev,
867 struct ab8500_regulator_info *regulator_info, 1415 struct ab8500_regulator_info *regulator_info,
@@ -895,12 +1443,21 @@ static int ab8500_regulator_probe(struct platform_device *pdev)
895 struct ab8500_reg_init *reg_init; 1443 struct ab8500_reg_init *reg_init;
896 int reg_init_size; 1444 int reg_init_size;
897 1445
898 regulator_info = ab8500_regulator_info; 1446 if (is_ab9540(ab8500)) {
899 regulator_info_size = ARRAY_SIZE(ab8500_regulator_info); 1447 regulator_info = ab9540_regulator_info;
900 reg_init = ab8500_reg_init; 1448 regulator_info_size = ARRAY_SIZE(ab9540_regulator_info);
901 reg_init_size = AB8500_NUM_REGULATOR_REGISTERS; 1449 reg_init = ab9540_reg_init;
902 match = ab8500_regulator_match; 1450 reg_init_size = AB9540_NUM_REGULATOR_REGISTERS;
903 match_size = ARRAY_SIZE(ab8500_regulator_match) 1451 match = ab9540_regulator_match;
1452 match_size = ARRAY_SIZE(ab9540_regulator_match)
1453 } else {
1454 regulator_info = ab8500_regulator_info;
1455 regulator_info_size = ARRAY_SIZE(ab8500_regulator_info);
1456 reg_init = ab8500_reg_init;
1457 reg_init_size = AB8500_NUM_REGULATOR_REGISTERS;
1458 match = ab8500_regulator_match;
1459 match_size = ARRAY_SIZE(ab8500_regulator_match)
1460 }
904 1461
905 if (np) { 1462 if (np) {
906 err = of_regulator_match(&pdev->dev, np, match, match_size); 1463 err = of_regulator_match(&pdev->dev, np, match, match_size);
@@ -978,11 +1535,18 @@ static int ab8500_regulator_probe(struct platform_device *pdev)
978static int ab8500_regulator_remove(struct platform_device *pdev) 1535static int ab8500_regulator_remove(struct platform_device *pdev)
979{ 1536{
980 int i, err; 1537 int i, err;
1538 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
981 struct ab8500_regulator_info *regulator_info; 1539 struct ab8500_regulator_info *regulator_info;
982 int regulator_info_size; 1540 int regulator_info_size;
983 1541
984 regulator_info = ab8500_regulator_info; 1542
985 regulator_info_size = ARRAY_SIZE(ab8500_regulator_info); 1543 if (is_ab9540(ab8500)) {
1544 regulator_info = ab9540_regulator_info;
1545 regulator_info_size = ARRAY_SIZE(ab9540_regulator_info);
1546 } else {
1547 regulator_info = ab8500_regulator_info;
1548 regulator_info_size = ARRAY_SIZE(ab8500_regulator_info);
1549 }
986 1550
987 for (i = 0; i < regulator_info_size; i++) { 1551 for (i = 0; i < regulator_info_size; i++) {
988 struct ab8500_regulator_info *info = NULL; 1552 struct ab8500_regulator_info *info = NULL;
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-28 18:37:46 -0500