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authorAlexandre Bounine <alexandre.bounine@idt.com>2012-08-21 19:16:11 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-08-21 19:45:03 -0400
commit3670e7e12e582c6d67761275d148171feb7a9004 (patch)
tree525e8404188dfdde56d3fc0731da3e50947a01ff /drivers/rapidio/devices/tsi721.c
parent7dbfb315b2aaef0a115765946bf3026d074c33a7 (diff)
rapidio/tsi721: fix inbound doorbell interrupt handling
Make sure that there is no doorbell messages left behind due to disabled interrupts during inbound doorbell processing. The most common case for this bug is loss of rionet JOIN messages in systems with three or more rionet participants and MSI or MSI-X enabled. As result, requests for packet transfers may finish with "destination unreachable" error message. This patch is applicable to kernel versions starting from v3.2. Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com> Cc: Matt Porter <mporter@kernel.crashing.org> Cc: <stable@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/rapidio/devices/tsi721.c')
-rw-r--r--drivers/rapidio/devices/tsi721.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/rapidio/devices/tsi721.c b/drivers/rapidio/devices/tsi721.c
index 722246cf20ab..c0d6a049cbd6 100644
--- a/drivers/rapidio/devices/tsi721.c
+++ b/drivers/rapidio/devices/tsi721.c
@@ -435,6 +435,9 @@ static void tsi721_db_dpc(struct work_struct *work)
435 " info %4.4x\n", DBELL_SID(idb.bytes), 435 " info %4.4x\n", DBELL_SID(idb.bytes),
436 DBELL_TID(idb.bytes), DBELL_INF(idb.bytes)); 436 DBELL_TID(idb.bytes), DBELL_INF(idb.bytes));
437 } 437 }
438
439 wr_ptr = ioread32(priv->regs +
440 TSI721_IDQ_WP(IDB_QUEUE)) % IDB_QSIZE;
438 } 441 }
439 442
440 iowrite32(rd_ptr & (IDB_QSIZE - 1), 443 iowrite32(rd_ptr & (IDB_QSIZE - 1),
@@ -445,6 +448,10 @@ static void tsi721_db_dpc(struct work_struct *work)
445 regval |= TSI721_SR_CHINT_IDBQRCV; 448 regval |= TSI721_SR_CHINT_IDBQRCV;
446 iowrite32(regval, 449 iowrite32(regval,
447 priv->regs + TSI721_SR_CHINTE(IDB_QUEUE)); 450 priv->regs + TSI721_SR_CHINTE(IDB_QUEUE));
451
452 wr_ptr = ioread32(priv->regs + TSI721_IDQ_WP(IDB_QUEUE)) % IDB_QSIZE;
453 if (wr_ptr != rd_ptr)
454 schedule_work(&priv->idb_work);
448} 455}
449 456
450/** 457/**