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authorTony Prisk <linux@prisktech.co.nz>2012-11-19 12:44:46 -0500
committerThierry Reding <thierry.reding@avionic-design.de>2012-11-22 16:47:12 -0500
commit422470a8265fbb1d182c00ab2421f4b416ab2dba (patch)
treeaacef5cee631f3a0a15b0f927cc06151a3ce4eca /drivers/pwm
parent2f9569f7ceab31242b306d040861737580e1876f (diff)
pwm: vt8500: Ensure PWM clock is enabled during pwm_config
This patch corrects a bug reported by Peter Vasil. When all PWMs are disabled, PWM module may be disabled during calls to pwm_config. This patch enables/disables the clock in pwm_config to ensure the module is active before register read/ writes. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Tested-by: Peter Vasil <petervasil@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Diffstat (limited to 'drivers/pwm')
-rw-r--r--drivers/pwm/pwm-vt8500.c14
1 files changed, 12 insertions, 2 deletions
diff --git a/drivers/pwm/pwm-vt8500.c b/drivers/pwm/pwm-vt8500.c
index 806f72c2421f..b0ba2d403439 100644
--- a/drivers/pwm/pwm-vt8500.c
+++ b/drivers/pwm/pwm-vt8500.c
@@ -62,6 +62,13 @@ static int vt8500_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
62 struct vt8500_chip *vt8500 = to_vt8500_chip(chip); 62 struct vt8500_chip *vt8500 = to_vt8500_chip(chip);
63 unsigned long long c; 63 unsigned long long c;
64 unsigned long period_cycles, prescale, pv, dc; 64 unsigned long period_cycles, prescale, pv, dc;
65 int err;
66
67 err = clk_enable(vt8500->clk);
68 if (err < 0) {
69 dev_err(chip->dev, "failed to enable clock\n");
70 return err;
71 }
65 72
66 c = clk_get_rate(vt8500->clk); 73 c = clk_get_rate(vt8500->clk);
67 c = c * period_ns; 74 c = c * period_ns;
@@ -75,8 +82,10 @@ static int vt8500_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
75 if (pv > 4095) 82 if (pv > 4095)
76 pv = 4095; 83 pv = 4095;
77 84
78 if (prescale > 1023) 85 if (prescale > 1023) {
86 clk_disable(vt8500->clk);
79 return -EINVAL; 87 return -EINVAL;
88 }
80 89
81 c = (unsigned long long)pv * duty_ns; 90 c = (unsigned long long)pv * duty_ns;
82 do_div(c, period_ns); 91 do_div(c, period_ns);
@@ -91,6 +100,7 @@ static int vt8500_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
91 pwm_busy_wait(vt8500->base + 0x40 + pwm->hwpwm, (1 << 3)); 100 pwm_busy_wait(vt8500->base + 0x40 + pwm->hwpwm, (1 << 3));
92 writel(dc, vt8500->base + 0xc + (pwm->hwpwm << 4)); 101 writel(dc, vt8500->base + 0xc + (pwm->hwpwm << 4));
93 102
103 clk_disable(vt8500->clk);
94 return 0; 104 return 0;
95} 105}
96 106
@@ -103,7 +113,7 @@ static int vt8500_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
103 if (err < 0) { 113 if (err < 0) {
104 dev_err(chip->dev, "failed to enable clock\n"); 114 dev_err(chip->dev, "failed to enable clock\n");
105 return err; 115 return err;
106 }; 116 }
107 117
108 pwm_busy_wait(vt8500->base + 0x40 + pwm->hwpwm, (1 << 0)); 118 pwm_busy_wait(vt8500->base + 0x40 + pwm->hwpwm, (1 << 0));
109 writel(5, vt8500->base + (pwm->hwpwm << 4)); 119 writel(5, vt8500->base + (pwm->hwpwm << 4));