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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-10 07:15:24 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-10 07:15:24 -0400
commit2474542f64432398f503373f53bdf620491bcfa8 (patch)
tree3c9744b138c2158757530814b35c23eed31cf6ce /drivers/pwm/pwm-imx.c
parentc7a6ced9d8e8411bdafe83998474d185a79badc3 (diff)
parent85f8879ca4f3d26a7f473522101fb74a79bda3f2 (diff)
Merge tag 'for-3.7-rc1' of git://gitorious.org/linux-pwm/linux-pwm
Pull pwm changes from Thierry Reding: "All legacy PWM providers have now been moved to the PWM subsystem. The plan for 3.8 is to adapt all board files to provide a lookup table for PWM devices in order to get rid of the global namespace. Subsequently, users of the legacy pwm_request() and pwm_free() functions can be migrated to the new pwm_get() and pwm_put() functions. Once this has been completed, the legacy API and the compatibility code in the core can be removed. In addition to the above, these changes also add support for configuring the polarity of a PWM signal (currently only supported on ECAP and EHRPWM) and include a much needed rework of the i.MX driver. Managed functions to obtain and release a PWM device (devm_pwm_get() and devm_pwm_put()) have been added and the pwm-backlight driver has been updated to use them. If the PWM subsystem hasn't been enabled, dummy functions are provided that allow the subsystem to safely compile out. Some common checks on input parameters have been moved to the core and removed from the drivers. Finally, a small fix corrects the description of the PWM specifier's second cell in the device tree representation." * tag 'for-3.7-rc1' of git://gitorious.org/linux-pwm/linux-pwm: (23 commits) pwm: dt: Fix description of second PWM cell pwm: Check for negative duty-cycle and period pwm: Add Ingenic JZ4740 support MIPS: JZ4740: Export timer API pwm: Move PUV3 PWM driver to PWM framework unicore32: pwm: Use managed resource allocations unicore32: pwm: Remove unnecessary indirection unicore32: pwm: Use module_platform_driver() unicore32: pwm: Properly remap memory-mapped registers pwm-backlight: Use devm_pwm_get() instead of pwm_get() pwm: Move AB8500 PWM driver to PWM framework pwm: Fix compilation error when CONFIG_PWM is not defined pwm: i.MX: fix clock lookup pwm: i.MX: use per clock unconditionally pwm: i.MX: add devicetree support pwm: i.MX: Use module_platform_driver pwm: i.MX: add functions to enable/disable pwm. pwm: i.MX: remove unnecessary if in pwm_[en|dis]able pwm: i.MX: factor out SoC specific functions pwm: pwm-tiehrpwm: Add support for configuring polarity of PWM ...
Diffstat (limited to 'drivers/pwm/pwm-imx.c')
-rw-r--r--drivers/pwm/pwm-imx.c278
1 files changed, 182 insertions, 96 deletions
diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c
index 2a0b35333972..8a5d3ae2946a 100644
--- a/drivers/pwm/pwm-imx.c
+++ b/drivers/pwm/pwm-imx.c
@@ -16,8 +16,7 @@
16#include <linux/clk.h> 16#include <linux/clk.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/pwm.h> 18#include <linux/pwm.h>
19#include <mach/hardware.h> 19#include <linux/of_device.h>
20
21 20
22/* i.MX1 and i.MX21 share the same PWM function block: */ 21/* i.MX1 and i.MX21 share the same PWM function block: */
23 22
@@ -25,6 +24,7 @@
25#define MX1_PWMS 0x04 /* PWM Sample Register */ 24#define MX1_PWMS 0x04 /* PWM Sample Register */
26#define MX1_PWMP 0x08 /* PWM Period Register */ 25#define MX1_PWMP 0x08 /* PWM Period Register */
27 26
27#define MX1_PWMC_EN (1 << 4)
28 28
29/* i.MX27, i.MX31, i.MX35 share the same PWM function block: */ 29/* i.MX27, i.MX31, i.MX35 share the same PWM function block: */
30 30
@@ -40,110 +40,165 @@
40#define MX3_PWMCR_EN (1 << 0) 40#define MX3_PWMCR_EN (1 << 0)
41 41
42struct imx_chip { 42struct imx_chip {
43 struct clk *clk; 43 struct clk *clk_per;
44 struct clk *clk_ipg;
44 45
45 int clk_enabled; 46 int enabled;
46 void __iomem *mmio_base; 47 void __iomem *mmio_base;
47 48
48 struct pwm_chip chip; 49 struct pwm_chip chip;
50
51 int (*config)(struct pwm_chip *chip,
52 struct pwm_device *pwm, int duty_ns, int period_ns);
53 void (*set_enable)(struct pwm_chip *chip, bool enable);
49}; 54};
50 55
51#define to_imx_chip(chip) container_of(chip, struct imx_chip, chip) 56#define to_imx_chip(chip) container_of(chip, struct imx_chip, chip)
52 57
53static int imx_pwm_config(struct pwm_chip *chip, 58static int imx_pwm_config_v1(struct pwm_chip *chip,
54 struct pwm_device *pwm, int duty_ns, int period_ns) 59 struct pwm_device *pwm, int duty_ns, int period_ns)
55{ 60{
56 struct imx_chip *imx = to_imx_chip(chip); 61 struct imx_chip *imx = to_imx_chip(chip);
57 62
58 if (!(cpu_is_mx1() || cpu_is_mx21())) { 63 /*
59 unsigned long long c; 64 * The PWM subsystem allows for exact frequencies. However,
60 unsigned long period_cycles, duty_cycles, prescale; 65 * I cannot connect a scope on my device to the PWM line and
61 u32 cr; 66 * thus cannot provide the program the PWM controller
62 67 * exactly. Instead, I'm relying on the fact that the
63 c = clk_get_rate(imx->clk); 68 * Bootloader (u-boot or WinCE+haret) has programmed the PWM
64 c = c * period_ns; 69 * function group already. So I'll just modify the PWM sample
65 do_div(c, 1000000000); 70 * register to follow the ratio of duty_ns vs. period_ns
66 period_cycles = c; 71 * accordingly.
67 72 *
68 prescale = period_cycles / 0x10000 + 1; 73 * This is good enough for programming the brightness of
69 74 * the LCD backlight.
70 period_cycles /= prescale; 75 *
71 c = (unsigned long long)period_cycles * duty_ns; 76 * The real implementation would divide PERCLK[0] first by
72 do_div(c, period_ns); 77 * both the prescaler (/1 .. /128) and then by CLKSEL
73 duty_cycles = c; 78 * (/2 .. /16).
74 79 */
75 /* 80 u32 max = readl(imx->mmio_base + MX1_PWMP);
76 * according to imx pwm RM, the real period value should be 81 u32 p = max * duty_ns / period_ns;
77 * PERIOD value in PWMPR plus 2. 82 writel(max - p, imx->mmio_base + MX1_PWMS);
78 */
79 if (period_cycles > 2)
80 period_cycles -= 2;
81 else
82 period_cycles = 0;
83
84 writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
85 writel(period_cycles, imx->mmio_base + MX3_PWMPR);
86
87 cr = MX3_PWMCR_PRESCALER(prescale) |
88 MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
89 MX3_PWMCR_DBGEN | MX3_PWMCR_EN;
90
91 if (cpu_is_mx25())
92 cr |= MX3_PWMCR_CLKSRC_IPG;
93 else
94 cr |= MX3_PWMCR_CLKSRC_IPG_HIGH;
95
96 writel(cr, imx->mmio_base + MX3_PWMCR);
97 } else if (cpu_is_mx1() || cpu_is_mx21()) {
98 /* The PWM subsystem allows for exact frequencies. However,
99 * I cannot connect a scope on my device to the PWM line and
100 * thus cannot provide the program the PWM controller
101 * exactly. Instead, I'm relying on the fact that the
102 * Bootloader (u-boot or WinCE+haret) has programmed the PWM
103 * function group already. So I'll just modify the PWM sample
104 * register to follow the ratio of duty_ns vs. period_ns
105 * accordingly.
106 *
107 * This is good enough for programming the brightness of
108 * the LCD backlight.
109 *
110 * The real implementation would divide PERCLK[0] first by
111 * both the prescaler (/1 .. /128) and then by CLKSEL
112 * (/2 .. /16).
113 */
114 u32 max = readl(imx->mmio_base + MX1_PWMP);
115 u32 p = max * duty_ns / period_ns;
116 writel(max - p, imx->mmio_base + MX1_PWMS);
117 } else {
118 BUG();
119 }
120 83
121 return 0; 84 return 0;
122} 85}
123 86
87static void imx_pwm_set_enable_v1(struct pwm_chip *chip, bool enable)
88{
89 struct imx_chip *imx = to_imx_chip(chip);
90 u32 val;
91
92 val = readl(imx->mmio_base + MX1_PWMC);
93
94 if (enable)
95 val |= MX1_PWMC_EN;
96 else
97 val &= ~MX1_PWMC_EN;
98
99 writel(val, imx->mmio_base + MX1_PWMC);
100}
101
102static int imx_pwm_config_v2(struct pwm_chip *chip,
103 struct pwm_device *pwm, int duty_ns, int period_ns)
104{
105 struct imx_chip *imx = to_imx_chip(chip);
106 unsigned long long c;
107 unsigned long period_cycles, duty_cycles, prescale;
108 u32 cr;
109
110 c = clk_get_rate(imx->clk_per);
111 c = c * period_ns;
112 do_div(c, 1000000000);
113 period_cycles = c;
114
115 prescale = period_cycles / 0x10000 + 1;
116
117 period_cycles /= prescale;
118 c = (unsigned long long)period_cycles * duty_ns;
119 do_div(c, period_ns);
120 duty_cycles = c;
121
122 /*
123 * according to imx pwm RM, the real period value should be
124 * PERIOD value in PWMPR plus 2.
125 */
126 if (period_cycles > 2)
127 period_cycles -= 2;
128 else
129 period_cycles = 0;
130
131 writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
132 writel(period_cycles, imx->mmio_base + MX3_PWMPR);
133
134 cr = MX3_PWMCR_PRESCALER(prescale) |
135 MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
136 MX3_PWMCR_DBGEN | MX3_PWMCR_CLKSRC_IPG_HIGH;
137
138 if (imx->enabled)
139 cr |= MX3_PWMCR_EN;
140
141 writel(cr, imx->mmio_base + MX3_PWMCR);
142
143 return 0;
144}
145
146static void imx_pwm_set_enable_v2(struct pwm_chip *chip, bool enable)
147{
148 struct imx_chip *imx = to_imx_chip(chip);
149 u32 val;
150
151 val = readl(imx->mmio_base + MX3_PWMCR);
152
153 if (enable)
154 val |= MX3_PWMCR_EN;
155 else
156 val &= ~MX3_PWMCR_EN;
157
158 writel(val, imx->mmio_base + MX3_PWMCR);
159}
160
161static int imx_pwm_config(struct pwm_chip *chip,
162 struct pwm_device *pwm, int duty_ns, int period_ns)
163{
164 struct imx_chip *imx = to_imx_chip(chip);
165 int ret;
166
167 ret = clk_prepare_enable(imx->clk_ipg);
168 if (ret)
169 return ret;
170
171 ret = imx->config(chip, pwm, duty_ns, period_ns);
172
173 clk_disable_unprepare(imx->clk_ipg);
174
175 return ret;
176}
177
124static int imx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) 178static int imx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
125{ 179{
126 struct imx_chip *imx = to_imx_chip(chip); 180 struct imx_chip *imx = to_imx_chip(chip);
127 int rc = 0; 181 int ret;
128 182
129 if (!imx->clk_enabled) { 183 ret = clk_prepare_enable(imx->clk_per);
130 rc = clk_prepare_enable(imx->clk); 184 if (ret)
131 if (!rc) 185 return ret;
132 imx->clk_enabled = 1; 186
133 } 187 imx->set_enable(chip, true);
134 return rc; 188
189 imx->enabled = 1;
190
191 return 0;
135} 192}
136 193
137static void imx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) 194static void imx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
138{ 195{
139 struct imx_chip *imx = to_imx_chip(chip); 196 struct imx_chip *imx = to_imx_chip(chip);
140 197
141 writel(0, imx->mmio_base + MX3_PWMCR); 198 imx->set_enable(chip, false);
142 199
143 if (imx->clk_enabled) { 200 clk_disable_unprepare(imx->clk_per);
144 clk_disable_unprepare(imx->clk); 201 imx->enabled = 0;
145 imx->clk_enabled = 0;
146 }
147} 202}
148 203
149static struct pwm_ops imx_pwm_ops = { 204static struct pwm_ops imx_pwm_ops = {
@@ -153,30 +208,66 @@ static struct pwm_ops imx_pwm_ops = {
153 .owner = THIS_MODULE, 208 .owner = THIS_MODULE,
154}; 209};
155 210
211struct imx_pwm_data {
212 int (*config)(struct pwm_chip *chip,
213 struct pwm_device *pwm, int duty_ns, int period_ns);
214 void (*set_enable)(struct pwm_chip *chip, bool enable);
215};
216
217static struct imx_pwm_data imx_pwm_data_v1 = {
218 .config = imx_pwm_config_v1,
219 .set_enable = imx_pwm_set_enable_v1,
220};
221
222static struct imx_pwm_data imx_pwm_data_v2 = {
223 .config = imx_pwm_config_v2,
224 .set_enable = imx_pwm_set_enable_v2,
225};
226
227static const struct of_device_id imx_pwm_dt_ids[] = {
228 { .compatible = "fsl,imx1-pwm", .data = &imx_pwm_data_v1, },
229 { .compatible = "fsl,imx27-pwm", .data = &imx_pwm_data_v2, },
230 { /* sentinel */ }
231};
232MODULE_DEVICE_TABLE(of, imx_pwm_dt_ids);
233
156static int __devinit imx_pwm_probe(struct platform_device *pdev) 234static int __devinit imx_pwm_probe(struct platform_device *pdev)
157{ 235{
236 const struct of_device_id *of_id =
237 of_match_device(imx_pwm_dt_ids, &pdev->dev);
238 struct imx_pwm_data *data;
158 struct imx_chip *imx; 239 struct imx_chip *imx;
159 struct resource *r; 240 struct resource *r;
160 int ret = 0; 241 int ret = 0;
161 242
243 if (!of_id)
244 return -ENODEV;
245
162 imx = devm_kzalloc(&pdev->dev, sizeof(*imx), GFP_KERNEL); 246 imx = devm_kzalloc(&pdev->dev, sizeof(*imx), GFP_KERNEL);
163 if (imx == NULL) { 247 if (imx == NULL) {
164 dev_err(&pdev->dev, "failed to allocate memory\n"); 248 dev_err(&pdev->dev, "failed to allocate memory\n");
165 return -ENOMEM; 249 return -ENOMEM;
166 } 250 }
167 251
168 imx->clk = devm_clk_get(&pdev->dev, "pwm"); 252 imx->clk_per = devm_clk_get(&pdev->dev, "per");
253 if (IS_ERR(imx->clk_per)) {
254 dev_err(&pdev->dev, "getting per clock failed with %ld\n",
255 PTR_ERR(imx->clk_per));
256 return PTR_ERR(imx->clk_per);
257 }
169 258
170 if (IS_ERR(imx->clk)) 259 imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
171 return PTR_ERR(imx->clk); 260 if (IS_ERR(imx->clk_ipg)) {
261 dev_err(&pdev->dev, "getting ipg clock failed with %ld\n",
262 PTR_ERR(imx->clk_ipg));
263 return PTR_ERR(imx->clk_ipg);
264 }
172 265
173 imx->chip.ops = &imx_pwm_ops; 266 imx->chip.ops = &imx_pwm_ops;
174 imx->chip.dev = &pdev->dev; 267 imx->chip.dev = &pdev->dev;
175 imx->chip.base = -1; 268 imx->chip.base = -1;
176 imx->chip.npwm = 1; 269 imx->chip.npwm = 1;
177 270
178 imx->clk_enabled = 0;
179
180 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 271 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
181 if (r == NULL) { 272 if (r == NULL) {
182 dev_err(&pdev->dev, "no memory resource defined\n"); 273 dev_err(&pdev->dev, "no memory resource defined\n");
@@ -187,6 +278,10 @@ static int __devinit imx_pwm_probe(struct platform_device *pdev)
187 if (imx->mmio_base == NULL) 278 if (imx->mmio_base == NULL)
188 return -EADDRNOTAVAIL; 279 return -EADDRNOTAVAIL;
189 280
281 data = of_id->data;
282 imx->config = data->config;
283 imx->set_enable = data->set_enable;
284
190 ret = pwmchip_add(&imx->chip); 285 ret = pwmchip_add(&imx->chip);
191 if (ret < 0) 286 if (ret < 0)
192 return ret; 287 return ret;
@@ -208,23 +303,14 @@ static int __devexit imx_pwm_remove(struct platform_device *pdev)
208 303
209static struct platform_driver imx_pwm_driver = { 304static struct platform_driver imx_pwm_driver = {
210 .driver = { 305 .driver = {
211 .name = "mxc_pwm", 306 .name = "imx-pwm",
307 .of_match_table = of_match_ptr(imx_pwm_dt_ids),
212 }, 308 },
213 .probe = imx_pwm_probe, 309 .probe = imx_pwm_probe,
214 .remove = __devexit_p(imx_pwm_remove), 310 .remove = __devexit_p(imx_pwm_remove),
215}; 311};
216 312
217static int __init imx_pwm_init(void) 313module_platform_driver(imx_pwm_driver);
218{
219 return platform_driver_register(&imx_pwm_driver);
220}
221arch_initcall(imx_pwm_init);
222
223static void __exit imx_pwm_exit(void)
224{
225 platform_driver_unregister(&imx_pwm_driver);
226}
227module_exit(imx_pwm_exit);
228 314
229MODULE_LICENSE("GPL v2"); 315MODULE_LICENSE("GPL v2");
230MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>"); 316MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");