Merge tag 'pm+acpi-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull ACPI and power management updates from Rafael Wysocki:
 "Features-wise, to me the most important this time is a rework of
  wakeup interrupts handling in the core that makes them work
  consistently across all of the available sleep states, including
  suspend-to-idle.  Many thanks to Thomas Gleixner for his help with
  this work.

  Second is an update of the generic PM domains code that has been in
  need of some care for quite a while.  Unused code is being removed, DT
  support is being added and domains are now going to be attached to
  devices in bus type code in analogy with the ACPI PM domain.  The
  majority of work here was done by Ulf Hansson who also has been the
  most active developer this time.

  Apart from this we have a traditional ACPICA update, this time to
  upstream version 20140828 and a few ACPI wakeup interrupts handling
  patches on top of the general rework mentioned above.  There also are
  several cpufreq commits including renaming the cpufreq-cpu0 driver to
  cpufreq-dt, as this is what implements generic DT-based cpufreq
  support, and a new DT-based idle states infrastructure for cpuidle.

  In addition to that, the ACPI LPSS driver is updated, ACPI support for
  Apple machines is improved, a few bugs are fixed and a few cleanups
  are made all over.

  Finally, the Adaptive Voltage Scaling (AVS) subsystem now has a tree
  maintained by Kevin Hilman that will be merged through the PM tree.

  Numbers-wise, the generic PM domains update takes the lead this time
  with 32 non-merge commits, second is cpufreq (15 commits) and the 3rd
  place goes to the wakeup interrupts handling rework (13 commits).

  Specifics:

   - Rework the handling of wakeup IRQs by the IRQ core such that all of
     them will be switched over to "wakeup" mode in suspend_device_irqs()
     and in that mode the first interrupt will abort system suspend in
     progress or wake up the system if already in suspend-to-idle (or
     equivalent) without executing any interrupt handlers.  Among other
     things that eliminates the wakeup-related motivation to use the
     IRQF_NO_SUSPEND interrupt flag with interrupts which don't really
     need it and should not use it (Thomas Gleixner and Rafael Wysocki)

   - Switch over ACPI to handling wakeup interrupts with the help of the
     new mechanism introduced by the above IRQ core rework (Rafael Wysocki)

   - Rework the core generic PM domains code to eliminate code that's
     not used, add DT support and add a generic mechanism by which
     devices can be added to PM domains automatically during enumeration
     (Ulf Hansson, Geert Uytterhoeven and Tomasz Figa).

   - Add debugfs-based mechanics for debugging generic PM domains
     (Maciej Matraszek).

   - ACPICA update to upstream version 20140828.  Included are updates
     related to the SRAT and GTDT tables and the _PSx methods are in the
     METHOD_NAME list now (Bob Moore and Hanjun Guo).

   - Add _OSI("Darwin") support to the ACPI core (unfortunately, that
     can't really be done in a straightforward way) to prevent
     Thunderbolt from being turned off on Apple systems after boot (or
     after resume from system suspend) and rework the ACPI Smart Battery
     Subsystem (SBS) driver to work correctly with Apple platforms
     (Matthew Garrett and Andreas Noever).

   - ACPI LPSS (Low-Power Subsystem) driver update cleaning up the code,
     adding support for 133MHz I2C source clock on Intel Baytrail to it
     and making it avoid using UART RTS override with Auto Flow Control
     (Heikki Krogerus).

   - ACPI backlight updates removing the video_set_use_native_backlight
     quirk which is not necessary any more, making the code check the
     list of output devices returned by the _DOD method to avoid
     creating acpi_video interfaces that won't work and adding a quirk
     for Lenovo Ideapad Z570 (Hans de Goede, Aaron Lu and Stepan Bujnak)

   - New Win8 ACPI OSI quirks for some Dell laptops (Edward Lin)

   - Assorted ACPI code cleanups (Fabian Frederick, Rasmus Villemoes,
     Sudip Mukherjee, Yijing Wang, and Zhang Rui)

   - cpufreq core updates and cleanups (Viresh Kumar, Preeti U Murthy,
     Rasmus Villemoes)

   - cpufreq driver updates: cpufreq-cpu0/cpufreq-dt (driver name change
     among other things), ppc-corenet, powernv (Viresh Kumar, Preeti U
     Murthy, Shilpasri G Bhat, Lucas Stach)

   - cpuidle support for DT-based idle states infrastructure, new ARM64
     cpuidle driver, cpuidle core cleanups (Lorenzo Pieralisi, Rasmus
     Villemoes)

   - ARM big.LITTLE cpuidle driver updates: support for DT-based
     initialization and Exynos5800 compatible string (Lorenzo Pieralisi,
     Kevin Hilman)

   - Rework of the test_suspend kernel command line argument and a new
     trace event for console resume (Srinivas Pandruvada, Todd E Brandt)

   - Second attempt to optimize swsusp_free() (hibernation core) to make
     it avoid going through all PFNs which may be way too slow on some
     systems (Joerg Roedel)

   - devfreq updates (Paul Bolle, Punit Agrawal, Ãrjan Eide).

   - rockchip-io Adaptive Voltage Scaling (AVS) driver and AVS entry
     update in MAINTAINERS (Heiko Stübner, Kevin Hilman)

   - PM core fix related to clock management (Geert Uytterhoeven)

   - PM core's sysfs code cleanup (Johannes Berg)"

* tag 'pm+acpi-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (105 commits)
  ACPI / fan: printk replacement
  PM / clk: Fix crash in clocks management code if !CONFIG_PM_RUNTIME
  PM / Domains: Rename cpu_data to cpuidle_data
  cpufreq: cpufreq-dt: fix potential double put of cpu OF node
  cpufreq: cpu0: rename driver and internals to 'cpufreq_dt'
  PM / hibernate: Iterate over set bits instead of PFNs in swsusp_free()
  cpufreq: ppc-corenet: remove duplicate update of cpu_data
  ACPI / sleep: Rework the handling of ACPI GPE wakeup from suspend-to-idle
  PM / sleep: Rename platform suspend/resume functions in suspend.c
  PM / sleep: Export dpm_suspend_late/noirq() and dpm_resume_early/noirq()
  ACPICA: Introduce acpi_enable_all_wakeup_gpes()
  ACPICA: Clear all non-wakeup GPEs in acpi_hw_enable_wakeup_gpe_block()
  ACPI / video: check _DOD list when creating backlight devices
  PM / Domains: Move dev_pm_domain_attach|detach() to pm_domain.h
  cpufreq: Replace strnicmp with strncasecmp
  cpufreq: powernv: Set the cpus to nominal frequency during reboot/kexec
  cpufreq: powernv: Set the pstate of the last hotplugged out cpu in policy->cpus to minimum
  cpufreq: Allow stop CPU callback to be used by all cpufreq drivers
  PM / devfreq: exynos: Enable building exynos PPMU as module
  PM / devfreq: Export helper functions for drivers
  ...

3 files changed, 360 insertions, 0 deletions

diff --git a/drivers/power/avs/Kconfig b/drivers/power/avs/Kconfig
index 2a1008b61121..7f3d389bd601 100644
--- a/drivers/power/avs/Kconfig
+++ b/drivers/power/avs/Kconfig
@@ -10,3 +10,11 @@ menuconfig POWER_AVS
           AVS is also called SmartReflex on OMAP devices.
 
           Say Y here to enable Adaptive Voltage Scaling class support.
+
+config ROCKCHIP_IODOMAIN
+        tristate "Rockchip IO domain support"
+        depends on ARCH_ROCKCHIP && OF
+        help
+          Say y here to enable support io domains on Rockchip SoCs. It is
+          necessary for the io domain setting of the SoC to match the
+          voltage supplied by the regulators.
diff --git a/drivers/power/avs/Makefile b/drivers/power/avs/Makefile
index 0843386a6c19..ba4c7bc69225 100644
--- a/drivers/power/avs/Makefile
+++ b/drivers/power/avs/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_POWER_AVS_OMAP)            += smartreflex.o
+obj-$(CONFIG_ROCKCHIP_IODOMAIN)         += rockchip-io-domain.o
diff --git a/drivers/power/avs/rockchip-io-domain.c b/drivers/power/avs/rockchip-io-domain.c
new file mode 100644
index 000000000000..3ae35d0590d2
--- /dev/null
+++ b/drivers/power/avs/rockchip-io-domain.c
@@ -0,0 +1,351 @@
+/*
+ * Rockchip IO Voltage Domain driver
+ *
+ * Copyright 2014 MundoReader S.L.
+ * Copyright 2014 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/mfd/syscon.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/regulator/consumer.h>
+
+#define MAX_SUPPLIES            16
+
+/*
+ * The max voltage for 1.8V and 3.3V come from the Rockchip datasheet under
+ * "Recommended Operating Conditions" for "Digital GPIO".   When the typical
+ * is 3.3V the max is 3.6V.  When the typical is 1.8V the max is 1.98V.
+ *
+ * They are used like this:
+ * - If the voltage on a rail is above the "1.8" voltage (1.98V) we'll tell the
+ *   SoC we're at 3.3.
+ * - If the voltage on a rail is above the "3.3" voltage (3.6V) we'll consider
+ *   that to be an error.
+ */
+#define MAX_VOLTAGE_1_8         1980000
+#define MAX_VOLTAGE_3_3         3600000
+
+#define RK3288_SOC_CON2                 0x24c
+#define RK3288_SOC_CON2_FLASH0          BIT(7)
+#define RK3288_SOC_FLASH_SUPPLY_NUM     2
+
+struct rockchip_iodomain;
+
+/**
+ * @supplies: voltage settings matching the register bits.
+ */
+struct rockchip_iodomain_soc_data {
+        int grf_offset;
+        const char *supply_names[MAX_SUPPLIES];
+        void (*init)(struct rockchip_iodomain *iod);
+};
+
+struct rockchip_iodomain_supply {
+        struct rockchip_iodomain *iod;
+        struct regulator *reg;
+        struct notifier_block nb;
+        int idx;
+};
+
+struct rockchip_iodomain {
+        struct device *dev;
+        struct regmap *grf;
+        struct rockchip_iodomain_soc_data *soc_data;
+        struct rockchip_iodomain_supply supplies[MAX_SUPPLIES];
+};
+
+static int rockchip_iodomain_write(struct rockchip_iodomain_supply *supply,
+                                   int uV)
+{
+        struct rockchip_iodomain *iod = supply->iod;
+        u32 val;
+        int ret;
+
+        /* set value bit */
+        val = (uV > MAX_VOLTAGE_1_8) ? 0 : 1;
+        val <<= supply->idx;
+
+        /* apply hiword-mask */
+        val |= (BIT(supply->idx) << 16);
+
+        ret = regmap_write(iod->grf, iod->soc_data->grf_offset, val);
+        if (ret)
+                dev_err(iod->dev, "Couldn't write to GRF\n");
+
+        return ret;
+}
+
+static int rockchip_iodomain_notify(struct notifier_block *nb,
+                                    unsigned long event,
+                                    void *data)
+{
+        struct rockchip_iodomain_supply *supply =
+                        container_of(nb, struct rockchip_iodomain_supply, nb);
+        int uV;
+        int ret;
+
+        /*
+         * According to Rockchip it's important to keep the SoC IO domain
+         * higher than (or equal to) the external voltage.  That means we need
+         * to change it before external voltage changes happen in the case
+         * of an increase.
+         *
+         * Note that in the "pre" change we pick the max possible voltage that
+         * the regulator might end up at (the client requests a range and we
+         * don't know for certain the exact voltage).  Right now we rely on the
+         * slop in MAX_VOLTAGE_1_8 and MAX_VOLTAGE_3_3 to save us if clients
+         * request something like a max of 3.6V when they really want 3.3V.
+         * We could attempt to come up with better rules if this fails.
+         */
+        if (event & REGULATOR_EVENT_PRE_VOLTAGE_CHANGE) {
+                struct pre_voltage_change_data *pvc_data = data;
+
+                uV = max_t(unsigned long, pvc_data->old_uV, pvc_data->max_uV);
+        } else if (event & (REGULATOR_EVENT_VOLTAGE_CHANGE |
+                            REGULATOR_EVENT_ABORT_VOLTAGE_CHANGE)) {
+                uV = (unsigned long)data;
+        } else {
+                return NOTIFY_OK;
+        }
+
+        dev_dbg(supply->iod->dev, "Setting to %d\n", uV);
+
+        if (uV > MAX_VOLTAGE_3_3) {
+                dev_err(supply->iod->dev, "Voltage too high: %d\n", uV);
+
+                if (event == REGULATOR_EVENT_PRE_VOLTAGE_CHANGE)
+                        return NOTIFY_BAD;
+        }
+
+        ret = rockchip_iodomain_write(supply, uV);
+        if (ret && event == REGULATOR_EVENT_PRE_VOLTAGE_CHANGE)
+                return NOTIFY_BAD;
+
+        dev_info(supply->iod->dev, "Setting to %d done\n", uV);
+        return NOTIFY_OK;
+}
+
+static void rk3288_iodomain_init(struct rockchip_iodomain *iod)
+{
+        int ret;
+        u32 val;
+
+        /* if no flash supply we should leave things alone */
+        if (!iod->supplies[RK3288_SOC_FLASH_SUPPLY_NUM].reg)
+                return;
+
+        /*
+         * set flash0 iodomain to also use this framework
+         * instead of a special gpio.
+         */
+        val = RK3288_SOC_CON2_FLASH0 | (RK3288_SOC_CON2_FLASH0 << 16);
+        ret = regmap_write(iod->grf, RK3288_SOC_CON2, val);
+        if (ret < 0)
+                dev_warn(iod->dev, "couldn't update flash0 ctrl\n");
+}
+
+/*
+ * On the rk3188 the io-domains are handled by a shared register with the
+ * lower 8 bits being still being continuing drive-strength settings.
+ */
+static const struct rockchip_iodomain_soc_data soc_data_rk3188 = {
+        .grf_offset = 0x104,
+        .supply_names = {
+                NULL,
+                NULL,
+                NULL,
+                NULL,
+                NULL,
+                NULL,
+                NULL,
+                NULL,
+                "ap0",
+                "ap1",
+                "cif",
+                "flash",
+                "vccio0",
+                "vccio1",
+                "lcdc0",
+                "lcdc1",
+        },
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3288 = {
+        .grf_offset = 0x380,
+        .supply_names = {
+                "lcdc",         /* LCDC_VDD */
+                "dvp",          /* DVPIO_VDD */
+                "flash0",       /* FLASH0_VDD (emmc) */
+                "flash1",       /* FLASH1_VDD (sdio1) */
+                "wifi",         /* APIO3_VDD  (sdio0) */
+                "bb",           /* APIO5_VDD */
+                "audio",        /* APIO4_VDD */
+                "sdcard",       /* SDMMC0_VDD (sdmmc) */
+                "gpio30",       /* APIO1_VDD */
+                "gpio1830",     /* APIO2_VDD */
+        },
+        .init = rk3288_iodomain_init,
+};
+
+static const struct of_device_id rockchip_iodomain_match[] = {
+        {
+                .compatible = "rockchip,rk3188-io-voltage-domain",
+                .data = (void *)&soc_data_rk3188
+        },
+        {
+                .compatible = "rockchip,rk3288-io-voltage-domain",
+                .data = (void *)&soc_data_rk3288
+        },
+        { /* sentinel */ },
+};
+
+static int rockchip_iodomain_probe(struct platform_device *pdev)
+{
+        struct device_node *np = pdev->dev.of_node;
+        const struct of_device_id *match;
+        struct rockchip_iodomain *iod;
+        int i, ret = 0;
+
+        if (!np)
+                return -ENODEV;
+
+        iod = devm_kzalloc(&pdev->dev, sizeof(*iod), GFP_KERNEL);
+        if (!iod)
+                return -ENOMEM;
+
+        iod->dev = &pdev->dev;
+        platform_set_drvdata(pdev, iod);
+
+        match = of_match_node(rockchip_iodomain_match, np);
+        iod->soc_data = (struct rockchip_iodomain_soc_data *)match->data;
+
+        iod->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
+        if (IS_ERR(iod->grf)) {
+                dev_err(&pdev->dev, "couldn't find grf regmap\n");
+                return PTR_ERR(iod->grf);
+        }
+
+        for (i = 0; i < MAX_SUPPLIES; i++) {
+                const char *supply_name = iod->soc_data->supply_names[i];
+                struct rockchip_iodomain_supply *supply = &iod->supplies[i];
+                struct regulator *reg;
+                int uV;
+
+                if (!supply_name)
+                        continue;
+
+                reg = devm_regulator_get_optional(iod->dev, supply_name);
+                if (IS_ERR(reg)) {
+                        ret = PTR_ERR(reg);
+
+                        /* If a supply wasn't specified, that's OK */
+                        if (ret == -ENODEV)
+                                continue;
+                        else if (ret != -EPROBE_DEFER)
+                                dev_err(iod->dev, "couldn't get regulator %s\n",
+                                        supply_name);
+                        goto unreg_notify;
+                }
+
+                /* set initial correct value */
+                uV = regulator_get_voltage(reg);
+
+                /* must be a regulator we can get the voltage of */
+                if (uV < 0) {
+                        dev_err(iod->dev, "Can't determine voltage: %s\n",
+                                supply_name);
+                        goto unreg_notify;
+                }
+
+                if (uV > MAX_VOLTAGE_3_3) {
+                        dev_crit(iod->dev,
+                                 "%d uV is too high. May damage SoC!\n",
+                                 uV);
+                        ret = -EINVAL;
+                        goto unreg_notify;
+                }
+
+                /* setup our supply */
+                supply->idx = i;
+                supply->iod = iod;
+                supply->reg = reg;
+                supply->nb.notifier_call = rockchip_iodomain_notify;
+
+                ret = rockchip_iodomain_write(supply, uV);
+                if (ret) {
+                        supply->reg = NULL;
+                        goto unreg_notify;
+                }
+
+                /* register regulator notifier */
+                ret = regulator_register_notifier(reg, &supply->nb);
+                if (ret) {
+                        dev_err(&pdev->dev,
+                                "regulator notifier request failed\n");
+                        supply->reg = NULL;
+                        goto unreg_notify;
+                }
+        }
+
+        if (iod->soc_data->init)
+                iod->soc_data->init(iod);
+
+        return 0;
+
+unreg_notify:
+        for (i = MAX_SUPPLIES - 1; i >= 0; i--) {
+                struct rockchip_iodomain_supply *io_supply = &iod->supplies[i];
+
+                if (io_supply->reg)
+                        regulator_unregister_notifier(io_supply->reg,
+                                                      &io_supply->nb);
+        }
+
+        return ret;
+}
+
+static int rockchip_iodomain_remove(struct platform_device *pdev)
+{
+        struct rockchip_iodomain *iod = platform_get_drvdata(pdev);
+        int i;
+
+        for (i = MAX_SUPPLIES - 1; i >= 0; i--) {
+                struct rockchip_iodomain_supply *io_supply = &iod->supplies[i];
+
+                if (io_supply->reg)
+                        regulator_unregister_notifier(io_supply->reg,
+                                                      &io_supply->nb);
+        }
+
+        return 0;
+}
+
+static struct platform_driver rockchip_iodomain_driver = {
+        .probe   = rockchip_iodomain_probe,
+        .remove  = rockchip_iodomain_remove,
+        .driver  = {
+                .name  = "rockchip-iodomain",
+                .of_match_table = rockchip_iodomain_match,
+        },
+};
+
+module_platform_driver(rockchip_iodomain_driver);
+
+MODULE_DESCRIPTION("Rockchip IO-domain driver");
+MODULE_AUTHOR("Heiko Stuebner <heiko@sntech.de>");
+MODULE_AUTHOR("Doug Anderson <dianders@chromium.org>");
+MODULE_LICENSE("GPL v2");