diff options
author | Andy Ross <andy.ross@windriver.com> | 2010-07-26 05:05:03 -0400 |
---|---|---|
committer | Matthew Garrett <mjg@redhat.com> | 2010-08-03 09:50:32 -0400 |
commit | 6c8d0fdbe88e8bb1a07fa9a2830767cc180f7d1b (patch) | |
tree | 498f41d73ee97d633c6f7cea6a3db726eb88bc51 /drivers/platform | |
parent | ed6f2b4da32913875355f5c9cbbb38e4168b7801 (diff) |
Clean up command packing on MRST.
Don't pass more bytes in the command length field than we filled.
Signed-off-by: Andy Ross <andy.ross@windriver.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Matthew Garrett <mjg@redhat.com>
Diffstat (limited to 'drivers/platform')
-rw-r--r-- | drivers/platform/x86/intel_scu_ipc.c | 29 |
1 files changed, 11 insertions, 18 deletions
diff --git a/drivers/platform/x86/intel_scu_ipc.c b/drivers/platform/x86/intel_scu_ipc.c index b903420fa973..5055c523c5e2 100644 --- a/drivers/platform/x86/intel_scu_ipc.c +++ b/drivers/platform/x86/intel_scu_ipc.c | |||
@@ -154,7 +154,7 @@ static inline int busy_loop(void) /* Wait till scu status is busy */ | |||
154 | /* Read/Write power control(PMIC in Langwell, MSIC in PenWell) registers */ | 154 | /* Read/Write power control(PMIC in Langwell, MSIC in PenWell) registers */ |
155 | static int pwr_reg_rdwr(u16 *addr, u8 *data, u32 count, u32 op, u32 id) | 155 | static int pwr_reg_rdwr(u16 *addr, u8 *data, u32 count, u32 op, u32 id) |
156 | { | 156 | { |
157 | int nc; | 157 | int i, nc, bytes; |
158 | u32 offset = 0; | 158 | u32 offset = 0; |
159 | u32 err = 0; | 159 | u32 err = 0; |
160 | u8 cbuf[IPC_WWBUF_SIZE] = { }; | 160 | u8 cbuf[IPC_WWBUF_SIZE] = { }; |
@@ -170,25 +170,18 @@ static int pwr_reg_rdwr(u16 *addr, u8 *data, u32 count, u32 op, u32 id) | |||
170 | } | 170 | } |
171 | 171 | ||
172 | if (platform != MRST_CPU_CHIP_PENWELL) { | 172 | if (platform != MRST_CPU_CHIP_PENWELL) { |
173 | /* Entry is 4 bytes for read/write, 5 bytes for read modify */ | 173 | bytes = 0; |
174 | for (nc = 0; nc < count; nc++, offset += 3) { | 174 | for(i=0; i<count; i++) { |
175 | cbuf[offset] = addr[nc]; | 175 | cbuf[bytes++] = addr[i]; |
176 | cbuf[offset + 1] = addr[nc] >> 8; | 176 | cbuf[bytes++] = addr[i] >> 8; |
177 | if (id != IPC_CMD_PCNTRL_R) | 177 | if (id != IPC_CMD_PCNTRL_R) |
178 | cbuf[offset + 2] = data[nc]; | 178 | cbuf[bytes++] = data[i]; |
179 | if (id == IPC_CMD_PCNTRL_M) { | 179 | if (id == IPC_CMD_PCNTRL_M) |
180 | cbuf[offset + 3] = data[nc + 1]; | 180 | cbuf[bytes++] = data[i + 1]; |
181 | offset += 1; | ||
182 | } | ||
183 | } | 181 | } |
184 | for (nc = 0, offset = 0; nc < count; nc++, offset += 4) | 182 | for(i=0; i<bytes; i+=4) |
185 | ipc_data_writel(wbuf[nc], offset); /* Write wbuff */ | 183 | ipc_data_writel(wbuf[i/4], i); |
186 | 184 | ipc_command(bytes << 16 | id << 12 | 0 << 8 | op); | |
187 | if (id != IPC_CMD_PCNTRL_M) | ||
188 | ipc_command((count*4) << 16 | id << 12 | 0 << 8 | op); | ||
189 | else | ||
190 | ipc_command((count*5) << 16 | id << 12 | 0 << 8 | op); | ||
191 | |||
192 | } else { | 185 | } else { |
193 | for (nc = 0; nc < count; nc++, offset += 2) { | 186 | for (nc = 0; nc < count; nc++, offset += 2) { |
194 | cbuf[offset] = addr[nc]; | 187 | cbuf[offset] = addr[nc]; |