diff options
author | Alan <alan@linux.intel.com> | 2014-05-12 11:57:22 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2014-05-15 16:20:42 -0400 |
commit | a99698facdb92adebf4a4ed7691493b7e08ff5b6 (patch) | |
tree | 733c819f4cc5e7f084be02e60ec30579ac374ad2 /drivers/platform | |
parent | d78055dc9c786b392ce7b593c479bb9a3e1da61d (diff) |
goldfish: clean up the pipe driver 64bit ifdefs
Use the 64bit helper method to scrub most of the ifdefs from the driver. The
pipe reading has a funny case we can't scrub completely.
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/platform')
-rw-r--r-- | drivers/platform/goldfish/goldfish_pipe.c | 33 |
1 files changed, 11 insertions, 22 deletions
diff --git a/drivers/platform/goldfish/goldfish_pipe.c b/drivers/platform/goldfish/goldfish_pipe.c index 670b9b94f74b..c86180bba72e 100644 --- a/drivers/platform/goldfish/goldfish_pipe.c +++ b/drivers/platform/goldfish/goldfish_pipe.c | |||
@@ -56,6 +56,7 @@ | |||
56 | #include <linux/bitops.h> | 56 | #include <linux/bitops.h> |
57 | #include <linux/slab.h> | 57 | #include <linux/slab.h> |
58 | #include <linux/io.h> | 58 | #include <linux/io.h> |
59 | #include <linux/goldfish.h> | ||
59 | 60 | ||
60 | /* | 61 | /* |
61 | * IMPORTANT: The following constants must match the ones used and defined | 62 | * IMPORTANT: The following constants must match the ones used and defined |
@@ -66,14 +67,10 @@ | |||
66 | #define PIPE_REG_COMMAND 0x00 /* write: value = command */ | 67 | #define PIPE_REG_COMMAND 0x00 /* write: value = command */ |
67 | #define PIPE_REG_STATUS 0x04 /* read */ | 68 | #define PIPE_REG_STATUS 0x04 /* read */ |
68 | #define PIPE_REG_CHANNEL 0x08 /* read/write: channel id */ | 69 | #define PIPE_REG_CHANNEL 0x08 /* read/write: channel id */ |
69 | #ifdef CONFIG_64BIT | ||
70 | #define PIPE_REG_CHANNEL_HIGH 0x30 /* read/write: channel id */ | 70 | #define PIPE_REG_CHANNEL_HIGH 0x30 /* read/write: channel id */ |
71 | #endif | ||
72 | #define PIPE_REG_SIZE 0x0c /* read/write: buffer size */ | 71 | #define PIPE_REG_SIZE 0x0c /* read/write: buffer size */ |
73 | #define PIPE_REG_ADDRESS 0x10 /* write: physical address */ | 72 | #define PIPE_REG_ADDRESS 0x10 /* write: physical address */ |
74 | #ifdef CONFIG_64BIT | ||
75 | #define PIPE_REG_ADDRESS_HIGH 0x34 /* write: physical address */ | 73 | #define PIPE_REG_ADDRESS_HIGH 0x34 /* write: physical address */ |
76 | #endif | ||
77 | #define PIPE_REG_WAKES 0x14 /* read: wake flags */ | 74 | #define PIPE_REG_WAKES 0x14 /* read: wake flags */ |
78 | #define PIPE_REG_PARAMS_ADDR_LOW 0x18 /* read/write: batch data address */ | 75 | #define PIPE_REG_PARAMS_ADDR_LOW 0x18 /* read/write: batch data address */ |
79 | #define PIPE_REG_PARAMS_ADDR_HIGH 0x1c /* read/write: batch data address */ | 76 | #define PIPE_REG_PARAMS_ADDR_HIGH 0x1c /* read/write: batch data address */ |
@@ -155,16 +152,14 @@ enum { | |||
155 | 152 | ||
156 | 153 | ||
157 | static u32 goldfish_cmd_status(struct goldfish_pipe *pipe, u32 cmd) | 154 | static u32 goldfish_cmd_status(struct goldfish_pipe *pipe, u32 cmd) |
158 | { | 155 | { |
159 | unsigned long flags; | 156 | unsigned long flags; |
160 | u32 status; | 157 | u32 status; |
161 | struct goldfish_pipe_dev *dev = pipe->dev; | 158 | struct goldfish_pipe_dev *dev = pipe->dev; |
162 | 159 | ||
163 | spin_lock_irqsave(&dev->lock, flags); | 160 | spin_lock_irqsave(&dev->lock, flags); |
164 | writel((u32)(u64)pipe, dev->base + PIPE_REG_CHANNEL); | 161 | gf_write64((u64)pipe, dev->base + PIPE_REG_CHANNEL, |
165 | #ifdef CONFIG_64BIT | 162 | dev->base + PIPE_REG_CHANNEL_HIGH); |
166 | writel((u32)((u64)pipe >> 32), dev->base + PIPE_REG_CHANNEL_HIGH); | ||
167 | #endif | ||
168 | writel(cmd, dev->base + PIPE_REG_COMMAND); | 163 | writel(cmd, dev->base + PIPE_REG_COMMAND); |
169 | status = readl(dev->base + PIPE_REG_STATUS); | 164 | status = readl(dev->base + PIPE_REG_STATUS); |
170 | spin_unlock_irqrestore(&dev->lock, flags); | 165 | spin_unlock_irqrestore(&dev->lock, flags); |
@@ -172,15 +167,13 @@ static u32 goldfish_cmd_status(struct goldfish_pipe *pipe, u32 cmd) | |||
172 | } | 167 | } |
173 | 168 | ||
174 | static void goldfish_cmd(struct goldfish_pipe *pipe, u32 cmd) | 169 | static void goldfish_cmd(struct goldfish_pipe *pipe, u32 cmd) |
175 | { | 170 | { |
176 | unsigned long flags; | 171 | unsigned long flags; |
177 | struct goldfish_pipe_dev *dev = pipe->dev; | 172 | struct goldfish_pipe_dev *dev = pipe->dev; |
178 | 173 | ||
179 | spin_lock_irqsave(&dev->lock, flags); | 174 | spin_lock_irqsave(&dev->lock, flags); |
180 | writel((u32)(u64)pipe, dev->base + PIPE_REG_CHANNEL); | 175 | gf_write64((u64)pipe, dev->base + PIPE_REG_CHANNEL, |
181 | #ifdef CONFIG_64BIT | 176 | dev->base + PIPE_REG_CHANNEL_HIGH); |
182 | writel((u32)((u64)pipe >> 32), dev->base + PIPE_REG_CHANNEL_HIGH); | ||
183 | #endif | ||
184 | writel(cmd, dev->base + PIPE_REG_COMMAND); | 177 | writel(cmd, dev->base + PIPE_REG_COMMAND); |
185 | spin_unlock_irqrestore(&dev->lock, flags); | 178 | spin_unlock_irqrestore(&dev->lock, flags); |
186 | } | 179 | } |
@@ -334,15 +327,11 @@ static ssize_t goldfish_pipe_read_write(struct file *filp, char __user *buffer, | |||
334 | spin_lock_irqsave(&dev->lock, irq_flags); | 327 | spin_lock_irqsave(&dev->lock, irq_flags); |
335 | if (access_with_param(dev, CMD_WRITE_BUFFER + cmd_offset, | 328 | if (access_with_param(dev, CMD_WRITE_BUFFER + cmd_offset, |
336 | address, avail, pipe, &status)) { | 329 | address, avail, pipe, &status)) { |
337 | writel((u32)(u64)pipe, dev->base + PIPE_REG_CHANNEL); | 330 | gf_write64((u64)pipe, dev->base + PIPE_REG_CHANNEL, |
338 | #ifdef CONFIG_64BIT | 331 | dev->base + PIPE_REG_CHANNEL_HIGH); |
339 | writel((u32)((u64)pipe >> 32), dev->base + PIPE_REG_CHANNEL_HIGH); | ||
340 | #endif | ||
341 | writel(avail, dev->base + PIPE_REG_SIZE); | 332 | writel(avail, dev->base + PIPE_REG_SIZE); |
342 | writel(address, dev->base + PIPE_REG_ADDRESS); | 333 | gf_write64(address, dev->base + PIPE_REG_ADDRESS, |
343 | #ifdef CONFIG_64BIT | 334 | dev->base + PIPE_REG_ADDRESS_HIGH); |
344 | writel((u32)((u64)address >> 32), dev->base + PIPE_REG_ADDRESS_HIGH); | ||
345 | #endif | ||
346 | writel(CMD_WRITE_BUFFER + cmd_offset, | 335 | writel(CMD_WRITE_BUFFER + cmd_offset, |
347 | dev->base + PIPE_REG_COMMAND); | 336 | dev->base + PIPE_REG_COMMAND); |
348 | status = readl(dev->base + PIPE_REG_STATUS); | 337 | status = readl(dev->base + PIPE_REG_STATUS); |