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authorAmeya Palande <ameya.palande@nokia.com>2011-04-01 09:54:11 -0400
committerMatthew Garrett <mjg@redhat.com>2011-05-27 12:35:53 -0400
commit253a0069d7a222f7ad55f2c40f541a7648920c77 (patch)
tree15715e21b0a41100d34acf2195410a61826cf09b /drivers/platform
parentad3f2f038fbd67f3341f760507aed90381114145 (diff)
platform-x86: intel_mid_thermal: Fix coding style
Before fixing checkpatch.pl reported 74 errors and 234 warnings Signed-off-by: Ameya Palande <ameya.palande@nokia.com> Signed-off-by: Matthew Garrett <mjg@redhat.com>
Diffstat (limited to 'drivers/platform')
-rw-r--r--drivers/platform/x86/intel_mid_thermal.c606
1 files changed, 300 insertions, 306 deletions
diff --git a/drivers/platform/x86/intel_mid_thermal.c b/drivers/platform/x86/intel_mid_thermal.c
index c2f4bd8013b5..f0776504521f 100644
--- a/drivers/platform/x86/intel_mid_thermal.c
+++ b/drivers/platform/x86/intel_mid_thermal.c
@@ -37,49 +37,50 @@
37#include <asm/intel_scu_ipc.h> 37#include <asm/intel_scu_ipc.h>
38 38
39/* Number of thermal sensors */ 39/* Number of thermal sensors */
40#define MSIC_THERMAL_SENSORS 4 40#define MSIC_THERMAL_SENSORS 4
41 41
42/* ADC1 - thermal registers */ 42/* ADC1 - thermal registers */
43#define MSIC_THERM_ADC1CNTL1 0x1C0 43#define MSIC_THERM_ADC1CNTL1 0x1C0
44#define MSIC_ADC_ENBL 0x10 44#define MSIC_ADC_ENBL 0x10
45#define MSIC_ADC_START 0x08 45#define MSIC_ADC_START 0x08
46 46
47#define MSIC_THERM_ADC1CNTL3 0x1C2 47#define MSIC_THERM_ADC1CNTL3 0x1C2
48#define MSIC_ADCTHERM_ENBL 0x04 48#define MSIC_ADCTHERM_ENBL 0x04
49#define MSIC_ADCRRDATA_ENBL 0x05 49#define MSIC_ADCRRDATA_ENBL 0x05
50#define MSIC_CHANL_MASK_VAL 0x0F 50#define MSIC_CHANL_MASK_VAL 0x0F
51 51
52#define MSIC_STOPBIT_MASK 16 52#define MSIC_STOPBIT_MASK 16
53#define MSIC_ADCTHERM_MASK 4 53#define MSIC_ADCTHERM_MASK 4
54#define ADC_CHANLS_MAX 15 /* Number of ADC channels */ 54/* Number of ADC channels */
55#define ADC_LOOP_MAX (ADC_CHANLS_MAX - MSIC_THERMAL_SENSORS) 55#define ADC_CHANLS_MAX 15
56#define ADC_LOOP_MAX (ADC_CHANLS_MAX - MSIC_THERMAL_SENSORS)
56 57
57/* ADC channel code values */ 58/* ADC channel code values */
58#define SKIN_SENSOR0_CODE 0x08 59#define SKIN_SENSOR0_CODE 0x08
59#define SKIN_SENSOR1_CODE 0x09 60#define SKIN_SENSOR1_CODE 0x09
60#define SYS_SENSOR_CODE 0x0A 61#define SYS_SENSOR_CODE 0x0A
61#define MSIC_DIE_SENSOR_CODE 0x03 62#define MSIC_DIE_SENSOR_CODE 0x03
62 63
63#define SKIN_THERM_SENSOR0 0 64#define SKIN_THERM_SENSOR0 0
64#define SKIN_THERM_SENSOR1 1 65#define SKIN_THERM_SENSOR1 1
65#define SYS_THERM_SENSOR2 2 66#define SYS_THERM_SENSOR2 2
66#define MSIC_DIE_THERM_SENSOR3 3 67#define MSIC_DIE_THERM_SENSOR3 3
67 68
68/* ADC code range */ 69/* ADC code range */
69#define ADC_MAX 977 70#define ADC_MAX 977
70#define ADC_MIN 162 71#define ADC_MIN 162
71#define ADC_VAL0C 887 72#define ADC_VAL0C 887
72#define ADC_VAL20C 720 73#define ADC_VAL20C 720
73#define ADC_VAL40C 508 74#define ADC_VAL40C 508
74#define ADC_VAL60C 315 75#define ADC_VAL60C 315
75 76
76/* ADC base addresses */ 77/* ADC base addresses */
77#define ADC_CHNL_START_ADDR 0x1C5 /* increments by 1 */ 78#define ADC_CHNL_START_ADDR 0x1C5 /* increments by 1 */
78#define ADC_DATA_START_ADDR 0x1D4 /* increments by 2 */ 79#define ADC_DATA_START_ADDR 0x1D4 /* increments by 2 */
79 80
80/* MSIC die attributes */ 81/* MSIC die attributes */
81#define MSIC_DIE_ADC_MIN 488 82#define MSIC_DIE_ADC_MIN 488
82#define MSIC_DIE_ADC_MAX 1004 83#define MSIC_DIE_ADC_MAX 1004
83 84
84/* This holds the address of the first free ADC channel, 85/* This holds the address of the first free ADC channel,
85 * among the 15 channels 86 * among the 15 channels
@@ -87,15 +88,15 @@
87static int channel_index; 88static int channel_index;
88 89
89struct platform_info { 90struct platform_info {
90 struct platform_device *pdev; 91 struct platform_device *pdev;
91 struct thermal_zone_device *tzd[MSIC_THERMAL_SENSORS]; 92 struct thermal_zone_device *tzd[MSIC_THERMAL_SENSORS];
92}; 93};
93 94
94struct thermal_device_info { 95struct thermal_device_info {
95 unsigned int chnl_addr; 96 unsigned int chnl_addr;
96 int direct; 97 int direct;
97 /* This holds the current temperature in millidegree celsius */ 98 /* This holds the current temperature in millidegree celsius */
98 long curr_temp; 99 long curr_temp;
99}; 100};
100 101
101/** 102/**
@@ -106,7 +107,7 @@ struct thermal_device_info {
106 */ 107 */
107static int to_msic_die_temp(uint16_t adc_val) 108static int to_msic_die_temp(uint16_t adc_val)
108{ 109{
109 return (368 * (adc_val) / 1000) - 220; 110 return (368 * (adc_val) / 1000) - 220;
110} 111}
111 112
112/** 113/**
@@ -118,7 +119,7 @@ static int to_msic_die_temp(uint16_t adc_val)
118 */ 119 */
119static int is_valid_adc(uint16_t adc_val, uint16_t min, uint16_t max) 120static int is_valid_adc(uint16_t adc_val, uint16_t min, uint16_t max)
120{ 121{
121 return (adc_val >= min) && (adc_val <= max); 122 return (adc_val >= min) && (adc_val <= max);
122} 123}
123 124
124/** 125/**
@@ -136,35 +137,35 @@ static int is_valid_adc(uint16_t adc_val, uint16_t min, uint16_t max)
136 */ 137 */
137static int adc_to_temp(int direct, uint16_t adc_val, unsigned long *tp) 138static int adc_to_temp(int direct, uint16_t adc_val, unsigned long *tp)
138{ 139{
139 int temp; 140 int temp;
140 141
141 /* Direct conversion for die temperature */ 142 /* Direct conversion for die temperature */
142 if (direct) { 143 if (direct) {
143 if (is_valid_adc(adc_val, MSIC_DIE_ADC_MIN, MSIC_DIE_ADC_MAX)) { 144 if (is_valid_adc(adc_val, MSIC_DIE_ADC_MIN, MSIC_DIE_ADC_MAX)) {
144 *tp = to_msic_die_temp(adc_val) * 1000; 145 *tp = to_msic_die_temp(adc_val) * 1000;
145 return 0; 146 return 0;
146 } 147 }
147 return -ERANGE; 148 return -ERANGE;
148 } 149 }
149 150
150 if (!is_valid_adc(adc_val, ADC_MIN, ADC_MAX)) 151 if (!is_valid_adc(adc_val, ADC_MIN, ADC_MAX))
151 return -ERANGE; 152 return -ERANGE;
152 153
153 /* Linear approximation for skin temperature */ 154 /* Linear approximation for skin temperature */
154 if (adc_val > ADC_VAL0C) 155 if (adc_val > ADC_VAL0C)
155 temp = 177 - (adc_val/5); 156 temp = 177 - (adc_val/5);
156 else if ((adc_val <= ADC_VAL0C) && (adc_val > ADC_VAL20C)) 157 else if ((adc_val <= ADC_VAL0C) && (adc_val > ADC_VAL20C))
157 temp = 111 - (adc_val/8); 158 temp = 111 - (adc_val/8);
158 else if ((adc_val <= ADC_VAL20C) && (adc_val > ADC_VAL40C)) 159 else if ((adc_val <= ADC_VAL20C) && (adc_val > ADC_VAL40C))
159 temp = 92 - (adc_val/10); 160 temp = 92 - (adc_val/10);
160 else if ((adc_val <= ADC_VAL40C) && (adc_val > ADC_VAL60C)) 161 else if ((adc_val <= ADC_VAL40C) && (adc_val > ADC_VAL60C))
161 temp = 91 - (adc_val/10); 162 temp = 91 - (adc_val/10);
162 else 163 else
163 temp = 112 - (adc_val/6); 164 temp = 112 - (adc_val/6);
164 165
165 /* Convert temperature in celsius to milli degree celsius */ 166 /* Convert temperature in celsius to milli degree celsius */
166 *tp = temp * 1000; 167 *tp = temp * 1000;
167 return 0; 168 return 0;
168} 169}
169 170
170/** 171/**
@@ -178,47 +179,47 @@ static int adc_to_temp(int direct, uint16_t adc_val, unsigned long *tp)
178 */ 179 */
179static int mid_read_temp(struct thermal_zone_device *tzd, unsigned long *temp) 180static int mid_read_temp(struct thermal_zone_device *tzd, unsigned long *temp)
180{ 181{
181 struct thermal_device_info *td_info = tzd->devdata; 182 struct thermal_device_info *td_info = tzd->devdata;
182 uint16_t adc_val, addr; 183 uint16_t adc_val, addr;
183 uint8_t data = 0; 184 uint8_t data = 0;
184 int ret; 185 int ret;
185 unsigned long curr_temp; 186 unsigned long curr_temp;
186 187
187 188
188 addr = td_info->chnl_addr; 189 addr = td_info->chnl_addr;
189 190
190 /* Enable the msic for conversion before reading */ 191 /* Enable the msic for conversion before reading */
191 ret = intel_scu_ipc_iowrite8(MSIC_THERM_ADC1CNTL3, MSIC_ADCRRDATA_ENBL); 192 ret = intel_scu_ipc_iowrite8(MSIC_THERM_ADC1CNTL3, MSIC_ADCRRDATA_ENBL);
192 if (ret) 193 if (ret)
193 return ret; 194 return ret;
194 195
195 /* Re-toggle the RRDATARD bit (temporary workaround) */ 196 /* Re-toggle the RRDATARD bit (temporary workaround) */
196 ret = intel_scu_ipc_iowrite8(MSIC_THERM_ADC1CNTL3, MSIC_ADCTHERM_ENBL); 197 ret = intel_scu_ipc_iowrite8(MSIC_THERM_ADC1CNTL3, MSIC_ADCTHERM_ENBL);
197 if (ret) 198 if (ret)
198 return ret; 199 return ret;
199 200
200 /* Read the higher bits of data */ 201 /* Read the higher bits of data */
201 ret = intel_scu_ipc_ioread8(addr, &data); 202 ret = intel_scu_ipc_ioread8(addr, &data);
202 if (ret) 203 if (ret)
203 return ret; 204 return ret;
204 205
205 /* Shift bits to accommodate the lower two data bits */ 206 /* Shift bits to accommodate the lower two data bits */
206 adc_val = (data << 2); 207 adc_val = (data << 2);
207 addr++; 208 addr++;
208 209
209 ret = intel_scu_ipc_ioread8(addr, &data);/* Read lower bits */ 210 ret = intel_scu_ipc_ioread8(addr, &data);/* Read lower bits */
210 if (ret) 211 if (ret)
211 return ret; 212 return ret;
212 213
213 /* Adding lower two bits to the higher bits */ 214 /* Adding lower two bits to the higher bits */
214 data &= 03; 215 data &= 03;
215 adc_val += data; 216 adc_val += data;
216 217
217 /* Convert ADC value to temperature */ 218 /* Convert ADC value to temperature */
218 ret = adc_to_temp(td_info->direct, adc_val, &curr_temp); 219 ret = adc_to_temp(td_info->direct, adc_val, &curr_temp);
219 if (ret == 0) 220 if (ret == 0)
220 *temp = td_info->curr_temp = curr_temp; 221 *temp = td_info->curr_temp = curr_temp;
221 return ret; 222 return ret;
222} 223}
223 224
224/** 225/**
@@ -231,22 +232,21 @@ static int mid_read_temp(struct thermal_zone_device *tzd, unsigned long *temp)
231 */ 232 */
232static int configure_adc(int val) 233static int configure_adc(int val)
233{ 234{
234 int ret; 235 int ret;
235 uint8_t data; 236 uint8_t data;
236 237
237 ret = intel_scu_ipc_ioread8(MSIC_THERM_ADC1CNTL1, &data); 238 ret = intel_scu_ipc_ioread8(MSIC_THERM_ADC1CNTL1, &data);
238 if (ret) 239 if (ret)
239 return ret; 240 return ret;
240 241
241 if (val) { 242 if (val) {
242 /* Enable and start the ADC */ 243 /* Enable and start the ADC */
243 data |= (MSIC_ADC_ENBL | MSIC_ADC_START); 244 data |= (MSIC_ADC_ENBL | MSIC_ADC_START);
244 } else { 245 } else {
245 /* Just stop the ADC */ 246 /* Just stop the ADC */
246 data &= (~MSIC_ADC_START); 247 data &= (~MSIC_ADC_START);
247 } 248 }
248 249 return intel_scu_ipc_iowrite8(MSIC_THERM_ADC1CNTL1, data);
249 return intel_scu_ipc_iowrite8(MSIC_THERM_ADC1CNTL1, data);
250} 250}
251 251
252/** 252/**
@@ -259,30 +259,30 @@ static int configure_adc(int val)
259 */ 259 */
260static int set_up_therm_channel(u16 base_addr) 260static int set_up_therm_channel(u16 base_addr)
261{ 261{
262 int ret; 262 int ret;
263 263
264 /* Enable all the sensor channels */ 264 /* Enable all the sensor channels */
265 ret = intel_scu_ipc_iowrite8(base_addr, SKIN_SENSOR0_CODE); 265 ret = intel_scu_ipc_iowrite8(base_addr, SKIN_SENSOR0_CODE);
266 if (ret) 266 if (ret)
267 return ret; 267 return ret;
268 268
269 ret = intel_scu_ipc_iowrite8(base_addr + 1, SKIN_SENSOR1_CODE); 269 ret = intel_scu_ipc_iowrite8(base_addr + 1, SKIN_SENSOR1_CODE);
270 if (ret) 270 if (ret)
271 return ret; 271 return ret;
272 272
273 ret = intel_scu_ipc_iowrite8(base_addr + 2, SYS_SENSOR_CODE); 273 ret = intel_scu_ipc_iowrite8(base_addr + 2, SYS_SENSOR_CODE);
274 if (ret) 274 if (ret)
275 return ret; 275 return ret;
276 276
277 /* Since this is the last channel, set the stop bit 277 /* Since this is the last channel, set the stop bit
278 to 1 by ORing the DIE_SENSOR_CODE with 0x10 */ 278 * to 1 by ORing the DIE_SENSOR_CODE with 0x10 */
279 ret = intel_scu_ipc_iowrite8(base_addr + 3, 279 ret = intel_scu_ipc_iowrite8(base_addr + 3,
280 (MSIC_DIE_SENSOR_CODE | 0x10)); 280 (MSIC_DIE_SENSOR_CODE | 0x10));
281 if (ret) 281 if (ret)
282 return ret; 282 return ret;
283 283
284 /* Enable ADC and start it */ 284 /* Enable ADC and start it */
285 return configure_adc(1); 285 return configure_adc(1);
286} 286}
287 287
288/** 288/**
@@ -293,13 +293,13 @@ static int set_up_therm_channel(u16 base_addr)
293 */ 293 */
294static int reset_stopbit(uint16_t addr) 294static int reset_stopbit(uint16_t addr)
295{ 295{
296 int ret; 296 int ret;
297 uint8_t data; 297 uint8_t data;
298 ret = intel_scu_ipc_ioread8(addr, &data); 298 ret = intel_scu_ipc_ioread8(addr, &data);
299 if (ret) 299 if (ret)
300 return ret; 300 return ret;
301 /* Set the stop bit to zero */ 301 /* Set the stop bit to zero */
302 return intel_scu_ipc_iowrite8(addr, (data & 0xEF)); 302 return intel_scu_ipc_iowrite8(addr, (data & 0xEF));
303} 303}
304 304
305/** 305/**
@@ -317,30 +317,30 @@ static int reset_stopbit(uint16_t addr)
317 */ 317 */
318static int find_free_channel(void) 318static int find_free_channel(void)
319{ 319{
320 int ret; 320 int ret;
321 int i; 321 int i;
322 uint8_t data; 322 uint8_t data;
323 323
324 /* check whether ADC is enabled */ 324 /* check whether ADC is enabled */
325 ret = intel_scu_ipc_ioread8(MSIC_THERM_ADC1CNTL1, &data); 325 ret = intel_scu_ipc_ioread8(MSIC_THERM_ADC1CNTL1, &data);
326 if (ret) 326 if (ret)
327 return ret; 327 return ret;
328 328
329 if ((data & MSIC_ADC_ENBL) == 0) 329 if ((data & MSIC_ADC_ENBL) == 0)
330 return 0; 330 return 0;
331 331
332 /* ADC is already enabled; Looking for an empty channel */ 332 /* ADC is already enabled; Looking for an empty channel */
333 for (i = 0; i < ADC_CHANLS_MAX; i++) { 333 for (i = 0; i < ADC_CHANLS_MAX; i++) {
334 ret = intel_scu_ipc_ioread8(ADC_CHNL_START_ADDR + i, &data); 334 ret = intel_scu_ipc_ioread8(ADC_CHNL_START_ADDR + i, &data);
335 if (ret) 335 if (ret)
336 return ret; 336 return ret;
337 337
338 if (data & MSIC_STOPBIT_MASK) { 338 if (data & MSIC_STOPBIT_MASK) {
339 ret = i; 339 ret = i;
340 break; 340 break;
341 } 341 }
342 } 342 }
343 return (ret > ADC_LOOP_MAX) ? (-EINVAL) : ret; 343 return (ret > ADC_LOOP_MAX) ? (-EINVAL) : ret;
344} 344}
345 345
346/** 346/**
@@ -351,48 +351,48 @@ static int find_free_channel(void)
351 */ 351 */
352static int mid_initialize_adc(struct device *dev) 352static int mid_initialize_adc(struct device *dev)
353{ 353{
354 u8 data; 354 u8 data;
355 u16 base_addr; 355 u16 base_addr;
356 int ret; 356 int ret;
357 357
358 /* 358 /*
359 * Ensure that adctherm is disabled before we 359 * Ensure that adctherm is disabled before we
360 * initialize the ADC 360 * initialize the ADC
361 */ 361 */
362 ret = intel_scu_ipc_ioread8(MSIC_THERM_ADC1CNTL3, &data); 362 ret = intel_scu_ipc_ioread8(MSIC_THERM_ADC1CNTL3, &data);
363 if (ret) 363 if (ret)
364 return ret; 364 return ret;
365 365
366 if (data & MSIC_ADCTHERM_MASK) 366 if (data & MSIC_ADCTHERM_MASK)
367 dev_warn(dev, "ADCTHERM already set"); 367 dev_warn(dev, "ADCTHERM already set");
368 368
369 /* Index of the first channel in which the stop bit is set */ 369 /* Index of the first channel in which the stop bit is set */
370 channel_index = find_free_channel(); 370 channel_index = find_free_channel();
371 if (channel_index < 0) { 371 if (channel_index < 0) {
372 dev_err(dev, "No free ADC channels"); 372 dev_err(dev, "No free ADC channels");
373 return channel_index; 373 return channel_index;
374 } 374 }
375 375
376 base_addr = ADC_CHNL_START_ADDR + channel_index; 376 base_addr = ADC_CHNL_START_ADDR + channel_index;
377 377
378 if (!(channel_index == 0 || channel_index == ADC_LOOP_MAX)) { 378 if (!(channel_index == 0 || channel_index == ADC_LOOP_MAX)) {
379 /* Reset stop bit for channels other than 0 and 12 */ 379 /* Reset stop bit for channels other than 0 and 12 */
380 ret = reset_stopbit(base_addr); 380 ret = reset_stopbit(base_addr);
381 if (ret) 381 if (ret)
382 return ret; 382 return ret;
383 383
384 /* Index of the first free channel */ 384 /* Index of the first free channel */
385 base_addr++; 385 base_addr++;
386 channel_index++; 386 channel_index++;
387 } 387 }
388 388
389 ret = set_up_therm_channel(base_addr); 389 ret = set_up_therm_channel(base_addr);
390 if (ret) { 390 if (ret) {
391 dev_err(dev, "unable to enable ADC"); 391 dev_err(dev, "unable to enable ADC");
392 return ret; 392 return ret;
393 } 393 }
394 dev_dbg(dev, "ADC initialization successful"); 394 dev_dbg(dev, "ADC initialization successful");
395 return ret; 395 return ret;
396} 396}
397 397
398/** 398/**
@@ -403,18 +403,18 @@ static int mid_initialize_adc(struct device *dev)
403 */ 403 */
404static struct thermal_device_info *initialize_sensor(int index) 404static struct thermal_device_info *initialize_sensor(int index)
405{ 405{
406 struct thermal_device_info *td_info = 406 struct thermal_device_info *td_info =
407 kzalloc(sizeof(struct thermal_device_info), GFP_KERNEL); 407 kzalloc(sizeof(struct thermal_device_info), GFP_KERNEL);
408 408
409 if (!td_info) 409 if (!td_info)
410 return NULL; 410 return NULL;
411 411
412 /* Set the base addr of the channel for this sensor */ 412 /* Set the base addr of the channel for this sensor */
413 td_info->chnl_addr = ADC_DATA_START_ADDR + 2 * (channel_index + index); 413 td_info->chnl_addr = ADC_DATA_START_ADDR + 2 * (channel_index + index);
414 /* Sensor 3 is direct conversion */ 414 /* Sensor 3 is direct conversion */
415 if (index == 3) 415 if (index == 3)
416 td_info->direct = 1; 416 td_info->direct = 1;
417 return td_info; 417 return td_info;
418} 418}
419 419
420/** 420/**
@@ -425,7 +425,7 @@ static struct thermal_device_info *initialize_sensor(int index)
425 */ 425 */
426static int mid_thermal_resume(struct platform_device *pdev) 426static int mid_thermal_resume(struct platform_device *pdev)
427{ 427{
428 return mid_initialize_adc(&pdev->dev); 428 return mid_initialize_adc(&pdev->dev);
429} 429}
430 430
431/** 431/**
@@ -437,12 +437,12 @@ static int mid_thermal_resume(struct platform_device *pdev)
437 */ 437 */
438static int mid_thermal_suspend(struct platform_device *pdev, pm_message_t mesg) 438static int mid_thermal_suspend(struct platform_device *pdev, pm_message_t mesg)
439{ 439{
440 /* 440 /*
441 * This just stops the ADC and does not disable it. 441 * This just stops the ADC and does not disable it.
442 * temporary workaround until we have a generic ADC driver. 442 * temporary workaround until we have a generic ADC driver.
443 * If 0 is passed, it disables the ADC. 443 * If 0 is passed, it disables the ADC.
444 */ 444 */
445 return configure_adc(0); 445 return configure_adc(0);
446} 446}
447 447
448/** 448/**
@@ -453,16 +453,15 @@ static int mid_thermal_suspend(struct platform_device *pdev, pm_message_t mesg)
453 */ 453 */
454static int read_curr_temp(struct thermal_zone_device *tzd, unsigned long *temp) 454static int read_curr_temp(struct thermal_zone_device *tzd, unsigned long *temp)
455{ 455{
456 WARN_ON(tzd == NULL); 456 WARN_ON(tzd == NULL);
457 return mid_read_temp(tzd, temp); 457 return mid_read_temp(tzd, temp);
458} 458}
459 459
460/* Can't be const */ 460/* Can't be const */
461static struct thermal_zone_device_ops tzd_ops = { 461static struct thermal_zone_device_ops tzd_ops = {
462 .get_temp = read_curr_temp, 462 .get_temp = read_curr_temp,
463}; 463};
464 464
465
466/** 465/**
467 * mid_thermal_probe - mfld thermal initialize 466 * mid_thermal_probe - mfld thermal initialize
468 * @pdev: platform device structure 467 * @pdev: platform device structure
@@ -472,46 +471,45 @@ static struct thermal_zone_device_ops tzd_ops = {
472 */ 471 */
473static int mid_thermal_probe(struct platform_device *pdev) 472static int mid_thermal_probe(struct platform_device *pdev)
474{ 473{
475 static char *name[MSIC_THERMAL_SENSORS] = { 474 static char *name[MSIC_THERMAL_SENSORS] = {
476 "skin0", "skin1", "sys", "msicdie" 475 "skin0", "skin1", "sys", "msicdie"
477 }; 476 };
478 477
479 int ret; 478 int ret;
480 int i; 479 int i;
481 struct platform_info *pinfo; 480 struct platform_info *pinfo;
482 481
483 pinfo = kzalloc(sizeof(struct platform_info), GFP_KERNEL); 482 pinfo = kzalloc(sizeof(struct platform_info), GFP_KERNEL);
484 if (!pinfo) 483 if (!pinfo)
485 return -ENOMEM; 484 return -ENOMEM;
486 485
487 /* Initializing the hardware */ 486 /* Initializing the hardware */
488 ret = mid_initialize_adc(&pdev->dev); 487 ret = mid_initialize_adc(&pdev->dev);
489 if (ret) { 488 if (ret) {
490 dev_err(&pdev->dev, "ADC init failed"); 489 dev_err(&pdev->dev, "ADC init failed");
491 kfree(pinfo); 490 kfree(pinfo);
492 return ret; 491 return ret;
493 } 492 }
494 493
495 /* Register each sensor with the generic thermal framework*/ 494 /* Register each sensor with the generic thermal framework*/
496 for (i = 0; i < MSIC_THERMAL_SENSORS; i++) { 495 for (i = 0; i < MSIC_THERMAL_SENSORS; i++) {
497 pinfo->tzd[i] = thermal_zone_device_register(name[i], 496 pinfo->tzd[i] = thermal_zone_device_register(name[i],
498 0, initialize_sensor(i), 497 0, initialize_sensor(i), &tzd_ops, 0, 0, 0, 0);
499 &tzd_ops, 0, 0, 0, 0); 498 if (IS_ERR(pinfo->tzd[i]))
500 if (IS_ERR(pinfo->tzd[i])) 499 goto reg_fail;
501 goto reg_fail; 500 }
502 } 501
503 502 pinfo->pdev = pdev;
504 pinfo->pdev = pdev; 503 platform_set_drvdata(pdev, pinfo);
505 platform_set_drvdata(pdev, pinfo); 504 return 0;
506 return 0;
507 505
508reg_fail: 506reg_fail:
509 ret = PTR_ERR(pinfo->tzd[i]); 507 ret = PTR_ERR(pinfo->tzd[i]);
510 while (--i >= 0) 508 while (--i >= 0)
511 thermal_zone_device_unregister(pinfo->tzd[i]); 509 thermal_zone_device_unregister(pinfo->tzd[i]);
512 configure_adc(0); 510 configure_adc(0);
513 kfree(pinfo); 511 kfree(pinfo);
514 return ret; 512 return ret;
515} 513}
516 514
517/** 515/**
@@ -523,49 +521,45 @@ reg_fail:
523 */ 521 */
524static int mid_thermal_remove(struct platform_device *pdev) 522static int mid_thermal_remove(struct platform_device *pdev)
525{ 523{
526 int i; 524 int i;
527 struct platform_info *pinfo = platform_get_drvdata(pdev); 525 struct platform_info *pinfo = platform_get_drvdata(pdev);
528 526
529 for (i = 0; i < MSIC_THERMAL_SENSORS; i++) 527 for (i = 0; i < MSIC_THERMAL_SENSORS; i++)
530 thermal_zone_device_unregister(pinfo->tzd[i]); 528 thermal_zone_device_unregister(pinfo->tzd[i]);
531 529
532 platform_set_drvdata(pdev, NULL); 530 platform_set_drvdata(pdev, NULL);
533 531
534 /* Stop the ADC */ 532 /* Stop the ADC */
535 return configure_adc(0); 533 return configure_adc(0);
536} 534}
537 535
538/*********************************************************************
539 * Driver initialisation and finalization
540 *********************************************************************/
541
542#define DRIVER_NAME "msic_sensor" 536#define DRIVER_NAME "msic_sensor"
543 537
544static const struct platform_device_id therm_id_table[] = { 538static const struct platform_device_id therm_id_table[] = {
545 { DRIVER_NAME, 1 }, 539 { DRIVER_NAME, 1 },
546 { } 540 { }
547}; 541};
548 542
549static struct platform_driver mid_thermal_driver = { 543static struct platform_driver mid_thermal_driver = {
550 .driver = { 544 .driver = {
551 .name = DRIVER_NAME, 545 .name = DRIVER_NAME,
552 .owner = THIS_MODULE, 546 .owner = THIS_MODULE,
553 }, 547 },
554 .probe = mid_thermal_probe, 548 .probe = mid_thermal_probe,
555 .suspend = mid_thermal_suspend, 549 .suspend = mid_thermal_suspend,
556 .resume = mid_thermal_resume, 550 .resume = mid_thermal_resume,
557 .remove = __devexit_p(mid_thermal_remove), 551 .remove = __devexit_p(mid_thermal_remove),
558 .id_table = therm_id_table, 552 .id_table = therm_id_table,
559}; 553};
560 554
561static int __init mid_thermal_module_init(void) 555static int __init mid_thermal_module_init(void)
562{ 556{
563 return platform_driver_register(&mid_thermal_driver); 557 return platform_driver_register(&mid_thermal_driver);
564} 558}
565 559
566static void __exit mid_thermal_module_exit(void) 560static void __exit mid_thermal_module_exit(void)
567{ 561{
568 platform_driver_unregister(&mid_thermal_driver); 562 platform_driver_unregister(&mid_thermal_driver);
569} 563}
570 564
571module_init(mid_thermal_module_init); 565module_init(mid_thermal_module_init);