intel_pmic_gpio: fix off-by-one value range checking

In pmic_irq_type(), we use gpio as array index for trigger,
thus the valid value range for gpio should be 0 .. NUM_GPIO - 1.

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Matthew Garrett <mjg@redhat.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/platform/x86/intel_pmic_gpio.c b/drivers/platform/x86/intel_pmic_gpio.c
index c6e2a1d4fadc..f540ff96c53f 100644
--- a/drivers/platform/x86/intel_pmic_gpio.c
+++ b/drivers/platform/x86/intel_pmic_gpio.c
@@ -197,7 +197,7 @@ static int pmic_irq_type(unsigned irq, unsigned type)
         u32 gpio = irq - pg->irq_base;
         unsigned long flags;
 
-        if (gpio > pg->chip.ngpio)
+        if (gpio >= pg->chip.ngpio)
                 return -EINVAL;
 
         spin_lock_irqsave(&pg->irqtypes.lock, flags);